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Arithmetic

The document discusses arithmetic operations performed by an Arithmetic Logic Unit (ALU), a key component of a computer's CPU, which executes both arithmetic and logical operations. It explains the processes of addition and subtraction, including overflow conditions, and the distinction between signed and unsigned binary numbers. Additionally, it outlines methods for subtraction, such as direct subtraction, 1's complement, and 2's complement, along with the rules governing these operations.

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14 views39 pages

Arithmetic

The document discusses arithmetic operations performed by an Arithmetic Logic Unit (ALU), a key component of a computer's CPU, which executes both arithmetic and logical operations. It explains the processes of addition and subtraction, including overflow conditions, and the distinction between signed and unsigned binary numbers. Additionally, it outlines methods for subtraction, such as direct subtraction, 1's complement, and 2's complement, along with the rules governing these operations.

Uploaded by

padma
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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UNIT II

Arithmetic
Operations

1
Arithmetic
Operations
• An arithmetic logic unit (ALU) is a hardware that
performs arithmetic and logical operations

• TheALU is a fundamental building block of the


central processing unit (CPU) of a computer.

• Theprocessors found inside modern CPUs


accommodate very powerful and very complex ALU’s

• A single component may contain a number of


ALUs.
2
Arithmetic
Operations
John Von Neumann proposed the ALU in 1945
when he was working on EDVAC

3
4
5
6
7
1-
•

operation
BITALU
Can do logical AND and logical OR

• AND operation=0
• OR
operation=1

8
32
BITALU

9
Typical symbol of an ALU

1
ADDITION

1
ADDITION

1. Load the operands into memory

2. Bring them to the processor

3. Perform operation in ALU

4. Store the result back to memory or retain in the


processor.

1
ADDITION
Digits are added bit by bit from right to left, with
•
carries passed to the next digit to the left.

1
ADDITION

1
OVERFLOW IN ADDITION

• Overflow occurs when an operation produces a result that


is larger than the max value or smaller than the min value
within a representation system.

• Happens in addition and


subtraction
• Cannot be represented in available
hardware.

1
OVERFLOW IN ADDITION

Example
:

• First operand – 32 bit


word
• Second operand – 32
bitword
• Result also must be 32 bit
word
• If exceeds more than 32 bit word, causes
overflow.
1
OVERFLOW IN ADDITION
• Adding +ve and –ve operands => no
overflow
• Adding two +ve operands
-Overflow exists, if result sign is 1
• Adding two –ve operands
- Overflow exists, if result sign
is 0
Example : -10 + 4 = -6.
• Since the operands fit in 32 bits and the sum is no larger than
an
• No overflow
operand, the can
sumoccur
must when adding
fit in 32 positive
bits as well. and
negative Operands.

1
OVERFLOW IN ADDITION

• The lack of a 33rd bit means that when overflow occurs,


the sign bit is set with the value of the result
instead of the proper sign of theresult.
• Overflow occurs when adding a 2 positive numbers and the sum will

be negative and vice- versa (adding

2 positive and 2 negative numbers)

• Addition can be performed in two


ways
♣ Unsigned binary Numbers
♣ Signed Binary Numbers 1
•
Overflow bit indicated by flag
Signed and unsigned binary numbers
• Positive number –
unsigned
• Negative number –
signed
• Ordinary,

♣ + sign indicative
+ve
♣ – sign indicate –ve.
• In computer, everything are binary
numbers,

♣ 0 represents positive number


♣ 1 represents Negative
SNSCE/ECE/CA/MIRACLENE 1
1
numbers
Signed and unsigned binary numbers
• Before processing user must identify , whether the
number is signed or unsigned

• Left most bit represent the sign


bit
Example

01001 +9

11001 - 9

20
2
exampl
e
• Consider a two 4 bit positive number +9 and
+8
+9 and +8 = 01001 + 01000 =0001

• Consider a two 8 bit positive number +98 and


+87
+98 and +87

010011000

010000111

21
2
exampl
e

1
ADDITION
• The MIPS solution is to have two kinds of
arithmetic instructions to recognize the two choices:

❑ Add (add), add immediate (addi), and


subtract(sub)
cause exceptions on
overflow.
Add unsigned (addu), add immediate unsigned (addiu),
❑

and subtract unsigned (subu) do not cause exceptions on


overflow.

1
SUBTRACTION

❖ Subtraction cannot be performed


directly
❖ Inverse of Addition Process

❖ Subtracting a larger digit from smaller digit

Three ways
❑ Direct Method
❑ Using 1’s Complement
❑ Using 2’sComplement
2
RULES FOR BINARYSUBTRACTION
2
DIRECT
METHOD
1) Subtract the binary
number
• 110 from 1001 ( 6 from 9)
• 11 from 1000 (3 from 8)
• 01 from 10000 (1 from
16)

Answer
i) 011
ii) 101
iii) 1111
1’S COMPLEMENT

• To simplify the hardware


design
• By changing 0’s to 1’s and vice
versa
Rules
• Step 1:
the1’s complement of thesmaller
Determine number

• Step 2: Add the 1’s complement to the


largernumber
• Step 3: If carry exist add to the
result
1’S COMPLEMENT
1) 101011 – 111001
Solution:
1’s complement of 111001 is

000110. Hence
Minued 1 0 1 0 11
-
1’s complement 0 0 0 1 1 0+
-
11000
1
1’S
COMPLEMENT
2) 110101 – 100101
Solution:
1’s complement of 10011 is

011010. Hence,

Minued - 110101
1’s complement of 01101
subtrahend- 0+
Carry over - 1 001111
1 +
0 1 0 0 00
2’S COMPLEMENT
• By taking 1’s complement of the number and adding
1to the least significant bit
• 2’s Complement = 1’s Complement+1
• Example : 11010
00101 +1 = 00110
Rules
• Step 1: Determine the 2’s complement of the
smaller
number
• Step 2: Add the 2’s complement to the
largernumber 8
• Step 3: If carry exist discard
2’S COMPLEMENT

1) 10110 – 11010
Solution:
2’s complement of 11010 is (00101 + 1) i.e.
00110. Hence
Minued - 1 0 1 1 0

2’s complement of subtrahend - 00110


+
OVERFLOW IN
SUBTRACTION
• Just like addition, overflow occurs in subtraction
also.
• Can be determined only in the signed binary
number
• Opposite to
addition
• When the sign of theoperands are same – No
overflow
occur
s
CASE
1
• Case 1: -ve number from +ve
number
• result
overflow is –ve
occurs
•
Consider two 4bit number, -12 from +15

a)0 1 1 1 1 b)0 1 1 1 1

11100-10100+
10011 10011

a) Result is Negative andno overflow bit


b) Result is Negative and overflow has
occurred
CASE
2
Explanation

In both the cases follow;

In a) : subtract directly.
In b) : 2’s complement of second number isadded to

binary number of the first.


OVERFLOW CONDITION FOR
ADDITION AND
SUBTRACTION

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