Agro-Technical and Technology

College (ATTC)
Menschen fuer Menschen Foundation

CHAPTER TWO
COMPUTER ARITHMETIC
BY
Mr. Chala Tesfaye

EET 4216 - Computer Architecture and Organization

 ARITHMETIC & LOGIC UNIT (ALU)
❑ Part of the computer that performs arithmetic and logical operations on data.
❑ All of the other elements of the computer system are there mainly to bring data into the
ALU for it to process and then to take the results back out.

❑ Based on the use of simple digital logic devices that can store binary digits and perform
simple Boolean logic operations.

2
 INTEGERS REPRESENTATION
❑ Integers: numbers without decimal point/fraction parts.

❑ Binary numbers can represent integers and other values using only binary
digits (0 and 1).

❑ Arbitrary representation binary numbers could be:

❖ (-1101.0101)2 = (-13.3125)10

❑ For purposes of computer storage and processing, however, we do not have

the benefit of minus signs and periods.

❑ Only binary digits (0 and 1) may be used to represent numbers. 3

 SIGN-MAGNITUDE REPRESENTATION
❑ Most significant (MSB) bit in the word as a sign bit.

❖ If the sign bit is 0, the number is positive;

❖ If the sign bit is 1, the number is negative.
❑ The simplest form of representation that employs a sign bit is the sign-magnitude
representation.

❑ There are several drawbacks to sign-magnitude representation.

❖ One is that addition and subtraction require a consideration of both the signs of the
numbers and their relative magnitudes to carry out the required operation.
❖ Another drawback is that there are two representations of 0.
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 TWOS COMPLEMENT REPRESENTATION
❑ 1’s complement = 0’s to 1 and 1’s to 0
❑ 2’s complement = 1’s complement +1

❑ Ex: 1’s complement of 10101 is 01010 and Ex: 2’s complement of 10101 is 01011

❑ The MSB is a sign bit, in 2’s complement

❑ For a positive number,

 The sign bit,an-1 is zero.
 The remaining bits represent the magnitude of the number in the same fashion as for sign-
magnitude
❑ For negative numbers,
 Sign bit , an-1 is one.
 Magnitude is found applying 2’s complement
 Example: 5

+5:0101 and - 5:1011

 ADDITION AND SUBTRACTION
2’s complement addition
❑ If the operand to add is negative convert to 2’s complement, then add
❖ If the result of the operation is positive, we get a positive number in true binary
form
❖ If the result of the operation is negative, we get a negative number in two
complement form
❑ N.B discard carry while the addition of MSB

❑ Overflow occurs if the sum cannot be expressed with the same bit of operands including
the sign bit.
❑ Overflow Rule: If two numbers are added, and they are both positive or both negative,
then overflow occurs if and only if the result has the opposite sign.
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❑ EX: -7+5, and -7+-6
 EXAMPLES
1001 = –7 1100 = –4
1001 = –7 +0101 = 5 1100 =+0100
–4 = 4
+0101 = 5 1110 = –2 +0100 =10000
4 = 0
1110 = –2 10000 = 0
(a) (–7) + (+5) (b) (–4) + (+4)
(a) (–7) + (+5) (b) (–4) + (+4)

0011 = 3
0011 = 3 1100
1100 = –4
= –4
+0100 = 4 +0100 = 4 +1111 =+1111
–1 = –1
0111 = 7 0111 = 7 11011 =11011
–5 = –5
(c) (+3) + (+4) (c) (+3) + (+4) (d) (–4) + (d) (–4) + (–1)
(–1)

0101 = 5 0101 = 5 1001 = 1001

–7 = –7
+0100 = 4 +0100 = 4 +1010 =+1010
–6 = –6
1001 = Overflow
1001 = Overflow 10011 =10011 = Overflow
Overflow 7

(e) (+5) + (+4) (e) (+5) + (+4) (f) (–7) + (–6)

(f) (–7) + (–6)
 EXAMPLES
❑ Addition in two complements is illustrated in the previous slides.
❑ Addition proceeds as if the two numbers were unsigned integers.
❖ The first three examples illustrate successful operations.
❖ If the result of the operation is positive, we get a positive number in the twos
complement form, which is the same as in the unsigned integer form.
❑ If the result of the operation is negative, we get a negative number in twos
complement form.
❖ Note that, in some instances, there is a carry bit beyond the end of the word
(indicated by shading), which is ignored.
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 SUBTRACTION
❑ To subtract one number (subtrahend) from another (minuend), take the two
complement (negation) of the subtrahend and add it to the minuend.
0010 = 2 0101 = 5
❑ EX: 2-7,5-2,…. 0010 = +1001
2 = –7 0101 = 5 = –2
+1110
+1001 = –7
1011 = –5 +1110 = –2 = 3
10011
1011 = –5 10011 = 3
(a) M = 2 = 0010 (b) M = 5 = 0101
(a) M = 2 = S0010 (b) M = 5 =S 0101
❑ Thus, subtraction is achieved = 7 = 0111
S = 7 =–S0111
= 1001 S = 2 –S
= 2 = 0010
= 0010
= 1110
using addition, as illustrated. –S = 1001 –S = 1110

1011 = –5 0101 = 5
❑ The last two examples 1011 = +1110
–5 = –2 0101 = 5
+0010 = 2
+1110 = 11001
–2 = –7 +0010 = 0111
2 = 7
11001 = –7 0111 = 7
demonstrate that the overflow (c) M =–5 = 1011 (d) M = 5 = 0101
(c) M =–5 = S1011
= 2 = 0010 (d) M = 5 =S 0101
=–2 = 1110
S = 2 =–S0010 S =–2 –S
= 1110
rule still applies. –S =
=
1110
1110
–S =
=
0010
0010

0111 = 7 1010 = –6
0111 = +0111
7 = 7 1010 = –6 = –4
+1100
+0111 = 71110 = Overflow +1100 = –4 = Overflow
10110
1110 = Overflow 10110 = Overflow
(e) M = 7 = 0111 (f) M = –6 = 1010 9
(e) M = 7 =S 0111
= –7 = 1001 (f) M = –6 S= =1010
4 = 0100
S = –7 –S
= 1001
= 0111 S = 4–S= =0100 1100
–S = 0111 –S = 1100
 MULTIPLICATION
❑ Unsigned integers multiplication Using paper and pencil
1. Multiplication involves the generation of partial products, one for each digit in the
multiplier. These partial products are then summed to produce the final product.

2. The partial products are easily defined. When the multiplier bit is 0, the partial
product is 0. When the multiplier is 1, the partial product is the multiplicand.

3. The total product is produced by summing the partial products. For this operation,
each successive partial product is shifted one position to the left relative to the
preceding partial product

4. The multiplication of two n-bit binary integers results in a product of up to bits in 10

length.
 MULTIPLICATION
Unsigned integers multiplication : Using paper and pencil Method:
❑ Multiplication involves the generation of partial products, one for each digit in the multiplier.
❑ These partial products are then summed to produce the final product.

1011 Multiplicand (11)

1101 Multiplier (13)
1011
0000
Partial products
1011
1011
10001111 Product (143)

11
Figure 10.7 Multiplication of Unsigned Binary Integers
 n-Bit Adder
Add
MULTIPLICATION
Shift and Add
Control Logic

Flow chart of unsigned number multiplication

Shift Right

❑ Example:
C An-1 A0 Qn-1 Q0

❖ Multiplicand(M) = 1011 (11) Multiplier

❖ Multiplier(Q)=1101(13)
(a) Block Diagram
❖ Solution: ? 1000 1111 (143)
C A Q M
0 0000 1101 1011 Initial Values

0 1011 1101 1011 Add First

0 0101 1110 1011 Shift Cycle
Second
0 0010 1111 1011 Shift Cycle

0 1101 1111 1011 Add Third

0 0110 1111 1011 Shift Cycle
12
1 0001 1111 1011 Add Fourth
0 1000 1111 1011 Shift Cycle
 MULTIPLICATION
❑ Efficient paper and pencil multiplication using HW

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 SIGNED NUMBER MULTIPLICATION
❑ Booth’s Algorithm

❑ Straight-forward multiplication will not work if both, or either of multiplier and

multiplicand is negative
❑ To demonstrate why we need to remember:
❖ The multiplication of a binary number is accomplished by shifting that number to
the left n bits
❖ EX:

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 SIGNED NUMBER MULTIPLICATION
❑ Booth’s Algorithm
❑ Straight-forward multiplication will not work if multiplicand is negative
❑ The problem is that each contribution of the negative multiplicand as a partial product must
be a negative number on a 2n-bit field; the sign bits of the partial products must line up.

❑ Note that this is accomplished by padding each partial product to the left with binary 1s.
❑ EX: if multiplicand is negative

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 SIGNED NUMBER MULTIPLICATION
❑ Booth’s Algorithm

❑ Straight forward will not work if the multiplier is negative

❑ The reason is that the bits of the multiplier no longer correspond to the
shifts or multiplications that must take place
❑ EX: -3 = 1101 in 2’s complement
❑ 1101 = -(1*23 +1*22 +0*21+1*20)

❑ But it need to be –(1*21+1*20) to get correct result

❑ So this multiplier cannot be used directly in the manner we have been

describing.
❑ Solution- use Booth’s Algorithm
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 SIGNED NUMBER MULTIPLICATION
Booth’s Algorithm
BOOTH’S ALGORITHM – 7*3

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 BOOTH’S ALGORITHM - EXERCISES
❑ Use booth’s algorism to find product of:
A. 7*3
B. 7 * -3 0111 0111
´0011 (0) ´1101 (0)
C. -7 * 3 11111001 1–0 11111001 1–0
0000000 1–1 0000111 0–1
D. -7 * -3 000111 0–1 111001 1–0
00010101 (21) 11101011 (–21)
(a) (7) ´ (3) = (21) (b) (7) ´ (–3) = (–21)

1001 1001
´0011 (0) ´1101 (0)
00000111 1–0 00000111 1–0
0000000 1–1 1111001 0–1
111001 0–1 000111 1–0
11101011 (–21) 00010101 (21)
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(c) (–7) ´ (3) = (–21) (d) (–7) ´ (–3) = (21)
 DIVISION
Paper and Pencil approach (long division)
❑ First, the bits of the dividend are examined from left to right, until the set of bits
examined represents a number greater than or equal to the divisor; this is referred to as
the divisor being able to divide the number.
❖ Until this event occurs, 0s are placed in the quotient from left to right.
❖ When the event occurs, a 1 is placed in the quotient and the divisor is subtracted from
the partial dividend. The result is referred to as a partial remainder
Paper and Pencil based
❑ From this point on, the division follows a cyclic pattern.
❑ At each cycle, additional bits from the dividend are appended to the partial remainder
until the result is greater than or equal to the divisor.
❑ As before, the divisor is subtracted from this number to produce a new partial remainder.
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❑ The process continues until all the bits of the dividend are exhausted.
DIVISION-MACHINE ALGORITHM CORRESPONDS TO LONG DIVISION
DIVISION – EXAMPLE(7/3)

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 SIGNED NUMBER DIVISION
❑ To deal with negative numbers, we recognize that the remainder is defined by:
❑ D=Q*V+R

❑ where D = dividend, Q = quotient, V= Divisor, R =remainder

❑ All possible cases for combination of D and V:
❑ D=7, V=3 -> Q=2, R=1
❑ D=7, V=-3 -> Q=-2, R=1
❑ D=-7, V=3 -> Q=-2, R=-1
❑ D=-7, V=-3 -> Q=2, R=-1
❑ We see that the magnitudes of Q and R are unaffected by the input signs and that the signs of Q
and R are easily derivable form the signs of D and V
❑ Sign(R) = Sign(D) and Sign(Q)
❑ = Sign(D)*Sign(V)

❑ Hence, one way to do twos complement division is to convert the operands into unsigned values
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and, at the end, to account for the signs by complementation where needed.
 FLOATING-POINT ARITHMETIC
❑ Floating-point arithmetic is a method used in computer systems to represent and
perform operations on real (decimal) numbers, efficiently handling very large or very
small values.
❑ Floating-point representation balances precision and range, making it ideal for scientific
and mathematical computations involving fractions or extreme magnitudes.
❑ In contrast, fixed-point notation represents numbers in a binary system with a fixed
position for the binary (or radix) point, enabling the representation of both integers and
fractional values.
❑ This format allows for the representation of integers as well as numbers with fractional
components by assuming a fixed binary point's position.
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❑ EX: 00011001.01001
 FLOATING –POINT REPRESENTATION
Limitation of fixed-point representation
❑ Limited Range: Cannot represent very large numbers or tiny fractions because the
number of bits is fixed.

❑ Loss of Precision: When dividing large numbers, the fractional part of the result might be
lost if there are not enough bits to store it.

❑ No Dynamic Scaling: Fixed-point cannot adjust to numbers of vastly different sizes,

making it inefficient for handling both large and small values.

❑ Decimal system has scientific Notation to overcome this limitation:

❖ EX: 976,000,000,000,000 =9.76*1014
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❖ 0.0000000000000976 =9.76*10-14
 …FLOATING-POINT REPRESENTATION
❑ Binary floating-point numbers are represented using three fields:

❖ Sign: Determines if the number is positive or negative (0 = positive, 1 = negative).

❖ Significant (S): Also called the "mantissa," this stores the main digits of the number.

❖ Exponent (E): Indicates the position of the radix (decimal) point, making the number
larger or smaller.

❑ Base (B): The base is implicitly fixed (e.g., base 2 for binary), so it does not need to be
stored.

❑ Radix Point: The radix (decimal) point is assumed to be just to the right of the leftmost
bit in the significant.
 …FLOATING-POINT REPRESENTATION
❑ Typical 32-bit Floating-Point Format:
1. Sign bit (1 bit):
❖ The leftmost bit stores whether the number is positive or negative.
❖ Example: 0 = positive, 1 = negative.
2. Exponent field (8 bits): The next 8 bits store the exponent in biased representation.
❖ A bias (fixed value) is subtracted to get the actual exponent.
❖ Example: If bias = 127, an exponent field of 130 gives the true exponent:
❖ 130−127=3.
3. Significant/Mantissa: The rest of the bits store the significant digits of the number.
❑ Why use this format? It allows representation very large and very small numbers
efficiently.
 FLOATING-POINT REPRESENTATION
❑ In a 32-bit floating-point system, the exponent uses 8 bits to represent its value.

❑ To determine the actual exponent (true exponent), a bias value is subtracted.

To Calculate Bias and True Exponent:

1. The bias value is calculated as 2k-1 - 1,

❖ Where k is the number of bits in the binary exponent.

❖ Bias value = 2(8-1) -1 = 27-1= 128-1=127
2. The exponent can range between 0 and 255 in binary.

3. To get the true exponent: Subtract the bias value (127) from the stored exponent.

❖ Example: If the stored exponent is 10100 (20 in decimal),

❖ The true exponent is 20−127=−107.

 FLOATING-POINT REPRESENTATION
❑ Significant and Normalized Numbers:
❑ The significant (or mantissa) is the part of a floating-point number that carries the actual
digits of the number. It represents the precision of the number.
❑ The last 23 bits represent the significant (also called the mantissa), which holds the
precision of the number.
❑ A normalized number ensures that the most significant bit (MSB) of the significant is 1.
❖ For base-2 (binary) numbers, this simplifies storage and calculations because the leading
non-zero bit is always 1.
❖ Because the MSB is always one, it is unnecessary to store this bit; rather, it is implicit

❖ Given a number that is not normalized, the number may be normalized by shifting the
radix point to the right of the leftmost 1 bit and adjusting the exponent accordingly.
 FLOATING-POINT REPRESENTATION
❑ Note the following from the example below:
❖ The sign is stored in the first bit of the word.

❖ The first bit of the true significant is always 1 and need not be stored in the significant
field.

❖ The value 127 is added to the true exponent to be stored in the exponent field.
❖ The
base is 2.
❑ Examples

❖ 1.1010001*210100 = 0 10010011 10100010000000000000000 = 1.6328125*220

❖ –1.1010001*210100 = 1 10010011 10100010000000000000000 = –1.6328125*220
❖ 1.1010001*2–10100 = 0 01101011 10100010000000000000000 = 1.6328125*2–20
❖ –1.1010001*2–10100 = 1 01101011 10100010000000000000000 = –1.6328125*2–20
IEEE STANDARD FOR BINARY FLOATING-POINT REPRESENTATION
❑ The IEEE Standard 754 for floating-point arithmetic, adopted in 1985, is one of the
most widely used standards for representing real numbers in computers.

❑ This standard was created to ensure the portability of numerical programs across
different computing systems and to facilitate the development of sophisticated,
numerically intensive software applications.

❑ Its widespread adoption ensures that floating-point operations are consistent across
processors, which is essential for ensuring the accuracy and reliability of scientific,
engineering, and mathematical computations.
IEEE STANDARD FOR BINARY FLOATING-POINT REPRESENTATION
Key Aspects of IEEE 754:
32-bit Single Precision Format (Single Format):
❑ The single precision format uses 32 bits to represent a floating-point number.
❑ It divides these 32 bits into three parts:
❖ 1 bit for the sign (S)
❖ 8 bits for the exponent (E)
❖ 23 bits for the mantissa (M)

❑ The exponent is stored with a bias of 127, meaning the actual exponent is calculated by
subtracting 127 from the stored value.

❑ The mantissa is normalized, which means that the most significant digit is always
assumed to be 1, though it is not explicitly stored.
IEEE STANDARD FOR BINARY FLOATING-POINT REPRESENTATION
Key Aspects of IEEE 754:
64-bit Double Precision Format (Double Format):
• The double precision format uses 64 bits to represent a floating-point number.
• The 64 bits are divided into:

o 1 bit for the sign (S)

o 11 bits for the exponent (E)
o 52 bits for the mantissa (M)

❖ The exponent is stored with a bias of 1023, and like single precision, the mantissa is
normalized (with an implicit leading 1).
 FLOATING-POINT ARITHMETIC
❑Addition and Subtraction

❖To add or subtract two floating-point numbers, both numbers must have the same exponent.

• If the exponents are different, one of the numbers needs to be adjusted.

❖Aligning the Radix Point: The radix point (decimal or binary point) of one number might
need to be shifted to align with the other number, making the exponents the same.

❑Multiplication and Division

❖Multiplying and dividing floating-point numbers is simpler because you can directly add
the exponents for multiplication or subtract the exponents for division without needing to
align the radix points.
 FLOATING-POINT ARITHMETIC
Possible Issues in Floating-Point Operations
1. Exponent Overflow: This happens when the exponent is too large to be represented.
o Result: The number may be shown as +∞ or -∞ (infinity).
2. Exponent Underflow: Occurs when the exponent is too small to be represented.
o Result: The number is too small and is treated as 0.
3. Significant Underflow: This happens when too many digits of the mantissa (significant
part) are lost during alignment.
o Solution: Rounding is used to keep the value as accurate as possible.
4. Significant Overflow: Occurs when adding two numbers of the same sign causes the
mantissa to overflow (become too large).
o Solution: This can be corrected by realigning the mantissa or adjusting the
exponent to handle the overflow.
 ADDITION AND SUBTRACTION
❑ There are four basic phases of the algorithm for addition and subtraction:
1. Check for zeros. 2. Align the significance.
3. Add or subtract the significance. 4. Normalize the result.
❑ Zero Check:
❖ Addition and subtraction are essentially the same operation, with the only difference being the sign.

• Therefore, if the operation is subtraction, the sign of the second number (the subtrahend) is changed to
its opposite.

❖ Next, if either operand is 0, the other operand is returned as the result.

❖ Align the Significance:
❖ The exponents of both numbers need to be the same to add or subtract their significands.
❖ Shift the smaller number’s exponent to match the larger one.

❖ This is done by shifting the significance (mantissa) of the smaller number to the right, which may cause
some digits to be lost.
• These lost digits are less important (as the number is smaller).
❖ Continue shifting until the exponents are equal.
 ADDITION AND SUBTRACTION
Addition
❑ Next, the two significant are added together, taking into account their signs.
❖ Because the signs may differ, the result may be 0
❑ There is also the possibility of a significant overflow by 1 digit.
❖ If so, the significance of the result is shifted right and the exponent is incremented.
❑ An exponent overflow could occur as a result; this would be reported and the operation
stopped.
Normalization:
❑ The final phase normalizes the result.
❑ Normalization consists of shifting significant digits left until the most significant digit is
nonzero.
 ADDITION AND SUBTRACTION
❑ Examples: Represent 0.5 and 0.25 using the following floating-point representation:

➢ 6-bit normalized signed 2’s complement fraction mantissa (significant), including the
sign.

 1 bit for the sign, 5 bits for the mantissa.

➢ floating-point biased exponent.

 Range of representation is -4 to 3.

▪ Add 4 to bias it.

❑ Follow the steps of floating-point addition to find the sum of the two numbers.
 EXAMPLES (CONTD.)
➢ 0.5  0.1 X 20

 0 10000 100 (Already normalized).

➢ 0.25  0.01 X 20

 0 01000 100

 0 10000 011 (After normalization).

0 10000 100
0 10000 011
+
EXAMPLES (CONTD.)
 EXAMPLES (CONTD.)
Add -0.5 to 0.25
-0.5 -0.1 X 20 - 0 10000 100 1 10000 100
0.01 X 20 0 01000 100 0 10000 011
0.25

1. Check for zeros.

• None.
2. Align Mantissas(significant).
• 0 10000 011 0 01000 100

Add Mantissas. + 1 10000

3. Preliminary
0 01000 1 11000 100
1 11000 Result
1. Normalize the result.
• Already Normalized. 39
 OVERFLOW IN FLOATING-POINT OPERATIONS
What about overflow?
 If adding the mantissa produces an overflow, we shift the result’s mantissa to the right
1 position and increment the exponent by 1.

 If incrementing the exponent produces an exponent overflow, the operation is

terminated and an overflow error is reported.

40
 EXAMPLES (CONTD.)
❑ Add 0.5 to 0.5
0.5 0.1 X 20 0 10000 100
0.5 0.1 X 20 0 10000 100

1. Check for zeros.

• None.
2. Align Mantissas(significant).
• Already Aligned.

0 10000
3. Add Mantissas. + 0 10000
Overflow
1 00000 0 10000 101
Correction
1. Normalize the result. 41
• Already Normalized.
EXAMPLES (CONTD.)

 Add 4 to 4
4 0.1 X 23 0 10000 111
4 0.1 X 23 0 10000 111
1. Check for zeros.
• None.
2. Align Mantissas(significant).
• Already Aligned.

3. Add Mantissas. 0 10000

+ 0 10000
1 00000 Overflow

 Attempting to correct the overflow will cause the exponent to

exceed its limit.
 Cannot correct this overflow.
42
 MULTIPLICATION OF FLOATING-POINT NUMBERS
❑ Multiplication of floating-point numbers is a four-step process:
 Check for zeros.
 Add the exponents.
 Multiply the mantissa.
 Normalize the product.
❑ Division is done by

 Check for zeros.

 Align the dividend.
 Subtract the exponents.
 Divide the mantissas.

❑ All of the operations on floating-point numbers have been simplified so that the same
hardware can be used for floating-point numbers and integers. 43
THANK YOU