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Coa Cha 4

This document discusses the role of registers in computer architecture, detailing various types of processor registers and their functions. It introduces micro-operations, Register Transfer Language, and the mechanisms for transferring information between registers and memory, including bus systems and memory operations. Additionally, it covers arithmetic and logic micro-operations, including shift operations and their implications in data processing.

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0% found this document useful (0 votes)
13 views23 pages

Coa Cha 4

This document discusses the role of registers in computer architecture, detailing various types of processor registers and their functions. It introduces micro-operations, Register Transfer Language, and the mechanisms for transferring information between registers and memory, including bus systems and memory operations. Additionally, it covers arithmetic and logic micro-operations, including shift operations and their implications in data processing.

Uploaded by

tegenefikadu91
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Computer Organization And Architecture

Lecture-4
Register Transfer Language and Micro-Operation
12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 1
Introduction
➢ Registers are a type of computer memory used to quickly accept, store, and
transfer data and instructions that are being used immediately by the CPU.

➢ The registers used by the CPU are often termed as Processor registers.

➢ Computer registers are nominated by capital letters (some time followed by


numerals) to denote the functions of the registers.

➢ For example, Memory address register is nominated by MAR,MDR (memory


data register), PC (program counter), IR (instruction register) and R1 (process
register).

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 2


Con't...
❑Memory Address Register: are those registers that holds the address for
memory unit.

❑MDR: Memory Data Register stores instruction and data received from the
memory and sent from the memory.

❑PC: program Counter holds the address of the next instruction to be executed.

❑IR: instruction register holds the instruction to be executed.

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 3


Cont’d...
➢The individual flip-flops in an n-bit register are numbered in sequence from 0 to
n-1, starting from 0 in the rightmost position and increasing toward the left.

Figure 4.1: Block diagram of registers.

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 4


Microoperations
➢ The operations executed on data stored in registers are called micro operations.
➢ A micro operation is an elementary operation performed on the information
stored in one or more registers.
✓ Examples of micro operation are shift, count, clear, and load.

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 5


Register Transfer Language
➢ The symbolic notation used to describe the micro operation transfers among
registers is called a Register Transfer Language.
➢ The term register transfer implies the availability of hardware logic circuits that
can perform a stated micro operation and transfer the result of the operation
from one register to another register.
➢ Is a system for expressing in symbolic form the microoperation sequences
among the registers of the digital module.

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 6


Register Transfer
➢ Information transfer from one register to another is designed in symbolic form
by means of a replacement operator.
➢ Example, the statement R2←R1, denotes the transfer of the content of register
R1 into register R2.

Table 4.1: Basic Symbols for Register Transfers


12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 7
Register Transfer with Control Function
➢ Normally, we want the transfer to occur only under a predefined control
condition. This can be shown by means of if-then statement.
If (P=1) then (R2←R1)
➢ Where P is a control signal generated in the control section. But, sometimes it
is convenient to separate the control variables from the register transfer
operation by specifying a control function.
➢ A control function is a Boolean variable that is equals to 1or 0.
P: R2←R1
➢ The control condition terminated with a colon and denotes that the transfer
operation be executed by the hardware only if P=1.
➢ Every statement written in a register transfer notation implies a hardware
construction for implementing the transfer.
12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 8
Cont’d...

Figure 4.2 Shows transfer of content of R1 to R2

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 9


Bus and Memory Transfers
➢ A typical computer has many registers, and paths must be provided to transfer
information from one register to another.
➢ An efficient way for transferring information between registers in a multiple-
register configuration is using a common bus system.
➢ A bus structure consists of a set of common lines, one for each bit of a register.
➢ Control signals determine which register the bus selects during each particular
register transfer.
➢ Two ways of constructing, a common bus system is with multiplexers &
three-State Bus Buffers.

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 10


Common Bus System Using Multiplexers

Figure 4.3: Bus system for four registers.


A bus system will multiplex k registers of n bits each to produce an n line
common bus. Since, from here n= 4 and k=4.

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 11


Cont’d...
➢ The number of multiplexers needed to construct the bus is equal to n, the number of
bits in each register.
➢ The size of each multiplexer must be kx1 since it multiplexes k data lines.
➢ The transfer of information from a bus into one of many destination registers can be
accomplished by connecting the bus lines to all of the destination registers.
➢ The symbolic statement that includes bus transfer is: BUS ←C, R1←BUS
➢ The content of register C is placed on the bus, and the content of the bus is loaded
into register R1 by activating control input.
➢ If the bus is known to exist, only the register transfer can be shown: R1←C

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 12


Three-State Bus Buffers
➢ The bus system can be constructed with three-state gates instead of multiplexers.
➢ A three-state gate is a digital circuit that exhibits three states.
➢ Two of the states are signals equivalent to logic 1 and 0 as in a conventional gate.
➢ The third state is a high-impedance state.
➢ The high-impedance state behaves like an open circuit, which means that the output is
disconnected and does not have logical significance.

Figure 4.4: Graphic symbols for three-state buffer


➢To construct a common bus for four registers of n bits each using three-state buffers.

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 13


Three-State Bus Buffers Cont’d…
1. To form a single bus line, all the
outputs of the 4 buffers are connected
together.
2. The control input will now decide
which of the 4 normal inputs will
communicate with the bus line.
3. The decoder is used to ensure that
only one control input is active at a
time.
4. The diagram of a 3-state buffer can be
seen below.
12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 14
Memory Transfer
➢ The transfer of information from a memory word to the outside environment is
called read operation.
➢ The transfer of new information to be stored into the memory is called a write
operation.
➢ A memory word is symbolized by M. It is important to specify the address of M
when writing memory transfer operations.
Read: DR←M[AR]
➢ This causes a transfer of information into DR (Data Register) from the memory
word M selected by the address in AR (Address Register).
Write: M[AR]←R1
➢ This causes a transfer of information from R1 into the memory word M selected
by the address in AR.
12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 15
Arithmetic and Logic Micro operations
❑Arithmetic Micro operations :
➢The basic arithmetic micro operations are addition, subtraction, increment,
decrement and shift.
Symbolic Representation Description

R3 ← R1 + R2 The contents of R1 plus R2 are transferred to R3.

R3 ← R1 - R2 The contents of R1 minus R2 are transferred to R3.

R2 ← R2' Complement the contents of R2 (1's complement)

R2 ← R2' + 1 2's complement the contents of R2 (negate)

R3 ← R1 + R2' + 1 R1 plus the 2's complement of R2 (subtraction)

R1 ← R1 + 1 Increment the contents of R1 by one

R1 ← R1 - 1 Decrement the contents of R1 by one

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 16


Shift micro-operations
➢Shift micro operation are used for serial transfer of information.
➢They are also used in conjunction with arithmetic, logic, and other data
processing operations.
➢There are three types of shifts: logical, circular, and arithmetic

Table 4.3: Shift micro operations

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 17


Logical shift Micro-operation
❑A logical shift : It transfers the 0 zero through the serial input. We use the
symbols ‘<< or shl‘ for the logical left shift and ‘>> or shr‘ for the logical right
shift. Example, R1←shl R1, R2←shr R2
➢Logical Left Shift: one position moves each bit to the left one by one. The
Empty least significant bit (LSB) is filled with zero (i.e., the serial input), and the
most significant bit (MSB) is rejected.

➢Note: Every time we shift a number towards the left by 1 bit it multiplies that
number by 2.

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 18


Cont’d...
➢Logical Right Shift: each bit moves to the right one by one and the least
significant bit(LSB) is rejected and the empty MSB is filled with zero.
➢The right shift operator is denoted by the double right arrow key (>>).

➢Note: Every time we shift a number towards the right by 1 bit it divides that
number by 2.

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 19


Arithmetic Shift Micro-operation
➢An arithmetic shift is a microoperation that shifts a signed binary number to the
left or right.
❑Arithmetic Left Shift: each bit is moved to the left one by one. The empty least
significant bit (LSB) is filled with zero and the most significant bit (MSB) is
rejected like left logical shift.
❑Arithmetic Right Shift: each bit is moved to the right one by one and the least
significant(LSB) bit is rejected and the empty most significant bit(MSB) is filled
with the value of the previous MSB..

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 20


Circular Shift Micro-operation
➢The circular shift circulates the bits in the sequence of the register around both
ends without any loss of information.
❑Circular Left Shift: each bit in the register is shifted to the left one by one.
➢After shifting, the LSB becomes empty, so the value of the MSB is filled in
there.

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 21


Cont’d...
❑Circular Right Shift: each bit in the register is shifted to the right one by one.
➢After shifting, the MSB becomes empty, so the value of the LSB is filled in
there.

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 22


END OF CHAPTER -FOUR

12/25/2024 COMPUTER ORGANIZATION AND ARCHITECTURE SET BY GIZACHEW B. MTU DEPARTMENT OF CS 23

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