Unit – II

U n i t I I: A dd re s s i n g M o de s & I n s t ru c t i o n S e t s of 80 8 6

1. Overview of 8086 Instruction Set

The 8086 instructions are of following types.

a) Data Copy/Transfer Instructions

These types of instructions are used to transfer data from source operand to destination operand.
Store, Move, Load, Exchange, Input and Output instructions belong to this category of instructions.

b) Arithmetic and Logical Instructions

These instructions perform arithmetic and logical operations on operand. All the instructions
performing arithmetic, logical, increment, decrement, compare and scan instructions belong to this
category of instructions.

c) Branch Instructions
These instructions transfer control of execution to the specified address. All the call jump, interrupt
and return instructions belong to this category of instructions.

d) Loop Instructions
If the instructions have REP prefix with CX used as count register, they can be used to implement
unconditional and conditional loops. The LOOP, LOOPNZ and LOOPZ instructions belong to this category.
These are useful to implement different loop structures.

e) Shift and Rotate Instructions

These instructions involve the bitwise shifting or rotation in either direction with or without a count
in CX.

f) String Instructions
These instructions involve various string manipulation operations like load, move, scan, compare,
store, etc. These instructions are to be operated only upon the strings data type.
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g) Machine Control Instructions

These instructions control the machine status. NOP, HLT, WAIT and LOCK instructions belong to
this category of instructions.

g) Flag Manipulation Instructions:

All the instructions which directly affect the flag register, come under this group of instructions.
Instructions like CLD, STD, CLI, STI, etc. belong to this category of instructions.

Question 1: What do you mean by Addressing modes? With suitable example

explain all Memory Operand Addressing Modes. (W-12/7M)
Question 2: Explain various 8086 addressing modes for sequential instructions
giving example. (W-13/7M)
Question 3: Explain the following 8086 addressing modes giving examples.
i) Relative Based Indexed. ii) Intersegment Indirect.
iii) Register Indirect. (S-13/6M)
Question 4: What are the addressing modes? Explain in detail each with suitable
example. (S-12/10M)

2. Addressing Modes of 8086

Addressing mode indicates a way of locating data or operands. Depending upon the data types used
in the instruction and the memory addressing modes, any instruction may belong to one or more
addressing modes whereas some instruction may not belong to any of the addressing modes.
The addressing modes describe the types of operands and the way they are accessed for executing
an instruction. According to the flow of instruction execution, the instructions may be categorized as
1. Sequential control flow instructions and
2. Control transfer instructions.

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Sequential control flow instructions are the instructions which after execution, transfer control to the
next instruction appearing immediately after it (in the sequence) in the program. For example, the arithmetic,
logical, data transfer and processor control instructions are sequential control flow instructions.
The control transfer instructions transfer control to some predefined address or the address specified in
the instruction, after their execution. For example, INT, CALL, RET and JUMP instructions fall under this
category.

a) Immediate Addressing Mode

In this type of addressing mode, immediate data is a part of instruction, and appear in the form of
successive 8-bit (byte) or 16-bit (Word).
Example:
MOV AX, 0005H
In the above example, 0005H is the immediate data. The immediate data may be 8-bit or 16-bit in
size. The instruction will move the data 0005H into 16-bit register AX.

b) Direct Addressing Mode

In the direct addressing mode, a 16-bit memory address (offset) is directly given in the instruction as
a part of it. ,
Example:
MOV AX, [5000H]
In the above example, data resides in a memory location in the data segment, whose physical
address may be computed using the offset address and content of DS as segment address.
Consider the data segment DS = 1000H and offset address 5000H then physical address will be
calculated as 10H * DS + 5000H, which is 15000H and the data from memory location 15000H and 15001H
will move to 16-bit destination AX register as shown in Figure 1.
10000H DS*10H Address Memory MOV AX, [5000H]
+5000H Offset Address in 15000H 74 AH AL
15000H Physical Address 15001H 86 86 74
AX

Figure 1: Example of Direct Addressing Mode

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c) Register Addressing Mode

In register addressing mode, the data is stored in a register and it is referred/accessed using the
particular register. All the registers, except IP, may be used in this addressing mode.
Example: MOV AX, BX
In the above example, data present in source register BX will be move into the destination register
AX.

d) Register Indirect Addressing Mode

Sometimes, the address of the memory location which contains data or operand is determined in an
indirect way, using the offset registers. This mode of addressing is known as register indirect addressing
mode.
In this addressing mode, the offset address of data is either in BX or SI or DI register. The default
segment is either DS or ES. The data is supposed to be available at the address pointed by the content of
any of the above registers in the default data segment register.
Example:
MOV AX, [BX]
In the above example, data is present in a memory location DS whose offset address is in BX. If the
content of BX = 2000H and DS = 5000H, then the physical address will be calculated as 10H * DS + [BX],
which is 52000H and data at this memory location will be moved into 16-bit AX register as shown in Figure
2.
50000H DS*10H Address Memory MOV AX, [BX]
+2000H Offset Address in BX 52000H 74 AH AL
52000H Physical Address 52001H 86 86 74
AX

Figure 2: Example of Register Indirect Addressing Mode

e) Indexed Addressing Mode

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In this addressing mode, offset of the operand is stored in one of the index registers. DS and ES are
the default segments for index registers SI and DI. This mode is a special case of the above discussed
register indirect addressing mode.
Example:
MOV AX, [SI]
In the above example, if DS = 4000H, SI = 2000H is given, then the physical address is calculated as
10H * DS + [SI], which is 42000H and data at this memory location will be moved into 16-bit AX register as
shown in Figure 3.
40000H DS*10H Address Memory MOV AX, [SI]
+2000H Offset Address in BX 42000H 74 AH AL
42000H Physical Address 42001H 86 86 74
AX

Figure 3: Example of Indexed Addressing Mode

f) Based Addressing Mode

In this addressing mode, the physical address of the operand is obtained by adding a direct or
indirect displacement to the contents of either base register BX or base pointer register BP. The default
segment register may be ES or DS.
Example:
MOV AX, 50H [BX]
OR MOV AX, [BX+50H]
In the above example, if DS = 4000H, BX = 2000H is given, then the physical address is calculated as
10H * DS + [BX] + 50H, which is 42050H and data at this memory location will be moved into 16-bit AX
register as shown in Figure 4.
40000H DS*10H Address Memory MOV AX, 50H [BX]
+2000H Offset Address in BX 42050H 74 AH AL
+ 50H Displacement 42051H 86 86 74
42050H Physical Address AX

Figure 4: Example of Based Addressing Mode

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g) Based Indexed Addressing Mode

In this addressing mode, the physical address of data is formed by adding content of a base register
(any one of BX or BP) to the content of an index register (any one of SI or DI). The default segment register
may be ES or DS.
Example:
MOV AX, [BX][SI]
OR MOV AX, [BX + SI]
In the above example, BX is the base register and SI is the index register. If DS = 0400H, BX =
2000H, SI = 3000H is given, then the physical address is calculated as 10H * DS + [BX] + [SI], which is
09000H and data at this memory location will be moved into 16-bit AX register as shown in Figure 5.
04000H DS*10H Address Memory MOV AX, [BX][SI]
+2000H Offset Address in BX 09000H 74 AH AL
+3000H Offset Address in SI 09001H 86 86 74
09000H Physical Address AX

Figure 5: Example of Based Indexed Addressing Mode

h) Relative Based Indexed Addressing Mode

In this addressing mode, the effective address is formed by adding an 8 or 16-bit displacement with
the sum of contents of any one of the base registers (BX or BP) and any one of the index registers. The
default segment register may be ES or DS.
Example:
MOV AX, 50H [BX] [SI]
OR MOV AX, [BX + SI + 50H]
In the above example, 50H is an immediate displacement, BX is a base register and SI is an index
register. If DS = 0400H, BX = 2000H, SI = 3000H is given, then the physical address is computed as 10H * DS
+ [BX] + [SI] + 50H, which is 09050H and data at this memory location will be moved into 16-bit AX register
as shown in Figure 6.
04000H DS*10H Address Memory MOV AX, 50H[BX][SI]
+2000H Offset Address in BX 09050H 74 AH AL

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+3000H Offset Address in SI 09051H 86 86 74

+ 50H Displacement AX
09050H Physical Address

Figure 6: Example of Relative Based Indexed Addressing Mode

* The term effective address and physical address are same

i) Comparison of Addressing Modes of 8086

Example Addressing Mode of 8086
MOV AX, 0005H Immediate Addressing Mode
MOV AX, [5000H] Direct Addressing Mode
MOV AX, BX Register Addressing Mode
MOV AX, [BX] Register Indirect Addressing Mode
MOV AX, [SI] Indexed Addressing Mode
MOV AX, 50H [BX] Based Addressing Mode
MOV AX, [BX][SI] Based Indexed Addressing Mode
MOV AX, 50H [BX] [SI] Relative Based Indexed Addressing Mode

3. 8086 Instruction Formats

A machine language instruction format has one or more number of fields associated with it. The first
field is called as operation code field or opcode field, which indicates the type of the operation to be
performed by the CPU.
The instruction format also contains other fields known as operand fields. The CPU executes the
instruction using the information which resides in these fields.

a) Types of Instructions Format

The length of an instruction may vary from one byte to six bytes. There are six general formats of
instructions in 8086 instruction set.
1. One byte Instruction
2. Register to Register
3. Register to/from Memory with no Displacement
4. Register to/from Memory with Displacement

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5. Immediate Operand to Register

6. Immediate Operand to Memory with 16-bit Displacement

i) One byte Instruction

This format is 1 byte long and may have the implied data or register operands. The least significant
3-bits of the opcode are used for specifying the register operand, if any. Otherwise, all the 8-bits form an
opcode and the operands are implied.

ii) Register to Register

This format is 2 bytes long. The first byte of the code specifies the operation code and width of the
operand is specified by w bit. The second byte of the code shows the register operands and R/M field, as
shown below.
D7 D1 D7 D6 D5 D4 D3 D2 D1 D0
OPCODE W 11 REG R/M

The register represented by the REG field is one of the operands. The R/M field specifies another
register or memory location, i.e. the other operand.

iii) Register to or from Memory with no Displacement

This format is 2 bytes long and similar to the register to register format except for the mode of
addressing (MOD) field as shown below.
D7 D1 D7 D6 D5 D4 D3 D2 D1 D0
OPCODE W MOD REG R/M
The MOD field shows the mode of addressing. The MOD, R/M, REG and the W fields are decided
from the following table. To find out the MOD and R/M fields of a particular instruction, one should first
decide the addressing mode of the instruction. The addressing mode depends upon the operands and
suggests how the physical address may be computed for locating the operand, if it lies in memory. The
different addressing modes of the 8086 instructions are listed in following table. The R/M column and
addressing mode row element specifies the R/M field, while the addressing mode column specifies the
MOD field.
Operands Memory Operands
No Displacement Displacement 8-bit Displacement 16-bit Register Operands

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MOD 11
R/M 00 01 10 W=0 W=1
000 (BX) + (SI) (BX) + (SI) + D8 (BX) + (SI) + D16 AL AX
001 (BX) + (DI) (BX) + (DI) + D8 (BX) + (DI) + D16 CL CX
010 (BP) + (SI) (BP) + (SI) + D8 (BP) + (SI) + D16 DL DX
111 (BP) + (DI) (BP) + (DI) + D8 BL BX
100 (SI) (SI) + D8 (SI) + D16 AH SP
101 (DI) (DI) + D8 (DI) + D16 CH BP
110 D16 (BP) + D8 (BP) + D16 DH SI
111 (BX) (BX) + D8 (BX) + D16 BH DI
Table: Addressing Modes and the Corresponding MOD, REG and R/M Fields

iv) Register to or from Memory with Displacement

This type of instruction format contains one or two additional bytes for displacement along with
2-byte. The format of the register to or from memory without displacement is shown below.

D7 D0 D7 D0
D7 D0 D7 D6 D5 D4 D3 D2 D1 D0 Low Byte of Higher Byte of
OPCODE MOD REG R/M Displacement Displacement

v) Immediate Operand to Register

In this format, the first byte and the 3-bits from the second byte which are used for REG field in case
of register to register format is used for opcode. It also contains one or two bytes of immediate data. The
complete instruction format is as shown below.
D7 D0 D7 D0
D7 D0 D7 D6 D5 D4 D3 D2 D1 D0 Low Byte Higher Byte
OPCODE 11 OP-CODE R/M DATA DATA

vi) Immediate Operand to Memory with 16-bit Displacement

This type of instruction format requires 5 or 6 bytes for coding. The first 2 bytes contain the
information regarding OPCODE, MOD, and R/M fields. The remaining 4 bytes contain 2 bytes of
displacement and 2 bytes of data as shown below.
D7 D0
D7 D0 D7 D6 D5 D4 D3 D2 D1 D0 Low Byte of

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OPCODE 11 OP-CODE R/M Displacement

The opcode appears in the first byte, but in a few instructions, a register destination is in the first
byte and few other instructions may have their 3-bits of opcode in the second byte. The opcodes have the
single bit indicators. Their definitions and significances are as follows:
1. W-bit: This indicates whether the instruction is to operate over a 8-bit or 16-bit data/operands. If W
bit is 0, the operand is of 8-bits and if W is 1, the operand is of 16-bits.
2. D-bit: This is valid in case of double operand instructions. One of the operands must be a register
specified by the REG field. The register specified by REG is source operand if D = 0, else, it is a
destination operand.
3. S-bit: This bit is called as sign extension bit. The S bit is used along with W-bit to show the type of
the operation. For example,
 8-bit operation with 8-bit immediate operand is indicated by S = 0, W = 0;
 16-bit operation with 16-bit immediate operand is indicated by S = 0, W = 1 and
 16-bit operation with a sign extended immediate data is given by S = 1, W = 1
4. V-bit: This is used in case of shift and rotates instructions. This bit is set to 0, if shift count is 1 and is
set to 1, if CL contains the shift count.
5. Z-bit: This bit is used by REP instruction to control the loop. If Z bit is equal to 1, the instruction with
REP prefix is executed until the zero flag matches the Z bit.
The REG code of the different registers (either as source or destination operands) in the opcode byte
are assigned with binary codes. The segment registers are only 4 in number, hence 2 binary bits will be
sufficient to code them.
The other registers are 8 in number, so at least 3-bits will be required for coding them. To allow the
use of 16-bit registers as two 8-bit registers they are coded with W bit as shown in following table.
W-bit Register Address Registers Segment 2 bit Register Segment
0 (code)
000 AL (code) Register
0 001 CL 00 ES
0 010 DL 01 CS
0 011 BL 10 SS
0 100 AH 11 DS
0 101 CH
0 110 DH

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0 111 BH
1 000 AX
1 001 CX
1 010 DX
1 011 BX
1 100 SP
1 101 BP
1 110 SI
1 111 DI
Table: Assignment ....;
.... of Codes with Different Registers
When a data is to be referred as an operand, DS is the default data segment register for all
addressing modes. CS is the default code segment register for storing program codes (executable codes).
SS is the default segment register for the stack data accesses and operations. ES is the default segment
register for the destination data storage.
All the segments available can be read or written as data segments by newly defining the data seg-
ment as required. There is no physical difference in the memory structure or no physical separation
between the segment areas.

Question 5: Explain 8086 XCHG instructions giving example (W-13/2M)

4. Data Transfer Instructions

The data-transfer instructions are provided to move data either between its internal registers or
between an internal register and a storage location in memory. This group includes:
1. Move byte or word (MOV) instruction
2. Exchange byte or word (XCHG) instruction
3. Translate byte (XLAT) instruction
4. Load effective address (LEA) instruction
5. Load data segment (LDS) instruction and Load extra segment (LES) instruction.
6. IN and OUT instruction

a) MOV Instruction

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It transfers data from one register/memory location to another register/memory location. The
source may be any one of the segment registers or other general purpose registers or special purpose
registers or a memory location and, another register or memory location may act as destination.
Syntax:
MOV DESTINATION, SOURCE
where, MOV – Instruction symbol to perform move
DESTINATION and SOURCE – destination and source operands
Following table shows the valid source and destination operand combinations.
Destination Source
Memory Accumulator
Accumulator Memory
Register Register
Register Memory
Memory Register
Register Immediate
Memory Immediate
Segment-Register REG16
Segment-Register Memory
REG16 REG16
Memory Segment-Register

In case of immediate addressing mode, a segment register cannot be a destination register. In other
words, direct loading of the segment registers with immediate data is not permitted.
To load the segment registers with immediate data, one will have to load any general purpose
register with the data. Then it has to be moved to that particular segment register. The following example
instructions explain the fact.
Example:
Load DS with 5000H
1. MOV DS, 5000H ; Not permitted (invalid)
Thus to transfer an immediate data into the segment register, the correct procedure is given below.
MOV AX, 5000H
MOV DS, AX
2. MOV AX, 5000H ; Immediate Addressing
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Move the immediate data 5000H to the destination register AX.

3. MOV AX, BX ; Register Addressing
Move the content of source register BX to the destination register AX.
4. MOV AX, [SI] ; Indirect Addressing
Move the immediate data 5000H to the destination register AX.
5. MOV AX, [2000H] ; Direct Addressing
Move the content of memory location 2000H to the destination register AX.
6. MOV AX, 50H[BX] ; Based relative Addressing, 50H Displacement

b) XCHG: Exchange
This instruction exchanges the contents of the specified source and destination operands, which
may be registers or one of them may be a memory location. But, exchange of data contents of two memory
locations is not permitted.
Syntax:
XCHG DESTINATION, SOURCE
where, XCHG – Instruction symbol to perform exchange of data
DESTINATION and SOURCE – destination and source operands
Following table shows the valid source and destination operand combinations.
Destination Source
Accumulator REG16
Memory Register
Register Register
Register Memory
Example:
XCHG [5000H], AX
This instruction exchanges data between AX and a memory location [5000H] in the data segment.
XCHG BX, AX
This instruction exchanges data between AX and BX. If AX = 1234H and BX = 5678H then after
execution of the above instruction the content of AX = 5678H and BX = 1234H.

c) LEA: Load Effective Address

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The instruction loads the offset of an operand in the specified register. This instruction is more
useful for assembly language rather than for machine language.
Syntax:
LEA DESTINATION, SOURCE
where, LEA – Instruction symbol to load effective address.
DESTINATION and SOURCE – destination and source operands
Example:
Suppose a label ADR is used in an assembly language program. The instruction LEA BX, ADR loads
the offset of the label ADR in BX.

d) LDS (Load register with DS) and LES (Load register with ES)
These instructions are used to load two 16-bit register from 4-byte block of memory. The first two
bytes are copied into destination register and next two bytes are copied into corresponding segment
register.
These instructions are useful when we want to load segment and offset value by using single
instruction. In string instruction we use these instructions to load source string address (DS:SI) and
destination string address (ES : DI) using single instruction.
Syntax:
LDS DESTINATION, SOURCE
LES DESTINATION, SOURCE
where, LDS/LES – Instruction symbol to perform operation.
DESTINATION and SOURCE – destination and source operands
Example:
Address Memory
LDS AX, 5000H 5000H AA 15 8 7 0
5001H BB BB AA
AX
Example:
Address Memory
LES AX, 5000H 5002H mm 15 8 7 0
5003H nn nn mm
DS/ES
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e) XLAT: Translate
It is used for finding out the codes in case of code conversion problems, using lookup table
technique.
Syntax:
XLAT
Suppose, a hexadecimal keypad having 16 keys from 0 to F is interfaced with 8086 using 8255.
Whenever a key is pressed, the code of that key (0 to F) is returned in AL. For displaying the number
corresponding to the pressed key on the 7-segment display device, it is required that the 7-segment code
corresponding to the key pressed is found out and sent to the display port. This translation from the code of
the key pressed to the corresponding 7-segment code is performed using XLAT instruction.
For this purpose, one is required to prepare a lookup table of codes, starting from an offset say
2000H, and store the 7-segment codes for 0 to F at the locations 2000H to 200FH sequentially.
For executing the XLAT instruction, the code of the pressed key obtained from the keyboard (i.e. the
code to be translated) is moved in AL and the base address of the lookup table containing the 7-
segment codes is kept in BX. After execution of the XLAT instruction, the 7-segment code corresponding to
the pressed key is returned in AL, replacing the key code which was in AL prior to the execution of the XLAT
instruction.
To find out the exact address of the 7-segment code from the base address of lookup table, the
content of AL is added to BX internally, and the contents of the address pointed to by this new content of
BX in DS are transferred to AL. The following sequence of instructions performs the task.
MOV AL, SEG TABLE ; Address of the segment containing look-up-table
MOV DS, AL ; is transferred in DS.
MOV AL, CODE ; Code of the pressed key is transferred in AL.
MOV BX, OFFSET TABLE ; Offset of the code look-up-table in BX.
XLAT ; Find the equivalent code and store in AL.
In above example, if AL = 05H, DS = 0500H and the offset address is 2000H (content of B register),
Figure 7 shows the how the XLAT instruction convert the equivalent number and store in AL register.

05000H DS * 10 Address Memory

+2000H BX 7002H B 7 0

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+ 5H AL 7003H C E
07005H 7004H D AL
7005H E
7006H F
Figure 7: Example of XLAT Instruction

f) IN: Input the port

This instruction is used for reading data from input port. The address of the input port may be
specified in the instruction directly or indirectly. AL and AX are the allowed destinations for 8 and 16-bit
input operations. DX is the only register (implicit) which is allowed to carry the port address.
Syntax:
IN ACCUMULATOR, PORT
where, IN – Instruction symbol for reading input from port.
ACCUMULATOR – destination operands (AX or AL)
PORT – address of port from where the data is to be read
Example:
IN AL, 0300H
This instruction reads data from an 8-bit port whose address is 0300H and stores it in AL.
IN AX
This instruction reads data from a 16-bit port whose address is in DX (implicit) and stores it in AX.

g) OUT: Output to the Port

This instruction is used for writing data to an output port. The address of the output port may be
specified in the instruction directly or implicitly in DX. Contents of AX or AL are transferred directly or
indirectly to addressed port after execution of this instruction. The data to an odd address port is
transferred on D8-D15 while that to an even addressed port is transferred on D0-D7. The registers AL and AX
are the allowed source operands for 8-bit and 16-bit operations.
Syntax:
OUT PORT, ACCUMULATOR
where, OUT – Instruction symbol for writing output to port.
ACCUMULATOR – source operand (AX or AL)

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PORT – address of port where to write data.

Example:
OUT 0300H, AL ; This sends data available in AL to a port whose address is 0300H.
OUT AX ; This sends data available in AX to a port whose address is
; specified implicitly in DX.

Question 5: Explain the following 8086 instructions giving example:

i) NEC (S-13/2M) ii) IMUL (S-13/2M)
iii) SBB (W-13/2M) iv) DIV (W-13/6M)

5. Arithmetic Instructions
Arithmetic instructions perform the arithmetic operations, like addition, subtraction, multiplication
and division along with the respective ASCII and decimal adjust instructions. The increment and decrement
operations also belong to this type of instructions.
The arithmetic instructions affect all the condition code flags. The operands are either the registers
or memory locations or immediate data depending upon the addressing mode.

a) ADD: (Add Byte or Word)

It adds an immediate data or contents of a memory location specified in the instruction or a source
register to the contents of another destination register or memory location. The result is in the destination
operand.
Both the source and destination operands cannot be memory operands i.e. memory to memory
addition is not possible. Also the contents of the segment registers cannot be added using this instruction.
All the condition code flags are affected, depending upon the result.
Syntax:
ADD DESTINATION, SOURCE
Example:
ADD AX, BX ; AX ←AX + BX
This instruction will add the content of register AX and BX and store the result in the destination
register AX. If AX = 1234H and BX = 1111H then after execution of the instruction AX will contain 2345H.
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ADD AX, 1000H ; AX ←AX + 1000H

This instruction will add the content of register AX and immediate data 1000H store the result in the
destination register AX. If AX = 1234H then after execution of the instruction AX will contain 2234H.

b) ADC: Add with Carry

It performs the same operation as ADD instruction, but adds the carry flag bit which may be set as a
result of the previous calculations to the result. All the condition code flags are affected by this instruction.
Syntax:
ADC DESTINATION, SOURCE
Example:
ADC AX, BX ; AX ←AX + BX + 1 (If CF is set)
This instruction will add the content of register AX and BX and check the status of the carry flag (CF)
and if it is set to 1 then 1 is added to the result of addition otherwise it will store the result in the destination
register AX. If AX = 1234H, BX = 1111H and CF is set to 1 then after execution of the instruction AX will
contain 2346H.

c) INC: Increment
It increment the contents of the specified register or memory location by 1. All the condition code
flags are affected except the carry flag CF. This instruction adds 1 to the contents of the operand.
Immediate data cannot be operand of this instruction.
Syntax:
INC DESTINATION
Example:
INC AX ; Similar to ADD AX, 1 (i.e. AX ←AX + 1)
This instruction will increment the content of register AX by 1. If AX = 1234H, then after the execution
of instruction AX will contain 1235H.

d) SUB: (Subtract Byte or Word)

It subtracts the source operand from the destination operand and the result is stored in the
destination operand. Source operand may be a register, memory location or immediate data and the

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destination operand may be a register or a memory location, but source and destination operands both
must not be memory operands. Destination operand can not be an immediate data. All the condition code
flags are affected by this instruction.
Syntax:
SUB DESTINATION, SOURCE
Example:
SUB AX, BX ; AX ←AX – BX
This instruction will subtract the content of register BX from AX and store the result in the
destination register AX. If AX = 4321H and BX = 1111H then after execution of the instruction AX will contain
3210H.
SUB AX, 1000H ; AX ←AX – 1000
This instruction will subtract the immediate data 1000H from content of register AX and store the
result in the destination register AX. If AX = 1234H then after execution of the instruction AX will contain
0234H.

e) SBB: Subtract with Borrow

It subtracts the source operand and the borrow flag (CF) which may reflect the result of the previous
calculations, from the destination operand. Subtraction with borrow means subtracting 1 from the sub-
traction obtained by SUB, if carry (borrow) flag is set. The result is stored in the destination operand. All the
flags are affected by this instruction.
Syntax:
SBB DESTINATION, SOURCE
Example:
SBB AX, BX ; AX ←AX – BX – 1 (If CF is Set)
This instruction will subtract the content of register BX from AX and check the status of the borrow
flag (CF) and if it is set to 1, then 1 is subtracted from the result of subtraction otherwise it will store the
result in the destination register AX. If AX = 1234H, BX = 1000H and CF is set to 1 then after execution of the
instruction AX will contain 0233H.

f) DEC: Decrement

42 Assembly Language Programming

 Unit – II

It decrements the content of the specified register or memory location by 1. All the condition code
flags except carry flag are affected depending upon the result. Immediate data cannot be operand of the
instruction.
Syntax:
DEC DESTINATION
Example:
DEC AX ; Similar to SUB AX, 1 (i.e. AX ←AX – 1)
This instruction will decrement the content of register AX by 1. If AX = 1234H, then after the execution
of instruction AX will contain 1233H.

g) MUL: (Unsigned Multiplication Byte or Word)

It multiplies an unsigned byte or word by the contents of AL. The unsigned byte or word may be in
any one of the general purpose registers or memory locations. The most significant word of the result is
stored in DX, while the least significant word of the result is stored in AX.
All the flags are modified depending upon the result. Immediate operand is not allowed in this
instruction. If the most significant byte or word of the result is '0', then carry flag and overflow flag both will
be set.
Syntax:
MUL SOURCE
Example:
MUL BH ; (AX) ←(AL) × (BH)
This instruction will multiply the content of register BH with AL and store the result into the AX
register. IF AL = 80H and BL = 20H then after the execution of instruction the register AX will contain 1000H.
MUL CX ; (DX)(AX) ←(AX) × (CX)

h) IMUL: (Signed Multiplication)

It multiplies a signed byte in source operand by a signed byte in AL or signed word in source operand
by signed word in AX. The source can be a general purpose register, memory operand, index register or
base register, but it cannot be an immediate data. In case of 32-bit results, the higher order word (MSW) is
stored in DX and the lower order word is stored in AX.

Assembly Language Programming 43

Unit – II

The AF, PF, SF, and ZF flags are undefined after IMUL. If AH and DX contain parts of 16 and 32-bit
result, CF and OF both will be set. The AL and AX are the implicit operands in case of 8 bits and 16 bits
multiplications. The unused higher bits of the result are filled by sign bit and CF, AF are cleared.
Syntax:
IMUL SOURCE
Example:
IMUL BH ;(AX) ←(AL) × (BH)

i) DIV: (Unsigned Division)

It performs unsigned division. It divides an unsigned word or double word by a 16-bit or 8-bit
operand. The dividend must be in AX for 16-bit operation and divisor may be specified using any one of the
addressing modes except immediate. The result will be in AL (quotient) while AH will contain the
remainder.
If the result is too big to fit in AL, type 0 (divide by zero) interrupt is generated. In case of a double
word dividend (32-bit), the higher word should be in DX and lower word should be in AX. The quotient will
be in AX and the remainder DX. This instruction does not affect any flag.
Syntax:
DIV DESTINATION
Example:
DIV BL
This instruction will divide the content of register AX by BL and the result will be in AL (quotient)
while AH will contain the remainder. If AX = 2711H and BL = 32H then after the execution of instruction the
register AL will contain C8H and AH will contain 01H.

j) IDIV: Signed Division

It performs the same operation as the DIV instruction, but with signed operands. The results are
stored similarly as in case of DIV instruction in both cases of word and double word divisions. The results will
also be signed numbers. The operands are also specified in the same way as DIV instruction.
Divide by 0 interrupt is generated, if the result is too big to fit in AX (16-bit dividend operation) or AX
and DX (32-bit dividend operation). All the flags are undefined after IDIV instruction.

44 Assembly Language Programming

 Unit – II

Syntax:
IDIV DESTINATION
Example:
IDIV BL

k) NEG: Negate
It forms 2's complement of the specified destination in the instruction. For obtaining 2's
complement, it subtracts the contents of destination from zero. The result is stored back in the destination
operand which may be a register or a memory location.
If overflow flag (OF) is set, it indicates that the operation could not be completed successfully. This
instruction affects all the condition code flags.
Syntax:
NEG DESTINATION
Example:
NEG BX
This instruction will negate the content of BX register and store them in BX register. If
BX = 0003AH then after the execution of instruction, AL will content FFC6H which s 2’s complement of
003AH as:
(BX) = 000016 – (BX) = 0000 + 2’Complement of 003A16 = 000016 + FFC616 = FFC616

l) CBW: Convert Signed Byte to Word

It converts a signed byte to a signed word. The byte to be converted must be in AL. The result will be
in AX. It does not affect any flag.
Syntax:
CBW
Example:
MOV AL, 00A1H
CBW
These instructions will the convert the content of register AL from byte to word. The first instruction
loads AL with 00A1H. This gives

Assembly Language Programming 45

Unit – II

(AL) = 00A116 = A116 = 1010 00012

Executing the second instruction extends the most significant bit of AL, 1 into all bits of AH. The result is
(AH) = 1111 11112 = FF16
or (AX) = 1111 1111 1010 00012 = FFA116
m) CWD: Convert Signed Word to Double Word
It converts a signed word to a double word. The word to be converted must be in AX. The result will
be in (DX)(AX). It does not affect any flag.
Syntax:
CWD
Example:
MOV AX, FFA1H
CWD
Above instruction will the convert the content of register AX from word to double word. The first
instruction loads AX with FFA1H. This gives
(AX) = FFA116 = 1111 1111 1010 00012
Executing the second instruction extends the most significant bit of AX, 1 into all bits of DX. The result is
(DX) = 1111 1111 1111 11112 = FFFF16

n) DAA: (Decimal Adjust After Addition)

It is used to convert the result of the addition of two packed BCD numbers to a valid BCD number.
The result has to be only in AL. If the lower nibble is greater than 9, after addition or if AF is set, it will add
06 to the lower nibble in AL. After adding 06 in the lower nibble of AL, if the upper nibble of AL is greater
than 9 or if carry flag is set, DAA instruction adds 60H to AL. The instruction DAA affects AF, CF, PF, and ZF
flags. The OF is undefined.
Syntax:
DAA
Example:
If AL = 53, CL = 29
ADD AL, CL ; AL ←(AL) + (CL) ←53 + 29 ←7C
DAA ; AL ←7C + 06 (as C > 9) ←82

46 Assembly Language Programming

 Unit – II

o) DAS: (Decimal Adjust After Subtraction)

It is used convert the result of subtraction of two packed BCD numbers to a valid BCD number. The
subtraction has to be in AL only. If the lower nibble of AL is greater than 9, this instruction will subtract 06
from lower nibble of AL. If the result of subtraction sets the carry flag or if upper nibble is greater than 9, it
subtracts 60H from AL. This instruction modifies the AF, CF, SF, PF and ZF flags. The OF is undefined after
DAS instruction.
Syntax:
DAS
Example:
If AL = 75, BH = 46
SUB AL, BH ; AL ←(AL) – (BH) ←75 – 46 ←2F and AF = 1 (Auxiliary Flag)
DAS ; AL ←2F – 06 (as F > 9) ←29

p) AAA: (ASCII Adjust After Addition)

Sometime we need to add two ACSII numbers together. We know that the ASCII values of 0 to 9 are
from 30H to 39H. Addition of two ASCII codes does not give correct ASCII result. For example, if we add
34H (ASCII code for 4) with 38H (ASCII code for 8) gives result 6CH, which is not correct ASCII value.
It is executed after an ADD instruction that adds two ASCII coded operands to give a byte of result in
AL and converts the result of AL into decimal digits. After the addition, it examines the lower 4 bits of AL to
check whether it contains a valid BCD number in the range 0 to 9. If it is between 0 to 9 and AF is zero, it
sets the 4 high order bits of AL to 0; The AH must be cleared before addition.
If the lower digit of AL is between 0 to 9 and AF is set, 06 is added to AL. The upper 4 bits of AL are
cleared and AH is incremented by one. If the value in the lower nibble of AL is greater than 9 then the AL is
incremented by 06, AH is incremented by 1, the AF and CF flags are set to 1, and the higher 4 bits of AL are
cleared to 0. The remaining flags are unaffected.
Syntax:
AAA
Example:
ADD AL, BL ; AL ←AL + BL
AAA

Assembly Language Programming 47

Unit – II

Assume AL = 3216 (ASCII code for number 2), BL = 3416 (ASCII code for number 4) and AH = 00H.
Executing ADD instruction gives:
(AL) ←(AL) + (BL) = 3216 + 3416 = 6616
The result is adjusted to give its equivalent decimal number. This is done by executing the AAA instruction.
The equivalent of adding 2 and 4 is decimal 6 with no carry. Therefore, the result after the AAA instruction
is
(AL) = 0616 and (AH) = 0016
and both AF and CF remain cleared.
q) AAS: (ASCII Adjust After Subtraction)
It corrects the result in AL register after subtracting two ASCII operands and stores the result in
decimal format. If the lower 4 bits of AL register are greater than 9 or if the AF flag is 1, the AL is
decremented by 6 and AH is decremented by 1, the CF and AF are set to 1. Otherwise, the CF and AF are set
to 0, the result needs no correction. As a result, the upper nibble of AL is 00 and the lower nibble may be any
number from 0 to 9.
Syntax:
AAS
Example:
SUB AL, BL ; AL ←AL – BL
AAS
Assume AL = 3416 (ASCII code for number 4), BL = 3216 (ASCII code for number 2) and AH = 00H.
Executing SUB instruction gives:
(AL) ←(AL) – (BL) = 3416 – 3216 = 0216
The result is adjusted to give its equivalent decimal number. This is done by executing the AAS instruction.
The equivalent of subtracting 2 from 4 is decimal 2 with no borrow. Therefore, the result after the AAS
instruction is
(AL) = 0216 and (AH) = 0016
and both AF and CF remain cleared.

r) AAM : (ASCII Adjust for Multiplication)

48 Assembly Language Programming

 Unit – II

This instruction is used to adjust the result of a MUL instruction so that result can be translated into
ASCII characters. It converts the product available in AL into unpacked BCD format. The lower byte of
result (unpacked) remains in AL and the higher byte of result remains in AH.
Syntax:
AAM
Example:
MOV AL, 5D ; AL ←5DH
MOV BL, 08 ; BL ←08H
MUL BL ; AX ←AL × BL ←02E8H
AAM ; Contents of AX will be divided by A(10). Quotient 5 will be in AH and
; remainder 6 will be in AL. So AX = 0506H which is ASCII AAM
s) AAD: (ASCII Adjust for Division)
It converts two unpacked BCD digits in AH and AL to the equivalent binary number in AL. This
adjustment must be made before dividing the two unpacked BCD digits in AX by an unpacked BCD byte.
PF, SF, ZF are modified while AF, CF, OF are undefined, after the execution of the instruction AAD.
Syntax:
AAD
Example:
In the instruction sequence, this instruction appears before DIV instruction, unlike AAM which
appears after MUL. If AX = 0508H unpacked BCD for 58 decimal, and BL = 02H.
MOV AX, 0508 ; AX = 0508H
MOV BL, 02 ; BL = 02H
AAD ; It adjust the contents of AX into equivalent hexadecimal number so
; AX = 003AH after the execution (3A is the hexadecimal equivalent ; ;
of 58 decimal)
DIV BL ; to perform division

Solution to Questions asked in University Examination

Question 1: Assuming that the contents of registers of BX and CX are 123416 and 012316,
respectively, and the carry flag is 0. What is the result of executing the following instruction?
Assembly SBB BX CX
Language Programming (S-13/7M) 49
Unit – II

Solution:
Since the instruction implements the operation
(BX) – (CX) – (CF)  (BX)
we get
(BX) = I23416– 012316 – 016
= 111116
Since no borrow was needed, the carry flag remains cleared.

Question 2: Write program to add a data byte located at offset 0500 H in 2000 H segment to
another data byte available at 0600 H in the same segment and store the result at 0700 H in
the same segment. (W-13/6M)

Solution: Start

The flow chart for this problem may be drawn as shown in Figure.
Initialize Segment Register
MOV AX, 2000H ; Initializing DS with value 2000H
MOV DS, AX ;
Get content of 0500H in a
MOV AX, [500H] ; Get first data byte from 0500H offset General Purpose register
ADO AX, [600H] ; Add this to the second byte from 0600H
MOV [700H], AX ; Store AX in 0700H (result).
Perform Addition
HLT ; Stop

Store result in 0700H

Stop

Question 3: Write a program to move the contents of memory location 0500H to register BX
and to CX. Add immediate byte 05H to the data residing in memory location whose address is
computed using DS=2000H and offset=0600H. Store the result of addition in 0700H. Assume
that the data is located in the segment specified by the data segment register DS which
contains 2000H. (S-13/7M)

50 Assembly Language Programming

 Unit – II

Solution:
The flow chart for the program is shown in Figure. Start

MOV AX, 2000H

Move content of 0500H to BX
MOV DS, AX ; Initialize data segment register
MOV BX, [0500H] ; Get contents of 0500H in BX
Move content of BX to CX
MOV CX, BX ; Copy the same contents in CX
ADD [0600H], 05H ; Add byte 05H to contents of 0600H
Add immediate data 05H to
MOV DX, [0600H] ; Store the result in DX [0600H]
MOV [0700H], DX ; Store the result in 0700H
HLT ; Stop Store result in 0700H

Stop
After initializing the data segment register, the content of location 0500H are moved to the BX
register using MOV instruction. The same data is moved also to the CX register. For this data transfer, there
may be two options as shown.
(a) MOV CX, BX ; As the contents of BX will be
; same as 0500H after execution of MOV BX,[0500H].
(b) MOV CX, [0500H] ; Move directly from 0500H to register CX

Question 4: Write a program to add the contents of the memory location 2000H : 0500H to the
contents of 3000 H : 0600 H and store the result in 5000 H : 0700 H. (S-12/W-13/7M)

Solution:
Above program refers to the memory locations in different segments, thus, while referring to each
location, the data segment will have to be newly initialized with the required value. Figure shows the flow
chart. Start

MOV CX, 2000H ; Initialize DS at 2000H

Initialize DS at 2000H
MOV OS, CX
MOV AX, [500H] ; Get first operand in AX
Get content of 0500H in AX
MOV CX, 30OOH ; Initialize DS at 30OOH
MOV OS, CX Initialize DS at 3000H
Assembly Language Programming 51
Unit – II

MOV BX, [0600H] ; Get second operand in BX

ADD AX, BX ; Perform addition Get content of 0600H in BX
MOV CX, 5000H ; Initialize DS at 5000H
MOV OS, CX Add AX and BX

MOV [0700H], AX ; Store the result of addition 0700H

Initialize DS with 5000H
HLT ; STOP

Store AX in 0700H
.

Stop

Question 5: Write an instruction that will subtract the word contents of the storage location
pointed to by the base register BX and the carry flag from the accumulator. (S-12/3M)

Solution:
SBB AX, [BX]
The above instruction that will subtract the word contents at the storage location pointed to by the
base register BX and the carry flag from the accumulator.
Question 6: Two code-conversion tables starting with offsets TABL1 and TABL2 in the current
data segment are to be accessed. Write an instruction sequence that initializes the needed
registers and then replaces the contents of memory locations MEM1 and MEM2 (offsets in the
current data segment) by the equivalent converted codes from the respective code-conversion
tables. (S-12/W-12/6M)

Solution:
MOV AX, DATA_SEG ; Establish the data segment
MOV DS, AX
MOV AL, [MEM1] ; Get the given code at MEM1
MOV BX, TABL1
XLAT ; Translate
MOV [MEM1], AL ; Save new code at MEM1
MOV AL, [MEM2] ; Repeat for the second code at MEM2
52 Assembly Language Programming
 Unit – II

MOV BX, TABL2

XLAT ; Translate
MOV [MEM2], AL

Question 7: Write an instruction that will add the immediate value 111F16 and the carry flag to
the contents of the data register DX. (W-12/2M)

Solution:
To add the carry flag we use the ADC instruction.
ADC DX, 111FH ; DX  DX + 111FH + 1 (carry flag)

Question 8: Assuming (AX) = 001016, (BX) = 010016, and (DS) = 100016, what happens if the XLAT
instruction is executed? (S-12/W-12/3M)

Solution:
Given data,
(AX) = 001016,
(BX) = 010016,
and (DS) = 100016
AL is loaded from the physical address
1000016 + 010016 + 001016 = 1011016.
Question 9: Describe the operation performed by each of the following instructions:
i) AND BYTE PTR [0300H], 0FH
ii) AND DX, [SI]
Solution:
i) 0FH is AND with the contents of the byte-wide memory address (DS) * 10 + 300H.
ii) Contents of DX are AND with the contents of the word storage location pointed to by (DS)*10 + (SI).

Question 10: Write instructions that show two different ways of incrementing the address pointer in SI by
two.
Solution:
ADD SI, 2H OR INC SI
Assembly Language Programming 53
Unit – II

INC SI

Question 11: Given that (BX) = 637D, (SI) = 2A9B, Displacement = C237 determine the effective address (if
applicable resulting from these registers and the addressing mode)
i) Immediate ii) Direct
iii) Register using BX iv) Register indirect using BX
v) Register relative using BX vi) Based Indexed
vii) Based Indexed relative.
Solution:
i) In the immediate addressing, no effective address required.
ii) In the direct addressing, effective address is C237H.
iii) In the register addressing mode, no effective address required.
iv) In the register indirect addressing mode, effective address is given by EA = BX
v) In the register relative addressing mode, effective address is given by EA = BX + C237H.
vi) In the based indexed addressing mode, effective address is given by EA = BX + SI.
vi) In the based indexed relative addressing mode, effective address is given by EA = BX + SI + C237H

Question 12: Two byte-sized BCD integers are stored at the symbolic offset addresses NUM1 and NUM2.
Write an instruction sequence to generate their difference and store it at NUM3. The difference is to be
formed by subtracting the value at NUM1 from that at NUM2. Assume that all storage locations are in the
current data segment.
Solution:
Assume that the memory locations NUM1, NUM2, and NUM3 are in the same data segment.
MOV AX, DATA_SEG ; Establish data segment
MOV DS, AX
MOV AL, [NUM2] ; Get the second BCD number
SUB AL, [NUM1] ; Subtract the binary way
DAS ; Apply BCD adjustment
MOV [NUM3], AL ; Save the result.
Storage locations NUM1, NUM2, and NUM3 are assumed to have been declared as byte locations.

54 Assembly Language Programming

 Unit – II

Question 13: If register BX contains the value 010016, register DI contains 001016 and register DS contains
107516 what physical memory location is swapped with AX when the instruction XCHG (BX + DI), AX is
executed?
Solution:
Given data,
BX = 010016,
DI = 001016,
and DS = 107516
XCHG (BX + DI), AX
The above instruction will swap the contents of the memory location pointed to by
(DS)0 + (BX) + (DI) with those of register AX.
The physical memory location can be calculated as:
(DS)0 + (BX) + (DI) = 10750H + 100H + 10H = 10860H.
The value stored at this physical memory location 10860H is swapped with content register AX.

Question 14: Write a single instruction that loads AX from address 020016 and DS from address 020216
Solution:
LDS AX, [0200H] ; instruction will load the content of AX from address 020016 into the DS

Question 15: Write the instruction sequence that will initialize the ES register with the immediate value
101016.
Solution:
MOV AX, 1010H ; it will move the immediate value 101016 into AX register
MOV ES, AX ; it will move the content of register AX into ES register
Question 16: A translation table resides in memory with a starting address of 0800H. How does XLAT know
where the table is? If register AL contains 04, what is the result of XLAT?
Solution:
XLAT uses register BX as the pointer to the beginning of the translation table, so it is necessary to
place the address 0800H into BX before executing XLAT (assume here that the DS register contains 5000).

Assembly Language Programming 55

Unit – II

This can be easily done with MOV BX.0800H. Figure 3.22 shows the result of executing XLAT with AL equal
to 04. The byte at address 0804H is copied into register AL, giving it a final value of 44.
05000H DS * 10 Address Memory
+ 800H BX 05800H 40 7 0
+ 04H AL 05801H 41 44
05804H 05802H 42 AL
05803H 43
05804H 44

Question 17: Write the instruction that saves the contents of ES register in memory at address DS:1000H.
Solution:
MOV [1000H], ES ; it will move the content of register ES at address DS:1000H

Question 18: Explain what operation is performed by each of the following instruction:
a) MOV AX, 0110H b) MOV DI, AX c) MOV BL, AL
d) MOV [0100H], AX e) MOV [BX+DI], AX
f) MOV [DI] + 4, AX g) MOV [BX][DI] + 4, AX
Solution:
a) Value of immediate operand 0110H is moved into AX.
b) Contents of AX are copied into DI.
c) Contents of AL are copied into BL.
d) Contents of AX are copied into memory address DS:0100H.
e) Contents of AX are copied into the data segment memory location pointed to by (DS)0 + (BX) + (DI).
f) Contents of AX are copied into the data segment memory location pointed to by (DS)0 + (DI) + 4H.
g) Contents of AX are copied into the data segment memory location pointed to by (DS)0 + (BX) + (DI)
+ 4H

Question 19: The original contents of AX, BL word size memory location SUM and carry flag CF are 123416,
AB16, 00CD16 and 016 respectively. Describe the result of executing the following sequence of instructions.
ADD AX, [SUM]
ADD BL, 05H

56 Assembly Language Programming

 Unit – II

INC WORD PTR[SUM]

Solution:
Executing the first instruction adds the word in the accumulator and the word in the memory
location pointed to by address SUM. The result is placed is the accumulator. That is,
(AX)  (AX) + (SUM) = 123416 + 00CD16 = 130116
The carry flag remains reset.
The second instruction adds to the lower byte of the base register (BL) the immediate operand 516
and the carry flag, which is 016. This gives
(BL)  (BL) + imm8 + (CF) = AB16 + 516 + 016 = B016
Since no carry is generated, CF stays reset.
The last instruction increments the contents of memory location SUM by one. That is,
(SUM)  (SUM) + 116 = 00CD16 + 116 = 00CE16
These results are summarized in following table.
Instruction (AX) (BL) (SUM) (CF)
Initial State 1234 AB 00CD 0
ADD AX, [SUM] 1301 AB 00CD 0
ADD BL, 05H 1301 B0 00CD 0
INC WORD PTR[SUM] 1301 B0 00CE 0

Previous University Examination Question

Papers
(Summer – 2012)
Q. a) What are the addressing modes? Explain in detail each with suitable example. 10
b) Write an instruction that will subtract the word contents of the storage location pointed to by the base
register BX and the carry flag from the accumulator. 3
OR
Q. a) Two code conversion tables starting with offsets TAB1 and TAB2 in the current data segment are to
be accessed. Write an instruction sequence that initializes the contents of memory location MEM1 and
Assembly Language Programming 57
Unit – II

MEM2 (offsets in the current data segment) by the equivalent converted codes from the respective code
conversion tables. 6
b) Add the contents of memory location 2000 H : 0500H to the contents of 3000H : 0600 H . Store the result in
5000 H : 0700 H . 4
c) Assuming that (AX) = 0010H, (BX) = 0100H and (DS) = 1000H, what happens if the XLAT instruction is
executed? 3

(Winter – 2012)
Q. a) What do you mean by Addressing modes? With suitable example explain all Memory Operand
Addressing Modes. 7
b) Two code conversion tables starting with offsets TABL1 and TABL2 in the current data segment are to be
accessed. Write an instruction sequence that initializes the contents of memory location MEM1 and MEM2
(offsets in the current data segment) by the equivalent converted codes from the respective code
conversion tables. 6
OR
Q. a) Two word-wide unsigned integers are stored at the physical memory address 00A00H and 00A02H,
respectively. Write an instruction sequence that computes and stores their sum, difference, product and
quotient. Store these results at consecutive memory locations starting at physical address 00A10H in
memory. To obtain the difference, subtract the integer at 00A02H from the integer at 00A00H. For the
division, divide the integer at 00A00H by the integer at 00A02H. 8
b) Write an instruction that will add the immediate value 111FH and the carry flag to the contents of the data
register DX. 2
c) Assuming that (AX) = 0010H, (BX) = 0100H and (DS) = 1000H, what happens if the XLAT instruction is
executed. 3

(Summer – 2013)
Q. a) Explain the following 8086 addressing modes giving examples.
i) Relative Based Indexed.
ii) Intersegment Indirect.
iii) Register Indirect. 6

58 Assembly Language Programming

 Unit – II

b) Assuming that the contents of registers of BX and CX are 123416 and 012316, respectively, and the carry
flag is O. what is the result of executing the following instruction? 7
SBB BX CX
OR
Q. a) Explain the following 8086 instructions:
i) NEC
ii) IMUL
iii) CMP 6
b) Write a program to move the contents of memory location 0500H to register BX and to CX. Add
immediate byte 05H to the data residing in memory location whose address is computed using DS=2000H
and offset=0600H. Store the result of addition in 0700H. Assume that the data is located in the segment
specified by the data segment register DS which contains 2000H. 7

(Winter – 2013)
Q. a) Explain various 8086 addressing modes for sequential instructions giving example. 7
b) Write program to add a data byte located at offset 0500 H in 2000 H segment to another data byte
available at 0600 H in the same segment and store the result at 0700 H in the same segment. 6
OR
Q. a) Explain following 8086 instructions giving example:
i) XCHG
ii) SBB
iii) DIV. 6
b) Write a program to add the contents of the memory location 2000 H : 0500 H to the contents of 3000 H :
0600 H and store the result in 5000 H : 0700 H. 7

Assembly Language Programming 59