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Dvlsi Unit-3 Notes

The document outlines a series of questions related to Verilog coding and digital design tasks, including the development of a BCD to 7-Segment Decoder, a BCD Adder, and a traffic light controller. It also includes tasks for creating a 4-bit Carry Look-Ahead Adder, a behavioral model for a multiplier, and a scoreboard design. The questions cover various aspects of digital logic design and require synthesizable Verilog code for implementation.

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Sasi Bhushan
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0 views

Dvlsi Unit-3 Notes

The document outlines a series of questions related to Verilog coding and digital design tasks, including the development of a BCD to 7-Segment Decoder, a BCD Adder, and a traffic light controller. It also includes tasks for creating a 4-bit Carry Look-Ahead Adder, a behavioral model for a multiplier, and a scoreboard design. The questions cover various aspects of digital logic design and require synthesizable Verilog code for implementation.

Uploaded by

Sasi Bhushan
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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LAKIREDDY BALI REDDY COLLEGE OF ENGINEERING

(AUTONOMOUS)
L.B.Reddy Nagar :: Mylavaram – 521 230 :: Krishna Dist.:: A.P.

Q.No Questions
1 Develop Behavioral Verilog Code for BCD to 7-Segment Decoder

2 Verilog Code for BCD Adder Verilog Code for a 2-digit BCD adder, which will add two BCD numbers
and produce the sum in BCD format.

3 Verilog Description of a 4-Bit Carry Look-Ahead Adder


4 Design a Verilog Code sequential traffic light controller for the intersection of street “A” and street “B.”
Each street has traffic sensors, which detect the presence of vehicles approaching or stopped at the
intersection. Sa = 1 means a vehicle is approaching on street “A,” and Sb = 1 means a vehicle is
approaching on street “B.” Street “A” is a main street and has a green light until a car approaches on
“B.” Then the lights change, and “B” has a green light. At the end of 50 seconds, the lights change
back unless there is a car on street “B” and none on “A,” in which case the “B” cycle is extended for 10
additional seconds. If cars continue to arrive on street “B” and no car appears on street “A,” “B”
continues to have a green light. When “A” is green, it remains green at least 60 seconds, and then the
lights change only when a car approaches on “B.”
5 Design a behavioral model of a 4 × 4 multiplier for unsigned binary numbers.
6 Write a Verilog module that describes one bit of a full adder with accumulator. The module should
have two control inputs, Ad and L. If Ad = 1, the Y input (and carry input) are added to the
accumulator. If L 5 1, the Y input is loaded into the accumulator.

7 Write synthesizable Verilog code that will generate the given waveform (W). Use a single always block.
Assume that a clock with a 1 μs period is available as an input.
8 Four pushbuttons (B0, B1, B2, and B3) are used as inputs to a logic circuit. Whenever a button is
pushed, it is debounced, after which the circuit loads the button number in binary into a 2-bit register
(N). (i.e., if B2 is pushed, the register output becomes N = 102). The register holds this value until
another button is pushed. Use a total of two flip-flops for debouncing. Use a 10-bit counter as a clock
divider to provide a slow clock for debouncing. Kd is a signal that is 1 when any button has been
pushed and debounced.
(a) Draw a state graph (two states) to generate the signal that loads the register when Kd = 1.
(b) Draw a logic circuit diagram showing the 10-bit counter, the 2-bit register N, and all necessary
gates and flip-flops.

9 Design a simple scoreboard, which can display scores from 0 to 99 (decimal). The input to the system
should consist of a reset signal and control signals to increment or decrement the score. The 2-digit
decimal count gets incremented by 1 if increment signal is true and is decremented by 1 if decrement
signal is true. If increment and decrement are true simultaneously, no action occurs
10 Behavioral Model for 4 × 4 Binary Multiplier that It multiplies a 4-bit multiplicand by a 4-bit multiplier
to give an 8-bit product

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