CS111, Lecture 22

Dynamic Address Translation

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 CS111 Topic 4: Virtual Memory
Virtual Memory - How can one set of memory be shared among several processes?
How can the operating system manage access to a limited amount of system
memory?

Virtual Dynamic
Demand The Clock
Memory Address
Paging Algorithm
Introduction Translation
Lecture 21 Today Lecture 23 Lecture 24

assign6: implement demand paging system to translate addresses and load/store

memory contents for programs as needed.
2
 Learning Goals
• Understand the benefits of dynamic address translation
• Reason about the tradeoffs in different ways to implement dynamic address
translation

3
 Plan For Today
• Recap: virtual memory and dynamic address translation
• Approach #2: Multiple Segments
• Approach #3: Paging

4
 Plan For Today
• Recap: virtual memory and dynamic address translation
• Approach #2: Multiple Segments
• Approach #3: Paging

5
 Virtual memory is a
mechanism for multiple
processes to
simultaneously use system
memory.
6
 Sharing Memory
We want to allow multiple processes to simultaneously use system memory.
Our goals are:
• Multitasking – allow multiple processes to be memory-resident at once
• Transparency – no process should need to know memory is shared. Each
must run regardless of the number and/or locations of processes in memory.
• Isolation – processes must not be able to corrupt each other
• Efficiency (both of CPU and memory) – shouldn’t be degraded badly by sharing

7
 Load-Time Relocation
• When a process is loaded to run, place it in a
designated memory space. ∞
Operating
• That memory space is for everything for that process – System
stack/data/code
• Interesting fact – when a program is compiled, it is Process 3
compiled assuming its memory starts at address 0.
Therefore, we must update its addresses when we load
it to match its real starting address. Process 6
• Use first-fit or best-fit allocation to manage available
memory. Process 1

• Problems: isolation, deciding memory sizes in advance, 0

fragmentation, updating addresses when loading

8
 Dynamic Address Translation
Idea: What if, instead of letting programs use the real physical addresses, we
had them use “imaginary” addresses within their own private “virtual world”,
and have the OS translate virtual addresses to physical addresses on the fly?
• The OS can prohibit processes from accessing certain addresses (e.g. OS
memory or another process’s memory)
• Gives the OS lots of flexibility in managing memory
• Every process can now think that it is located starting at address 0 and is the
only process in memory
• The OS will translate each process’s address to the real one it’s mapped to
• As a result, a process’s virtual address space may look very different from how
the memory is really laid out in the physical address space.
9
 Dynamic Address Translation
We will add a memory management unit (MMU) in hardware that changes
addresses dynamically during every memory reference.
• Virtual address is what the program sees
• Physical address is the actual location in memory

Virtual address Physical address

Core MMU Memory

data 10
 Dynamic Address Translation
Key question: how do the MMU / OS translate from virtual addresses to physical
ones? Three designs we’ll consider:
1. Base and bound
2. Multiple Segments
3. Paging

11
 Approach #1: Base and Bound
• “base” is physical address starting point – corresponds to virtual address 0
• “bound” is one greater than highest allowable virtual memory address
• Each process has own base/bound. Stored in PCB and loaded into two
registers when running.

On each memory reference:

• Compare virtual address to bound, trap if >= (invalid memory reference)
• Otherwise, add base to virtual address to produce physical address

12
 Approach #1: Base and Bound
• Key idea: each process appears to have a completely private memory whose
size is determined by the bound register.
• The only physical address is in the base register, controlled by the OS. Process
sees only virtual addresses!
• OS can update a process’s base/bound if needed! E.g. it could move physical
memory to a new location or increase bound.
• Benefits: inexpensive, little space needed, separation between virtual and
physical addresses.
• Drawbacks: physical space must be contiguous, fragmentation, growth only
upwards, no read-only region support

13
 Base and Bound – Changing Bound
∞

bound

Stack

Process A

Data
Code
0 Process A base 0

Process A Virtual
Address Space Physical Address Space
14
 Base and Bound – Changing Bound
∞
bound

Stack

Process A

Data
Code
0 Process A base 0

Process A Virtual
Address Space Physical Address Space
15
 Base and Bound
One thought: Can we remove the ∞
requirement that the virtual address
space must be mapped
bound contiguously? Can we avoid
Stack mapping the unused space between
the stack and heap?
Process A

Data
Process A base
Code
0 0

Process A Virtual
Address Space Physical Address Space
16
 Plan For Today
• Recap: virtual memory and dynamic address translation
• Approach #2: Multiple Segments
• Approach #3: Paging

17
 Idea: what if we broke up
the virtual address space
into segments and mapped
each segment
independently?
18
 Approach #2: Multiple Segments
Key Idea: Each process is split among several variable-size areas of memory,
called segments.
• E.g. one segment for code, one segment for data/heap, one segment for stack.
• The OS maps each segment individually – each segment would have its own
base and bound, and these are stored in a segment map for that process
• We can also store a protection bit for each segment; whether the process is
allowed to write to it or not in addition to reading
• Now each segment can have its own permissions, grow/shrink independently,
be swapped to disk independently, be moved independently, and even be
shared between processes (e.g. shared code).

19
 Multiple Segments
∞ Stack
∞

Data
Code
0
Process A Virtual Address Space

∞ Stack

0
Data
Code
0
Process B Virtual Address Space Physical Address Space
20
 Approach #2: Multiple Segments
On each memory reference:
• Look up info for the segment that address is in
• Compare virtual address to that segment’s bound, trap if >= (invalid memory
reference)
• Add segment’s base to virtual address to produce physical address

Problem: how do we know which segment a virtual address is in?

21
 Approach #2: Multiple Segments
Problem: how do we know which segment a virtual address is in?
One Idea: make virtual addresses such that the top bits of the address specify its
segment, and the low bits of the address specify the offset in that segment.

Segment # Offset
0x122 0x456
Virtual Address

Example: PDP-10 computer had design with 2 segments, and the most-
significant bit in addresses encoded which one was being referenced.
Another possibility: deduce from machine code instruction executing
22
 Multiple Segments
• Do not need to initially map full ∞
Stack virtual address space, nor map it
contiguously.
• Instead, individually/contiguously
map each segment.
• Move an individual segment in
physical memory by modifying its
Data base (pinned to that segment’s
offset 0)
Code • Expand an individual segment’s
size by adjusting its bound.
0 0

Process A Virtual
Address Space Physical Address Space
23
 Multiple Segments – Changing A Base
∞
Stack

data
bound

Data

Code Process A data base

0 0

Process A Virtual
Address Space Physical Address Space
24
 Multiple Segments – Changing A Base
∞
Stack

data
bound

Data

Code
Process A data base
0 0

Process A Virtual
Address Space Physical Address Space
25
 Multiple Segments – Changing A Bound
∞
Stack

data
bound
Data

Code
Process A data base
0 0

Process A Virtual
Address Space Physical Address Space
26
 Approach #2: Multiple Segments
What are some benefits of this approach?
• Can move segments to compact memory and eliminate fragmentation
• Flexibility – can manage each segment independently
• Can share segments between processes

What are some drawbacks of this approach?

• Variable-length segments result in memory fragmentation – can move, but
creates friction
• Typically small number of segments
• Encoding segment + offset rigidly divides virtual addresses (how many bits for
segment vs. how many for offset?)
27
 Multiple Segments – Changing A Bound
stack
bound
Growing a segment upwards works ∞
Stack
well for the heap, but not for the
stack, for the same reason as base
and bound: we can’t move existing
stack data after the program starts.
data
bound Can we do better?
Data

Code
Process A data base
0 0

Process A Virtual
Address Space Physical Address Space
28
Idea: what if we broke up
the virtual address space
not into variable-length
segments, but into fixed-
size chunks?
29
 Plan For Today
• Recap: virtual memory and dynamic address translation
• Approach #2: Multiple Segments
• Approach #3: Paging

30
 Approach #3: Paging
Key Idea: Each process’s virtual (and physical) memory is divided into fixed-size
chunks called pages. (Common size is 4KB pages).
• A “page” of virtual memory maps to a “page” of physical memory. No partial
pages
• The page number is a numerical ID for a page. We have virtual page numbers
and physical page numbers.
• A virtual address is comprised of the virtual page # and offset in that page.
• A physical address is comprised of the physical page # and offset in that page.

31
 Paging
∞ Stack ∞

Data

Code
0 0

Process A Virtual
Address Space Physical Address Space
32
 Paging
∞ Stack ∞

Data

Code
0 0

Process A Virtual
Address Space Physical Address Space
33
 Paging
∞ Stack ∞

Data
Code
0
Process A Virtual Address Space
∞ Stack

Data
0 Code Physical Address Space
Process B Virtual Address Space 34
 Paging
∞ • Do not need to map each ∞
Stack segment contiguously. Instead,
we map just one page at a time.
• We can later map more pages
either up or down, because the
start of the segment is not
pinned to a physical address.
Data • We can move each page
separately in physical memory as
Code well.
0 0

Process A Virtual
Address Space Physical Address Space
35
 Paging
∞ Stack ∞

Data

Code
0 0

Process A Virtual
Address Space Physical Address Space
36
 Paging
∞ ∞
Stack

Data

Code
0 0

Process A Virtual
Address Space Physical Address Space
37
 Page Maps
How do we track, for a given process, which virtual page maps to which
physical page?
Each process has a page map (“page table”) with an entry for each virtual page,
mapping it to a physical page number and other info such as a protection bit
(read-only or read-write).
The page map is stored in contiguous memory.

38
 Page Map
Index Physical page # Writeable?
… … …
3 0x2342 1
2 0x12625 1
1 0x13241 0
0 0x256 0

Virtual page # = index

39
 Page Map
Index Physical page # Writeable?
… … …
3 0x2342 1
2 0x12625 1
1 0x13241 0
0 0x256 0

12 bits 12 bits
Virtual page # Offset Physical page # Offset
Virtual Address Physical Address

40
 Virtual Address Encodes Page + Offset
Key idea: if you pick a
page size that is a power
of the base, the upper 2000-2999
digits identify the page
#.

E.g. base 10, say page

1000-1999 Code
size = 103 = 1000:

0000-0999
0

41
 Virtual Address Encodes Page + Offset
Key idea: if you pick a
page size that is a power
of the base, the upper 0x2000-0x2fff
digits identify the page
#.

E.g. base 16, say page

0x1000-0x1fff Code
size = 163 = 4096:
0x0000-0x0fff
Virtual page # Offset
0
0x323 0x400
Virtual Address 0x323400 42
 Page Map
Index Physical page # Writeable?
… … …
3 0x2342 1
2 0x12625 1
For 4KB1pages (4096 bytes), the offset can be 0-4095. 0Thus,
0x13241
we can store
0 the offset in 12 bits (the amount needed 0to
0x256
represent any number 0-4095). 12 bits = 3 hexadecimal digits.
12 bits 12 bits
Virtual page # Offset Physical page # Offset
Virtual Address Physical Address

43
 Page Map
Physical page # WR?
∞ Stack 12 3 1 ∞
11 X X
10 X X
9 X X
8 X X
7 X X
6 X X
Data
5 X X
4 2 1
Code
0 3 9 0 0
2 1 0
Process A Virtual 1 7 0
Address Space 0 5 0 Physical Address Space
44
 Data
Page Map
Code Physical page # WR?
0 12 3 1 0
11 X X
Process A Virtual 10 X X
Address Space Physical Address Space
9 X X
8 X X
7 X X
6 X X
5 X X
4 2 1
3 9 0
2 1 0
1 7 0
0 5 0 45
 Data
Page Map
Code Physical page # WR?
0 12 3 1 0
11 X X
Process A Virtual 10 X X
Address Space Physical Address Space
9 X X
8 X X
7 X X
6 X X
5 X X
4 2 1
3 9 0
2 1 0
1 7 0
0 5 0 46
 Data
Page Map
Code Physical page # WR?
0 12 3 1 0
11 X X
Process A Virtual 10 X X
Address Space Physical Address Space
9 X X
8 X X
7 X X
6 X X
5 X X
4 2 1
3 9 0
2 1 0
Virtual Address 1 7 0
0x2223 0 5 0 47
 Data
Page Map
Code Physical page # WR?
0 12 3 1 0
11 X X
Process A Virtual 10 X X
Address Space Physical Address Space
9 X X
8 X X
7 X X
6 X X
5 X X
4 2 1
Virtual page # Offset
3 9 0
0x2 0x223 2 1 0
Virtual Address 1 7 0
0x2223 0 5 0 48
 Data
Page Map
Code Physical page # WR?
0 12 3 1 0
11 X X
Process A Virtual 10 X X
Address Space Physical Address Space
9 X X
8 X X
7 X X
6 X X
5 X X
4 2 1 Offset
Virtual page # Offset Physical page #
3 9 0
0x2 0x223 ??? ???
2 1 0
Virtual Address 1 7 0 Physical Address
0x2223 0 5 0 ??? 49
 Data
Page Map
Code Physical page # WR?
0 12 3 1 0
11 X X
Process A Virtual 10 X X
Address Space Physical Address Space
9 X X
8 X X
7 X X
6 X X
5 X X
4 2 1 Offset
Virtual page # Offset Physical page #
3 9 0
0x2 0x223 0x1 ???
2 1 0
Virtual Address 1 7 0 Physical Address
0x2223 0 5 0 ??? 50
 Data
Page Map
Code Physical page # WR?
0 12 3 1 0
11 X X
Process A Virtual 10 X X
Address Space Physical Address Space
9 X X
8 X X
7 X X
6 X X
5 X X
4 2 1 Offset
Virtual page # Offset Physical page #
3 9 0
0x2 0x223 0x1 0x223
2 1 0
Virtual Address 1 7 0 Physical Address
0x2223 0 5 0 ??? 51
 Data
Page Map
Code Physical page # WR?
0 12 3 1 0
11 X X
Process A Virtual 10 X X
Address Space Physical Address Space
9 X X
8 X X
7 X X
6 X X
5 X X
4 2 1 Offset
Virtual page # Offset Physical page #
3 9 0
0x2 0x223 0x1 0x223
2 1 0
Virtual Address 1 7 0 Physical Address
0x2223 0 5 0 0x1223 52
 Page Map
Index Physical page # Writeable?
… … …
3 0x2342 1
2 0x12625 1
1 0x13241 0
0 0x256 0

Virtual page # Offset Physical page # Offset

0x3 0x400 ??? ???
Virtual Address Physical Address
0x3400 ??? 53
 Page Map
Index Physical page # Writeable?
… … …
3 0x2342 1
2 0x12625 1
1 0x13241 0
0 0x256 0

Virtual page # Offset Physical page # Offset

0x3 0x400 ??? ???
Virtual Address Physical Address
0x3400 ??? 54
 Page Map
Index Physical page # Writeable?
… … …
3 0x2342 1
2 0x12625 1
1 0x13241 0
0 0x256 0

Virtual page # Offset Physical page # Offset

0x3 0x400 0x2342 ???
Virtual Address Physical Address
0x3400 ??? 55
 Page Map
Index Physical page # Writeable?
… … …
3 0x2342 1
2 0x12625 1
1 0x13241 0
0 0x256 0

Virtual page # Offset Physical page # Offset

0x3 0x400 0x2342 0x400
Virtual Address Physical Address
0x3400 ??? 56
 Page Map
Index Physical page # Writeable?
… … …
3 0x2342 1
2 0x12625 1
1 0x13241 0
0 0x256 0

Virtual page # Offset Physical page # Offset

0x3 0x400 0x2342 0x400
Virtual Address Physical Address
0x3400 0x2342400 57
PollEV: What is the physical address?
Respond on PollEv: pollev.com/cs111
or text CS111 to 22333 once to join.
Index Physical page # Writeable?
… … …
3 0x2342 1
2 0x12625 1
1 0x13241 0
0 0x256 0
Virtual page # Offset Physical page # Offset
??? ??? ??? ???
Virtual Address Physical Address
0x1456 ??? 58
59
Practice: What is the physical address?

Index Physical page # Writeable?

… … …
3 0x2342 1
2 0x12625 1
1 0x13241 0
0 0x256 0
Virtual page # Offset Physical page # Offset
0x1 0x456 0x13241 0x456
Virtual Address Physical Address
0x1456 0x13241456 60
 Practice: What is the physical address?

Index Physical page # Writeable?

… … …
3 0x2342 1
2 0x12625 1
1 0x13241 0
0 0x256 0

unused (16 bits) Virtual page # (36 bits) Offset (12 bits) Physical page # (40 bits) Offset (12 bits)
x86-64 64-bit Virtual Address x86-64 52-bit Physical Address

x86-64 with 4KB pages has 36-bit virtual page numbers and 40-bit physical page numbers. 61
 Each Process Has A Page Map
∞
Physic al pa ge # W R? PR?

Stack 12

11
3

X
1

X
1

0
∞
10 X X 0

9 X X 0

8 X X 0

7 X X 0

6 X X 0

5 X X 0

4 2 1 1

Data 3

2
9

1
0

0
1

Code 1

0
7

5
0

0
1

0
Process A Virtual Address Space
∞ Stack
12
Physic al pa ge #

10
W R?

1
PR?

11 X X 0

10 X X 0

9 X X 0

8 X X 0

6
X

X
X

X
0

0
0
5 X X 0

4 X X 0

3 X X 0

2 X X 0

Data
Physical Address Space
1 8 1 1

0 Code 0 12 0 1

Process B Virtual Address Space 62

 Paging
How do we provide memory to a process?
• Keep a global free list of physical pages – grab the first one when we need one
• Update process page table for a virtual page to map to this physical page

In this way, we can represent a process’s segments (e.g. code, data) as a

collection of 1 or more pages, starting on any page boundary.

63
 Requesting More Memory
∞ Stack ∞

Data

Code
0 0

Process A Virtual
Address Space Physical Address Space
64
 Requesting More Memory
∞ ∞
Stack

Data

Code
0 0

Process A Virtual
Address Space Physical Address Space
65
 Paging
Key Idea: Each process’s virtual (and physical) memory is divided into fixed-size
chunks called pages. (Common size is 4KB pages).
• A “page” of virtual memory maps to a “page” of physical memory. No partial
pages. No more external fragmentation! (but some internal fragmentation if
not all of a page is used).
• The page number is a numerical ID for a page. We have virtual page numbers
and physical page numbers.
• Each process has a page map (“page table”) with an entry for each virtual
page, mapping it to a physical page number and other info such as a protection
bit (read-only or read-write).
• A memory address can tell us the page number and offset within that page.
• Not all pages are mapped – unmapped pages cannot be accessed
66
 Paging
On each memory reference:
• Look up info for that virtual page in the page map
• If it’s a valid virtual page number, get the physical page number it maps to, and
combine it with the specified offset to produce the physical address.

Problem: what about invalid page numbers? I.e. how do we know/represent

which pages are valid or invalid?
Solution: have entries in the page map for all pages, including invalid ones. Add
an additional field marking whether it’s valid (“present”).

67
 Recap
• Recap: virtual memory and dynamic Lecture 22 takeaway:
address translation
Dynamic Address translation
• Approach #2: Multiple Segments
means that the OS intercepts
• Approach #3: Paging and translates each memory
access. Initial approaches to
this include base+bound per
process, or expanding that to
Next time: demand paging be base+bound per variable-
length segment, or instead
dividing into fixed-size pages.
68