Question: 1 (Choose 1 answer)

Which of the following statements is part of the Von Newmann principle?

A. The computer uses a program counter to indicate the location of the next statement

B. Computer can control all operations with a single program

C. Computer memory is not addressable

D. Each instruction must have a memory area containing the address of the next instruction

Question: 2 (Choose 1 answer)

What is the distinction between Computer Architecture and Computer Organization?

A. Computer Architecture is the way the system is structured, while Computer Organization
is those attributes of a system that are visible to the user

B. Computer Architecture is those attributes of a system that are visible to the user, while
Computer Organization is the way the system is structured

C. Computer Architecture and Computer Organization are the same

D. Computer Architecture is slower than Computer Organization

Question: 3 (Choose 1 answer)

Which of the following are the four basic functions that a computer performs?

A. Data processing, Data storage, Data movement, Control

B. Data processing, Data storage, Data movement, Interrupt

C. Data processing, Data storage, Interrupt, Control

D. Data processing, Interrupt, Data movement, Control

Question: 4

(Choose 1 answer)

Which one of four basic functions of computer describes the following statement?"The paths
among components are used to move data from memory to memory and from memory
through gates to memory".

A. Data storage

B. Data processing
C. Data movement

D. Control

Question: 5

(Choose 1 answer)

During the development process of the computer, which of the following statements is false?

A. The second generation uses transistors

B. The first generation uses vacuum tubes

C. The fourth generation uses integrated circuit

D. The third generation uses transistor

Question: 6

(Choose 1 answer)

What electronic component is used to govern operations such as fetching, decoding, and
performing arithmetic operations executed by a processor?

A. Using a system clock

B. Using a quartz crystal

C. Using a analog to digital converter

D. Using a counter

Question: 7

(Choose 1 answer)

The pulse rate in the ck system is known as the

A. ck cycle

B. ck speed

C. ck time

D. ck tick

Question: 8

(Choose 1 answer)
Which register is the memory address register?

A. MAR

B. MBR

C. IR

D. PC

| Question: 9

(Choose 1 answer)

Which representation is most efficient to perform arithmetic operations on the signed integer
numbers?

A. Sign-magnitude

B. 2's complement

C. 1's & 2's complement

D. 1's complement

Question: 10

(Choose 1 answer)

What is true about IAS Memory Formats?

A. The memory of the IAS consists of 1000 storage locations (called words) of 32 bits each

B. Only data is stored in the memory

C. Both data and instructions are stored in the memory

D. Only instructions are stored in the memory

Question: 11

(Choose 1 answer)

What is the most important characteristic of the Synchronous Bus?

A. Data is transmitted at the same time

B. The occurrence of one event on a bus follows and depends on the occurrence of a previous event.

C. The occurrence of events on the bus is determined by a clock

D. No common clock signal controlling operation

Question: 12

(Choose 1 answer)

Which of the following memory devices has the lowest access speed?

A. ROM

B. Flash memory

C. Magnetic tape

D. HDD

E. Cache

Question: 13

(Choose 1 answer)

Consider an expression: NOT (1111 1010)What is the result of this expression?

Α. 0000 1010

B. 0000 0101

C. 1111 0101

D. 1111 1010

Question: 14

(Choose 1 answer)

What is the primary purpose of cache memory in a computer system?

A. To store frequently used data for quick access

B. To store the operating system

C. To store user files and documents

D. To store the CPU registers

Question: 15 (Choose 1 answer)

A set-associative cache consists of 64 lines, divided into four-line sets. 2^19-words main memory
contains 4K blocks of 128 words each. How many bits are there in the tag field of the cache?
A. 5

B. 6

C. 7

D. 8

E. 9

Question: 16

(Choose 3 answers)

Why is cache design used in high-performance computing (HPC)? (Choose three correct answers)

A. Because there is a significant speed gap between the processor and the internal memory in HPC.

B. Because applications in HPC often require a large bandwidth to support intensive data processing

C. Because power consumption can be a significant operational cost in HPC environments.

D. Because multiple processors are often working in parallel, caches provide a way to efficiently
manage data required by these processors

Question: 17

(Choose 1 answer)

How many bytes of data does each sector in the Winchester hard drive disk have?

A. 128 bytes

B. 256 bytes

C. 512 bytes

D. 1024 bytes

E. 4096 bytes

Question: 18

(Choose 1 answer)

Using Hamming Code with one error corection to store an 12-bit word in memory, the stored word
111001001101 consists of 8 bits data and 4 bit bits parity check. What are the parity bits?

Α. 0110

B. 0111
C. 1110

D. 0101

E. None of the mentioned

Question: 19

(Choose 1 answer)

What is correct about increasing performance and endurance?

A. Hard Disk- DRAM - NAND Flash - SRAM

B. Hard Disk - NAND Flash - DRAM SRAM

C. NAND Flash - Hard Disk - SRAM - DRAM

D. Hard Disk - DRAM - NAND Flash - SRAM

Question: 20

(Choose 1 answer)

With the hard disk data layout, the set of all the tracks in the same relative position on the platter, is
called

A. Cylinder

B. Tracks

C. Inter-track gap

D. Sector

Question: 21

(Choose 1 answer)

Consider a 5-drive, 200 GBytes-per-drive RAID array. What is the available data storage capacity for
each of the RAID levels 5?

A. 200 GBytes

B. 400 GBytes

C. 600 GBytes

D. 800 GBytes

E. None of the mentioned

 Question: 22

(Choose 1 answer)

Consider a 5-drive, 100 GBytes-per-drive RAID array. What is the available data storage capacity for
each of the RAID levels 5?

A. 400 GBytes

B. 200 GBytes

C. 300 GBytes

D. 500 GBytes

Question: 23 (Choose 1 answer)

What is incorrect about SSDs have the following advantages over HDDs?
A. Higher access times and latency rates: Over 10 times slower than the HDD.
B. Durability: Less susceptible to physical shock and vibration.
C. Longer lifespan: SSDs are not susceptible to mechanical wear.
D. Lower power consumption: SSDs use considerably less power than comparable-size HDDs.
E. Quieter and cooler running capabilities: Less space required, lower energy costs, and a greener
enterprise.

Question: 24
(Choose 1 answer)
Which registers can interact with the secondary storage?
A. MAR
B. PC
C. IR
D. RO
E. All of the mentioned

Question: 25
(Choose 1 answer)
Consider an expression: A + (B.C)
What expression is equal to the given expression?
A. (A + B).(A + C)
B. (A+B).C
C. A.(B+C)
D. NOT (A.(B+C))

Question: 26
(Choose 1 answer)
Determine the address of the next instruction to be executed. Usually, this involves adding a fixed
number to the address of the previous instruction.
A. Instruction fetch
B. Instruction operation decoding
C. Instruction address calculation
D. Operand fetch
E. Operand address calculation

Question: 27 (Choose 1 answer)

For interrupts, all I/O modules share a common interrupt request line. When the processor senses an
interrupt, it sends out an interrupt acknowledgement. This signal propagates through a series of I/O
modules until it gets to a requesting module.
Which kind of interrupt technique is it?
A. Multiple interrupt lines
B. Software poll
C. Daisy chain
D. Bus arbitration

Question: 28
(Choose 1 answer)
What role does an Application Programming Interface (API) play in software development?
A. It allows program access to hardware resources using high-level language libraries
B. It defines low-level machine instructions
C. It provides a standard for binary portability
D. It manages system resources for the operating system and machine language instructions
Question: 29
(Choose 1 answer)
Which state indicates that a process is currently being executed by the processor?
A. Running
B. Ready
C. NewBorn
D. Halted

Question: 30
(Choose 1 answer)
The task of subdivision is carried out dynamically by the OS and is known as
A. Scheduling
B. Memory management
C. Virtual Memory
D. All of the mentioned

Question: 31 (Choose 1 answer)

Which of the following statements is incorrect about Translation Look-aside Buffer (TLB)?
A. The use of TLB eliminates the need for keeping a page table in memory
B. TLB only maintains a subset of the entries stored in the full memory-based page table
C. When there is a TLB miss the system needs to access the page table
D. A translation lookaside buffer (TLB) is a memory cache that stores the recent translations of virtual
memory to physical memory

Question: 32
(Choose 1 answer)
(R1) = 01110110, (R2) = 11011111, the result of (R1) XOR (R2) is:
Α. 11011011
Β. 00010110
C. 10101001
D. 11001101

Question: 33
(Choose 1 answer)
What is the output of a NOT gate when the input is 0?
A. 0
B. 1
C. Undefined
D. 2

Question: 34
(Choose 1 answer)
Express an integer number +18 (using 8-bits length) in two's complement representation.
Α. 00010010
Β. 10010010
C. 00001101
D. 10011101

Question: 35
(Choose 1 answer)
Which registers can be assigned to a variety of functions by the programmer?
A. Data registers
B. General purpose registers
C. Address registers
D. Condition codes (flags)

Question: 36
(Choose 1 answer)
What are the most important general categories of data that machine instructions operate on?
A. Addresses, numbers, characters, and logical data
B. Text, images, and audio
C. Variables, functions, and arrays
D. Instructions, control signals, and registers

Question: 37
(Choose 1 answer)
What is the output of Left Shift Operator << on (00011000<<2)?
Α. 01100000
Β. 11000000
C. 00000110
D. 00000011

Question: 38
(Choose 1 answer)
Which addressing mode allows direct specification of the memory address within the instruction?
A. Direct
B. Indirect
C. Register Indirect
D. Displacement

Question: 39
(Choose 1 answer)
Which of the following PDP series computers is known for its use of 12-bit instructions and a single
general-purpose register, the accumulator?
A. PDP-8
B. PDP-10
C. PDP-11
D. PDP-6

Question: 40
(Choose 1 answer)
In MASM32, which command is incorrect?
A. ADD EAX, a
B. ADD EAX, EBX
C. ADD a, EAX
D. ADD a, b

Question: 41
(Choose 1 answer)
What is the primary function of the Arithmetic and Logic Unit (ALU) in a processor?
A. Perform actual computations and data processing
B. Control the movement of data and instructions
C. Act as an interface to the system bus
D. Manage the internal processor memory

Question: 42
(Choose 1 answer)
The PC, IR, MAR, MBR registers belong to which of the following groups?
A. Control and Status Registers
B. User-Visible Registers
C. General Registers
D. Handle Registers

Question: 43 (Choose 1 answer)

When considering the number of pipeline stages, what trade-offs must be made in computer
architecture?
A. Trade-offs between potential speedup and increased cost and delays
B. Trade-offs between software and hardware
C. Trade-offs between speed and efficiency
D. Trade-offs between branching and executing instructions with conditions

Question: 44
(Choose 1 answer)
What does CISC stand for?
A. Complex Instruction Set Computer
B. Computer Instruction Set Complex
C. Complex Instruction Summarize Computer
D. Computer Instruction Summarize Complex
 Question: 45
(Choose 1 answer)
What is one of the advantages of using a register file in computer architecture?
A. Reduction in memory accesses, saving time
B. More efficient use of space due to dynamic adaptation
C. Efficient handling of both local and global variables
D. Easier management of cache residency

Question: 46 (Choose 1 answer)

How does pipelining in a RISC architecture handle branch instruction?
A. By using NOOP instructions inserted by the compiler or assembler
B. By eliminating branch instructions from the instruction stream
C. By executing branch instructions in a separate pipeline
D. By delaying all instructions until branch instructions are executed

Question: 47
(Choose 1 answer)
is (are) determined by the number of instructions that can be fetched and executed at the same time
(the number of parallel pipelines) and by the speed and sophistication of the mechanisms that the
processor uses to find independent instructions.
A. Instruction-level parallelism
B. Machine parallelism
C. Both instruction-level parallelism and machine parallelism
D. None of the mentioned

Question: 48 (Choose 1 answer)

Which is the correct choice for the description: "A single machine instruction controls the
simultaneous execution of a number of processing elements such as vector and array processors"?
A. Single instruction, single data (SISD)
B. Single instruction, multiple data (SIMD)
C. Multiple instruction, single data (MISD)
D. Multiple instruction, multiple data (MIMD)

Question: 49
(Choose 1 answer)
What is one advantage of Non Uniform Memory Access (NUMA) over Uniform Memory Access
(UMA)?
A. NUMA provides each processor with its own local memory, reducing memory access times
B. NUMA allows all processors to access the same memory location simultaneously
C. NUMA is easier to implement than UMA
D. NUMA provides limited memory capacity

Question: 50
(Choose 1 answer)
What is the most common mapping technique used in cache memory in modern computers?
A. Direct Mapping
B. Fully Associative
C. Set Associative
D. None of the mentioned
1A, 2B, 3A, 4C, 5D, 6A, 7B, 8A, 9B, 10C, 11C, 12C, 13B, 14A, 15E, 16ABD, 17C, 18A, 19B, 20A,
21C, 22A, 23A, 24A, 25A, 26C, 27C, 28A, 29A, 30D, 31A, 32C, 33B, 34A, 35B, 36A, 37A, 38A,
39A, 40D, 41A, 42A, 43A, 44A, 45A, 46A, 47C, 48B, 49A, 50C