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5-RISC Vs CISC-11-01-2024

The document compares RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer) architectures, highlighting their key features and differences. RISC emphasizes a simplified instruction set and faster execution times through pipelining and multiple registers, while CISC focuses on complex instructions that may take longer to execute but require less RAM and simplify programming. Examples of RISC include ARM and SPARC, while CISC examples include Intel x86 and Motorola 68000.

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110 views8 pages

5-RISC Vs CISC-11-01-2024

The document compares RISC (Reduced Instruction Set Computer) and CISC (Complex Instruction Set Computer) architectures, highlighting their key features and differences. RISC emphasizes a simplified instruction set and faster execution times through pipelining and multiple registers, while CISC focuses on complex instructions that may take longer to execute but require less RAM and simplify programming. Examples of RISC include ARM and SPARC, while CISC examples include Intel x86 and Motorola 68000.

Uploaded by

karthik
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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RISC and CISC Architecture

Module 1
RISC

• RISC :- Reduced Instruction Set Computer Processor


• A microprocessor architecture with a simple collection and
highly customized set of instructions.
• It is built to minimize the instruction execution time by
optimizing and limiting the number of instructions.
• It means each instruction cycle requires only one clock cycle,
and each cycle contains three parameters: fetch, decode and
execute.
• RISC chips require several transistors, making it cheaper to
design and reduce the execution time for instruction.
RISC Architecture
Features of RISC Processor
• One cycle execution time: For executing each instruction in a
computer, the RISC processors require one CPI (Clock per cycle).

• Pipelining technique: The pipelining technique is used in the RISC


processors to execute multiple parts or stages of instructions to
perform more efficiently.

• A large number of registers: RISC processors are optimized with


multiple registers that can be used to store instruction and quickly
respond to the computer and minimize interaction with computer
memory.

• It supports a simple addressing mode and fixed length of instruction


for executing the pipeline.
• It uses LOAD and STORE instruction to access the memory location.
• Simple and limited instruction reduces the execution time of a process
in a RISC.
CISC
• CISC:-Complex Instruction Set Computer
• It has a large collection of complex instructions
that range from simple to very complex and
specialized in the assembly language level, which
takes a long time to execute the instructions.
• CISC approaches reducing the number of
instruction on each program and ignoring the
number of cycles per instruction.
• CISC chips are relatively slower as compared to
RISC chips but use little instruction than RISC.
Features of CISC Processor
• The length of the code is shorts, so it requires very little
RAM.
• CISC or complex instructions may take longer than a
single clock cycle to execute the code.
• Less instruction is needed to write an application.
• It provides easier programming in assembly language.
• Support for complex data structure and easy
compilation of high-level languages.
• It is composed of fewer registers and more addressing
modes, typically 5 to 20.
• Instructions can be larger than a single word.
• It emphasizes the building of instruction on hardware
because it is faster to create than the software.
CISC Architecture
Difference between the RISC and CISC Processors

RISC CISC
It is a Reduced Instruction Set Computer. It is a Complex Instruction Set Computer.
It emphasizes on software to optimize the instruction set. It emphasizes on hardware to optimize the instruction set.
It is a hard wired unit of programming in the RISC Processor. Microprogramming unit in CISC Processor.

It requires multiple register sets to store the instruction. It requires a single register set to store the instruction.
RISC has simple decoding of instruction. CISC has complex decoding of instruction.
Uses of the pipeline are simple in RISC. Uses of the pipeline are difficult in CISC.
It uses a limited number of instruction that requires less time It uses a large number of instruction that requires more time
to execute the instructions. to execute the instructions.
It uses LOAD and STORE that are independent instructions in It uses LOAD and STORE instruction in the memory-to-
the register-to-register a program's interaction. memory interaction of a program.

RISC has more transistors on memory registers. CISC has transistors to store complex instructions.
The execution time of RISC is very short. The execution time of CISC is longer.
RISC architecture can be used with high-end applications like CISC architecture can be used with low-end applications like
telecommunication, image processing, video processing, etc. home automation, security system, etc.

It has fixed format instruction. It has variable format instruction.


The program written for RISC architecture needs to take more Program written for CISC architecture tends to take less space
space in memory. in memory.
Example of RISC: ARM, PA-RISC, Power Architecture, Alpha, Examples of CISC: VAX, Motorola 68000 family, System/360,
AVR, ARC and the SPARC. AMD and the Intel x86 CPUs.

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