Chapter 2 : CPU Architecture

• Contents
• Basic Operational Concepts
• Organization of ALU
• Stack Organization
• Instruction Execution
• Instruction Cycle
• Pipelining
• Addressing Modes
• Hardwired and micro programmed control unit
• RISC vs CISC

08-Nov-23 By Shimelis A. 1
 Organization of ALU
Let’s see the CPU first
 The central processing unit (CPU), also called the
processor includes three main parts:-
1.A program control unit
2.An arithmetic and logic unit and
3.Register

08-Nov-23 By Shimelis A. 2
 cont’d…

08-Nov-23 By Shimelis A. 3
 Cont’d….
• The basic function of a CPU is to:

– Fetch

– decode and

– execute instructions held in ROM or RAM.

• These are the process by which a computer retrieves a program
instruction from its memory, determines what actions the instruction
requires, and carries out those actions.

• The whole process is done in an instruction cycle (sometimes called

fetch-decode-execute (FDX))

08-Nov-23 By Shimelis A. 4
 Cont’d…
• Hence, instruction cycle is the amount of time for fetching,
decoding and executing of a single instruction.

• In simpler CPUs, the instruction cycle is executed sequentially:

– each instruction is completely processed before the next one is

started.
• In most modern CPUs, the instruction cycle is instead executed
concurrently in parallel, as an instruction pipeline:

– the next instruction starts being processed before the previous

instruction is finished
By Shimelis A.
08-Nov-23 5
 Cont’d… instruction cycle
• Typically, clock signals are generated by a quartz crystal, which
generates a constant signal wave while power is applied.

08-Nov-23 By Shimelis A. 6
 The circuits used in the CPU during the cycle are:

• Program counter (PC) - an incrementing counter that

keeps track of the memory address of the instruction that
is to be executed next.
• Memory address register (MAR) - holds the address of a
memory block to be read from or written to.
• Memory data register (MDR) - a two-way register that
holds data fetched from memory (and ready for the
CPU to process) or data waiting to be stored in memory
• Instruction register (IR) - a temporary holding ground for
the instruction that has just been fetched from memory

08-Nov-23 By Shimelis A. 7
 Cont’d…
• Control unit (CU) - decodes the program instruction in the IR,
selecting machine resources such as a data source register and a
particular arithmetic operation, and coordinates activation of those
resources
• Arithmetic logic unit (ALU) - performs mathematical and logical
operations.
– Hence the ALU is the basic part of the computer system that performs
mathematical and logical operations in every instruction cycle.
– For example let‟s see a one bit ALU that performs arithmetic and logical
operations.
08-Nov-23 By Shimelis A. 8
 Block diagram of 1 bit ALU

08-Nov-23 By Shimelis A. 9
 Execution Cycle Steps
Obtain instruction from program storage
Instruction
Fetch

Instruction Determine required actions and instruction size

Decode

Operand Locate and obtain operand data

Fetch

Execute Compute result value or status

Result Deposit results in storage for later use

Store

Next
Determine successor instruction
Instruction

08-Nov-23 By Shimelis A. 10
 stack
• A stack is a sequence of items that are
accessible at only one end of the sequence

By Shimelis A.
08-Nov-23 11
 Stack operations
• There are three basic stack terms we should
know
1) The Push instruction
put the value of the data in register in to the
top of the stack.

08-Nov-23 By Shimelis A. 12
 Cont’d…
• 2) The POP instruction
– take the value on the top of the stack memory

By Shimelis A.
08-Nov-23 13
 Cont’d…
• 3) Top of stack
– The place in the stack memory which is ready to
be accessed

08-Nov-23 By Shimelis A. 14
 A general block diagram of stack operation

08-Nov-23 By Shimelis A. 15
 Summary of stack
• It is LIFO system  Last In First Out
• Example See how the elephant comes to the first
location and the bird will be at the last in stack point of
view.

08-Nov-23 By Shimelis A. 16
 Example cont’d…

By Shimelis A.
08-Nov-23 17
 Cont’d…

By Shimelis A.
08-Nov-23 18
 Accessing stack example cont‟d..

08-Nov-23 By Shimelis A. 19
 Accessing stack with example

08-Nov-23 By Shimelis A. 20
 In stack we can access the data on the
top

08-Nov-23 By Shimelis A. 21
 Computer programming languages

• Programming languages are the languages that we use

to write instruction for a computer to perform
functions.

• Classification of programming languages:

– Machine language

– Assembly language

– High level language

08-Nov-23 By Shimelis A. 22
 MACHINE CODE
• A program running on a computer is simply a
sequence of bits.
• A program in this format is said to be in machine
code.
• We can write programs in machine code:
• But, bulky to write
23fc 0000 0001 0000 0040
0cb9 0000 000a 0000 0040
6e0c
06b9 0000 0001 0000 0040
60e8
08-Nov-23 By Shimelis A. 23
 ASSEMBLY LANGUAGE
• Assembly language (or assembler code) was our
first attempt at producing a mechanism for writing
programs that was more palatable to ourselves.
• Of course a program mov R0, R1
written in assembly ADD R0, R3
code, in order to compare:
“run”must first be cmp #oxa,n
translated into machine cgt end_of_loop
code. acddl #0x1,n
• This is done by bra compare
assembler _of_loop:
08-Nov-23 By Shimelis A. 24
 HIGH LEVEL LANGUAGE
• From the foregoing we can see that assembly
language is not much of an improvement on machine
code!
• A more problem-oriented (rather than machine-
oriented) mechanism for creating computer programs
would also be desirable.
• Hence the advent of high(er) level languages
commencing with the introduction of “Autocodes”,
and going on to Fortran, Pascal, Basic, C, C++, java
etc.
• The HLL must be converted in to machine language
to be executed. This is done by compiler.
08-Nov-23 By Shimelis A. 25
 PIPELINING

By Shimelis A.
08-Nov-23 26
 What is Pipelining ?
 A technique used in advanced microprocessors where the
microprocessor begins executing a second instruction before the first
has been completed.

 A Pipeline is a series of stages, where some work is done at each stage.

The work is not finished until it has passed through all stages.

 With pipelining, the computer architecture allows the next

instructions to be fetched while the processor is performing
arithmetic operations, holding them in a buffer close to the processor
until each instruction operation can performed.

08-Nov-23 By Shimelis A. 27
 Pipelining (continued)
• Consider an example with 6 stages
– FI = fetch instruction
– DI = decode instruction
– CO = calculate location of operand
– FO = fetch operand
– EI = execute instruction
– WO = write operand (store result)

08-Nov-23 By Shimelis A. 28
 Pipelining Example

• Executes 9 instructions in 14 cycles rather than 54 for sequential

execution
08-Nov-23 By Shimelis A. 29
 Example

Instruction 1 Instruction 2

X X

Instruction 4 Instruction 3

X X
F o u r s a m p l e instructions, e x e c u t e d linearly

08-Nov-23 By Shimelis A. 30
 5

IF ID EX M W 1
IF ID EX M W
1
IF ID EX M W
1
IF ID EX M W

Four Pipelined Instructions

08-Nov-23 By Shimelis A. 31
 Description of each step
• The instruction Fetch (IF) stage is responsible for obtaining
the requested instruction from memory.

• The Instruction Decode (ID) stage is responsible for

decoding the instruction and sending out the various control
lines to the other parts of the processor.

• The Execution (EX) stage is where any calculations are

performed. The main component in this stage is the ALU. The
ALU is made up of arithmetic, logic and capabilities.

08-Nov-23 By Shimelis A. 32
 Cont’d…
• The Memory and IO (MEM) stage is responsible for storing
and loading values to and from memory. It also responsible for
input or output from the processor. If the current instruction is
not of Memory or IO type than the result from the ALU is
passed through to the write back stage.

• The Write Back (WB) stage is responsible for writing the

result of a calculation, memory access or input into the register
file.

08-Nov-23 By Shimelis A. 33
 Operation Timings
Instruction 2ns
• Estimated timings for each of the Fetch
stages:
Instruction 1ns
Decode
Execution 2ns

Memory 2ns
and IO
Write Back 1ns

08-Nov-23 By Shimelis A. 34
 Advantages/Disadvantages of pipelining

Advantages:
• More efficient use of processor
• Quicker time of execution of large number of
instructions

Disadvantages:
• Pipelining involves adding hardware to the chip
• Inability to continuously run the pipeline at full speed
because of pipeline hazards which disrupt the smooth
execution of the pipeline.
08-Nov-23 By Shimelis 35
A.
 Pipeline Hazards
• Data Hazards – an instruction uses the result of the previous
instruction. A hazard occurs exactly when an instruction tries
to read a register in its ID stage that an earlier instruction
intends to write in its WB stage.

• Control Hazards – the location of an instruction depends on

previous instruction

• Structural Hazards – two instructions need to access the

same resource

08-Nov-23 By Shimelis 36
A.
 Data Hazards
Select R 2 a n d R 3 for S TO R E S U M IN
A D D R2 and R3
A L U Operat ions R1

A D D R1, R2, R3 IF ID EX M WB

S U B R4, R1, R5 IF ID EX M WB

Select R 1 a n d R 5 for
A L U Operat ions

08-Nov-23 By Shimelis 37
A.
 Solution  Stalling

• Stalling involves halting the flow of instructions until the required

result is ready to be used. However stalling wastes processor time
by doing nothing while waiting for the result.

ADD R1, R2, R3 IF ID EX M WB

STALL IF ID EX M WB

STALL IF ID EX M WB

STALL IF ID EX M WB

. IF ID EX M WB 38
SUB R4, R1, R5

08-Nov-23 By Shimelis A. 38
 The Control Unit
 component of the computer’s CPU (central processing unit)
that directs the processor’s operation.
 to instruct the computer’s ALU, memory, and input and output
devices on how to respond to the instructions.

08-Nov-23 By Shimelis A. 39
 Function of CU
 It coordinates the flow of data out of, into, and between the
various subunits of a processor.
 It understands commands and instructions.
 It regulates the flow of data within the processor.
 It accepts external commands or instructions, which it turns into a
series of control signals.
 It is in charge of a CPU’s multiple execution units (such as
ALUs, and registers).
 It also performs a variety of activities, including fetching,
decoding, handling execution, and storing results.

08-Nov-23 By Shimelis A. 40
 Type OF CU
 Here are the types of control units:
1.Hardwired Control Unit
 The control signals are generated by specially built
hardware logical circuits.
 We can’t change the signal production mechanism without
physically changing the circuit structure.
2. Micro Programmable Control Unit
 saves binary control values as words in memory.
 The programming approach is used to implement
 The control memory stores a microprogram composed of
microinstructions.
 The creation of a set of control signals is dependent on the
execution of a microinstruction.

By Shimelis A.
08-Nov-23 41
 Comparison of Microprogrammed and hardwired CU

08-Nov-23 By Shimelis A. 42
 Basic CPU Architectures

• There are two types of fundamental CPU architectures

1. Complex Instruction Set Computers (CISC)

2. Reduced Instruction Set Computers (RISC).

 RISC is the way to make hardware simpler whereas CISC is the
single instruction that handles multiple work.

08-Nov-23 By Shimelis A. 43
 Reduced Instruction Set (RISC)
• to simplify hardware by using an instruction set composed of a
few basic steps for loading, evaluating, and storing operations
 load command will load data, a store command will store
the data.
Characteristics of RISC
 Simpler instruction, hence simple instruction decoding.
 Instruction takes a single clock cycle to get executed.
 More general-purpose registers.
 Simple Addressing Modes.
 A pipeline can be achieved.

08-Nov-23 By Shimelis A. 44
 Cont’d…
Advantages of RISC
Simpler instructions
Faster execution
Lower power consumption
Disadvantages of RISC
 More instructions required
 Increased memory usage
 Higher cost

08-Nov-23 By Shimelis A. 45
 Complex Instruction Set (CISC)
 single instruction will do all loading, evaluating, and storing
operations
 a multiplication command will do stuff like loading data,
evaluating, and storing it, hence it’s complex.
Characteristics of CISC
Complex instruction, hence complex instruction decoding.
Instructions are larger than one-word size.
Instruction may take more than a single clock cycle to get
executed.
Less number of general-purpose registers as operations get
performed in memory itself.
Complex Addressing Modes.
More Data types.

08-Nov-23 By Shimelis A. 46
 Cont’d…
Advantages of CISC
 Reduced code size
 memory efficient
 Widely used
Disadvantages of CISC
Slower execution: CISC processors take longer to execute
instructions
More complex design: the complexity of instruction make
design and manufacture difficult
Higher power consumption: use more power compared to
RISC

By Shimelis A.
08-Nov-23 47
Comparison of RISC and CISC

By Shimelis A.
08-Nov-23 48
 10 Q V.MUCH!!!!
ANY
QUESTION?????????????
IF NO

By Shimelis A.
08-Nov-23 49
 Group Assignment #2 (10%)
• Discuss what is addressing mode is and discuss the type of
addressing modes, the difference among them clearly. Use examples to
verify each addressing mode. 3pts
• Discuss computer arithmetic with example and also about ALU? 3pts
• Basic of microprocessor 8086 about its control unit and CPU
architecture. 2pts
• Read about memory management system its type and advantage. 2pts

 Based on 1-5 group.

 Due date after 10 days from today
 Evaluation is individually.
08-Nov-23 By Shimelis A. 50