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3 views24 pages

34 8254timer

Uploaded by

boatrockerz83
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Microprocessors & Interfacing

8254 Programmable
BITS Pilani Interrupt Timer
Dr. Gargi Prabhu
Pilani Campus
Department of CS & IS
8254 Timer

• The 8254 programmable interval timer consists of three


independent 16-bit programmable counters (timers).
• Each counter is capable of counting in binary or binary-coded
decimal (BCD).
• The maximum allowable input frequency to any counter is 10
MHz.
• This device is useful wherever the microprocessor must
control real-time events. Some examples of usage include
real-time clock and an events counter, and for motor speed
and direction control.

BITS Pilani, Pilani Campus


8254 Timer

This timer also appears in the personal computer decoded at


ports 40H–43H to do the following:
1. Generate a basic timer interrupt that occurs at approximately
18.2 Hz.
2. Cause the DRAM memory system to be refreshed.
3. Provide a timing source to the internal speaker and other
devices. The timer in the personal computer is an 8253
instead of an 8254.

BITS Pilani, Pilani Campus


Functional Description

BITS Pilani, Pilani Campus


Pin Definitions

BITS Pilani, Pilani Campus


Programming the 8254

BITS Pilani, Pilani Campus


Programming the 8254

BITS Pilani, Pilani Campus


Read Write Operation Summary

BITS Pilani, Pilani Campus


Mode 0 (Interrupt on Terminal
Count)
• Allows the 8254 counter to be used as an events counter.
• In this mode, the output becomes a logic 0 when the control
word is written and remains there until N plus the number of
programmed counts. For example, if a count of 5 is
programmed, the output will remain a logic 0 for 6 counts
beginning with N. Note that the gate (G) input must be a logic
1 to allow the counter to count. If G becomes a logic 0 in the
middle of the count, the counter will stop until G again
becomes a logic 1.

BITS Pilani, Pilani Campus


Mode 0

BITS Pilani, Pilani Campus


Mode 1 Programmable One Shot
• Causes the counter to function as a retriggerable, monostable
multivibrator (one-shot).
• In this mode the G input triggers the counter so that it
develops a pulse at the OUT connection that becomes a logic
0 for the duration of the count.
• If the count is 10, then the OUT connection goes low for 10
clocking periods when triggered. If the G input occurs within
the duration of the output pulse, the counter is again
reloaded with the count and the OUT connection continues
for the total length of the count.

BITS Pilani, Pilani Campus


Mode 1

BITS Pilani, Pilani Campus


Mode 2 Rate Generator

• Allows the counter to generate a series of continuous pulses


that are one clock pulse wide.
• The separation between pulses is determined by the count.
For example, for a count of 10, the output is a logic 1 for nine
clock periods and low for one clock period.
• This cycle is repeated until the counter is programmed with a
new count or until the G pin is placed at a logic 0 level.
• The G input must be a logic 1 for this mode to generate a
continuous series of pulses

BITS Pilani, Pilani Campus


Mode 3 Square Wave Generator

• Generates a continuous square wave at the OUT connection,


provided that the G pin is a logic 1.
• If the count is even, the output is high for one half of the
count and low for one half of the count. If the count is odd,
the output is high for one clocking period longer than it is low.
• For example, if the counter is programmed for a count of 5,
the output is high for three clocks and low for two clocks.

BITS Pilani, Pilani Campus


Mode 4 S/W Trigger Strobe

• Allows the counter to produce a single pulse at the output.


• If the count is programmed as a 10, the output is high for 10
clocking periods and low for one clocking period.
• The cycle does not begin until the counter is loaded with its
complete count.
• This mode operates as a software triggered oneshot.
• As with modes 2 and 3, this mode also uses the G input to
enable the counter. The G input must be a logic 1 for the
counter to operate for these three modes.

BITS Pilani, Pilani Campus


Mode 5 H/W Trigger Strobe

• A hardware triggered one-shot that functions as mode 4,


except that it is started by a trigger pulse on the G pin instead
of by software.
• This mode is also similar to mode 1 because it is retriggerable.

BITS Pilani, Pilani Campus


Mode 4 Vs Mode 5

BITS Pilani, Pilani Campus


Generating a Waveform with the
8254

The 8254 interfaced to an 8


MHz 8086 so that it generates a
100 KHz square wave at OUT0
and a 200 KHz continuous
pulse at OUT1.

BITS Pilani, Pilani Campus


Reading a Counter

• Each counter has an internal latch that is read with the read
counter port operation. These latches will normally follow the
count.
• If the contents of the counter are needed, then the latch can
remember the count by programming the counter latch
control word which causes the contents of the counter to be
held in a latch until they is read. Whenever a read from the
latch or the counter is programmed, the latch tracks the
contents of the counter

BITS Pilani, Pilani Campus


The 8254-2 read-back control word

• When it is necessary for the contents of more than one


counter to be read at the same time, we use the read-back
control word.
• With the read-back control word, the CNT’ bit is a logic 0 to
cause the counters selected by CNT0, CNT1, and CNT2 to be
latched. If the status register is to be latched, then the bit is
placed at a logic 0.

BITS Pilani, Pilani Campus


The 8254-2 status register

• Status register, which shows the state of the output pin,


whether the counter is at its null state (0), and how the
counter is programmed.

BITS Pilani, Pilani Campus


Programming 8254

BITS Pilani, Pilani Campus


Applications of 8254

• Real time clock


• Event-counter
• Digital one-shot
• Programmable rate generator
• Square wave generator
• Binary rate multiplier
• Complex waveform generator
• Complex motor controller

BITS Pilani, Pilani Campus


BITS Pilani
Pilani Campus

Thank You

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