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Lect 1 (Introduction)

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0% found this document useful (0 votes)
15 views20 pages

Lect 1 (Introduction)

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f20220787
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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BITS Pilani

Pilani Campus

EEE/CS/ECE/INSTR F241 Microprocessor Programming & Interfacing


Lect-1
Prof. Meetha.V.Shenoy
Team of Instructors

Prof. Meetha V Shenoy (IC)


Prof. Vinay Chamola

MPI@Meetha V Shenoy
Tutorial Instructors

• Prof. GSS Chalapathi,


• Prof. Satyendra Kumar Mourya,
• Prof. Neeraj Mishra,
• Prof. Tejasvi Alladi,
• Mr.Naga Siva Sai Reddy,
• Mr.Balamurugan,
• Mr.Anubhav Elhence,
• Ms. Jyoti Pandey

MPI@Meetha V Shenoy
General Purpose Computers/ Embedded Systems &
Microprocessors

In today’s world, we have Embedded Systems all around us. Almost all modern electronic systems
can be considered as Embedded Systems.

MPI@Meetha V Shenoy
Microprocessor Vs Microcontroller

Instruction
Memory I/O Instruction
Memory I/O

Microprocessor Microprocessor
Data Memory
I/O Data Memory
I/O

Timers Timers

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Von-Neumann/ Princeton Memory architecture

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Harvard Memory architecture

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Registers
• Assembly level Instruction

ADD R1, R2, R3

Registers can be 8-bit/16-bit/32-bit/64-bit etc.

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• What do you understand by the term
8-bit, 16-bit , 32 or 64 bit processor?

Size of the ALU

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Microcontroller Vs SOC

BCM2385,
Raspberry Pi 3

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OMAP 4430- SOC

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Complex Instruction Set Computer
CISC Vs RISC Reduced Instruction Set Computer

c=a x b

CISC
• MUL C, A, B
RISC
• LOAD R1,A
• LOAD R2, B
• MUL R1, R1,R2
• STORE R1, C

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CISC Vs RISC

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Module 1

MPI@Meetha V Shenoy
BITS Pilani, Pilani Campus
Microprocessor

Instruction
Memory I/O

Microprocessor

Data Memory
I/O

Timing, RTC

MPI@Meetha V Shenoy
Module 2

MPI@Meetha V Shenoy
BITS Pilani, Pilani Campus
Motherboard

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Module 3

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Evaluation Scheme

Lab (regular): 2 marks for each lab. 1 mark for attendance, 1 for right answers, Best 7 will be
taken of 9 labs
Tutorial exams: Best 8 will be taken of 10 tuts

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Thank You

MPI@Meetha V Shenoy

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