DLD_Module_3-Sequential_circuit_design_Lecture-5
DLD_Module_3-Sequential_circuit_design_Lecture-5
Module-3
Latches
Flip flops
Flip flop conversions
Finite State Machine – design using mealy and Moore state machines
Sequence detectors and generators design
Shift Registers
Counters-synchronous and asynchronous counters
Ring and Johnson counters
Lecture-5
Textbooks
1. M.Morris Mano, Michael D Ciletti, Digital Design, 5th edition, Pearson Publishers, 2013.
2. R.P. Jain, “Modern Digital Electronics”, 4th edition, TMH.
References
1. M.Morris Mano, Charles R. Kime, Tom Martin, Logic and Computer Design Fundamentals, 4th edition,
Pearson Publishers.
2. C. H. Roth and L. L. Kinney, Fundamentals of Logic Design, 5th edition, Cengage Publishers.
The finite state machines (FSMs) are significant for understanding the decision-making logic
as well as control the digital systems.
The most general model of a sequential circuit has inputs, outputs, and internal states.
Basically, there are two methods for arranging a sequential logic design namely Mealy
machine as well as Moore machine.
Hence, the finite state machines are classified into two types
1. Mealy State Machine
2. Moore State Machine
The Mealy state machines are the sequential circuits whose outputs depend on both the current state
and the current input.
In a Mealy Machine, the outputs change asynchronously with respect to the clock since inputs can
change at any time. This means outputs change at unpredictable times and timing analysis is harder.
In order to synchronize a Mealy-type circuit, the inputs of the sequential circuit must be synchronized
with the clock and the outputs must be sampled immediately before the clock edge.
Thus, the output of the Mealy machine is the value that is present immediately before the active edge
of the clock.
The Moore state machines are the sequential circuits whose outputs depend only on the
current state.
In a Moore Machine, the outputs change synchronously with the clock as the state changes
synchronously with the clock. This means outputs change at predictable times and timing
analysis easy.
In Moore Model, the outputs of the sequential circuit are synchronized with the clock,
because they depend only on flip-flop outputs that are synchronized with the clock.
Analysis describes what a given circuit will do under certain operating conditions.
The analysis of a sequential circuit consists of obtaining a table or diagram for the time sequence of
inputs, outputs, and internal states.
It is also possible to write a Boolean expression that describes the behavior of the sequential circuit.
A logic diagram is recognized as a clocked sequential circuit if it contains flip-flops (of any type) with
clock inputs.
We are going to use state tables and state diagrams to formally represent the behavior of the digital
circuit.
e.g., given a current state and current inputs, how will the state and outputs change when
the next active clock edge arrives???
1. Write down the equations for the outputs and the flip-flop inputs.
2. Using these equations, derive a state table which describes the next state.
3. Obtain a state diagram from the state table.
It is the state table and/or state diagram that specifies the behavior of the circuit.
Notes:
The flip-flop input equations are sometimes called the excitation equations.
The state table is sometimes called a transition table.
Solution:
Step 1: (State Equations)
A(t + 1) = Ax + Bx
B(t + 1) = A’x A(t+1) Next State
A(t) Present State
Similarly,
y = (A + B)x’
01 11
x=1/y=0
For (01) state, when input x=0, next state is (00) For (01) state, when input x=1, next state is (11)
and output y=1. That is why, one arrow from (01) and output y=0 and another arrow from (01) to
to (00) with x/y is 0/1. (11) with x/y is 1/0.
Solution: Bx AB