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DLD_Module_3-Sequential_circuit_design_Lecture-5

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0% found this document useful (0 votes)
7 views

DLD_Module_3-Sequential_circuit_design_Lecture-5

Uploaded by

mahammadgaleeb
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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CONTENTS

Module-3

 Latches
 Flip flops
 Flip flop conversions
 Finite State Machine – design using mealy and Moore state machines
 Sequence detectors and generators design
 Shift Registers
 Counters-synchronous and asynchronous counters
 Ring and Johnson counters

Sequential Logic Circuit Design 2


CONTENTS

Lecture-5

 Finite State Machine


 Mealy state machines
 Moore state machines

Sequential Logic Circuit Design 3


BOOKS

Textbooks

1. M.Morris Mano, Michael D Ciletti, Digital Design, 5th edition, Pearson Publishers, 2013.
2. R.P. Jain, “Modern Digital Electronics”, 4th edition, TMH.

References

1. M.Morris Mano, Charles R. Kime, Tom Martin, Logic and Computer Design Fundamentals, 4th edition,
Pearson Publishers.
2. C. H. Roth and L. L. Kinney, Fundamentals of Logic Design, 5th edition, Cengage Publishers.

Sequential Logic Circuit Design 4


Sequential Logic Circuit Design 5
FINITE STATE MACHINES

 The finite state machines (FSMs) are significant for understanding the decision-making logic
as well as control the digital systems.
 The most general model of a sequential circuit has inputs, outputs, and internal states.
 Basically, there are two methods for arranging a sequential logic design namely Mealy
machine as well as Moore machine.
 Hence, the finite state machines are classified into two types
1. Mealy State Machine
2. Moore State Machine

Sequential Logic Circuit Design 6


MEALY STATE MACHINES

 The Mealy state machines are the sequential circuits whose outputs depend on both the current state
and the current input.
 In a Mealy Machine, the outputs change asynchronously with respect to the clock since inputs can
change at any time. This means outputs change at unpredictable times and timing analysis is harder.

Sequential Logic Circuit Design 7


MEALY STATE MACHINES

 In order to synchronize a Mealy-type circuit, the inputs of the sequential circuit must be synchronized
with the clock and the outputs must be sampled immediately before the clock edge.
 Thus, the output of the Mealy machine is the value that is present immediately before the active edge
of the clock.

Sequential Logic Circuit Design 8


MOORE STATE MACHINES

 The Moore state machines are the sequential circuits whose outputs depend only on the
current state.
 In a Moore Machine, the outputs change synchronously with the clock as the state changes
synchronously with the clock. This means outputs change at predictable times and timing
analysis easy.

Sequential Logic Circuit Design 9


MOORE STATE MACHINES

 In Moore Model, the outputs of the sequential circuit are synchronized with the clock,
because they depend only on flip-flop outputs that are synchronized with the clock.

Sequential Logic Circuit Design 10


ANALYSIS OF SEQUENTIAL CIRCUITS

 Analysis describes what a given circuit will do under certain operating conditions.
 The analysis of a sequential circuit consists of obtaining a table or diagram for the time sequence of
inputs, outputs, and internal states.
 It is also possible to write a Boolean expression that describes the behavior of the sequential circuit.
 A logic diagram is recognized as a clocked sequential circuit if it contains flip-flops (of any type) with
clock inputs.
 We are going to use state tables and state diagrams to formally represent the behavior of the digital
circuit.
e.g., given a current state and current inputs, how will the state and outputs change when
the next active clock edge arrives???

Sequential Logic Circuit Design 11


ANALYSIS OF SEQUENTIAL CIRCUITS

 The basic procedure for analyzing a clocked sequential circuit:

1. Write down the equations for the outputs and the flip-flop inputs.
2. Using these equations, derive a state table which describes the next state.
3. Obtain a state diagram from the state table.

 It is the state table and/or state diagram that specifies the behavior of the circuit.

Notes:
 The flip-flop input equations are sometimes called the excitation equations.
 The state table is sometimes called a transition table.

Sequential Logic Circuit Design 12


ANALYSIS OF SEQUENTIAL CIRCUITS

Example 1: Analyze the clocked sequential


circuit as shown the figure.

Solution:
Step 1: (State Equations)

 The behavior of a clocked sequential circuit


can be described algebraically by means of
state equations. A state equation specifies the
next state as a function of the present state and
inputs.
 It consists of two D flip-flops A and B, an input x
and an output y.

Sequential Logic Circuit Design 13


ANALYSIS OF SEQUENTIAL CIRCUITS

Step 1: (State Equations) Ax


Ax + Bx Ax + Bx
 Since the D Flip-flop provides same output that
appears in the input.
Bx
 Hence, the value of the next state (i.e., the state
reached after the clock transition), it is possible to
write a set of state equations for the circuit:

A(t + 1) = A(t)x(t) + B(t)x(t) A’x


A’x
B(t + 1) = A(t)’x(t)
In general, removing the present state time t

A(t + 1) = Ax + Bx
B(t + 1) = A’x A(t+1)  Next State
A(t)  Present State

Sequential Logic Circuit Design 14


ANALYSIS OF SEQUENTIAL CIRCUITS

Step 1: (State Equations)

 Similarly,

y(t) = [A(t) + B(t)]x’(t)


By removing the present state time

y = (A + B)x’

 The logic diagram of the circuit can be expressed


algebraically with two flip-flop input equations and
an output equation:
DA = Ax + Bx’ A+B
DB = A’x
y = (A + B)x’ (A + B)x’
x’

Sequential Logic Circuit Design 15


ANALYSIS OF SEQUENTIAL CIRCUITS

Step 2: (State Table)

 The time sequence of inputs, outputs, and flip-


flop states can be enumerated in a state table
(sometimes called a transition table).
 The table consists of four sections labeled
present state, input, next state, and output.
 Present state at time t
 Input x at time t
 Next state at time (t+1)
 Output at time t

Sequential Logic Circuit Design 16


ANALYSIS OF SEQUENTIAL CIRCUITS

Step 2: (State Table)

Sequential Logic Circuit Design 17


ANALYSIS OF SEQUENTIAL CIRCUITS

Step 3: (State Diagram)

 The information available in a state table can be x=0/y=0 x=1/y=0


represented graphically in the form of a state diagram.
 As, there are two flip-flops with states A & B, hence, 4 x=0/y=1
00 10
combinations are possible namely AB={00,01,10,11}
x=0/y=1
x=1/y=0
x=1/y=0
x=0/y=1

01 11
x=1/y=0

Sequential Logic Circuit Design 18


ANALYSIS OF SEQUENTIAL CIRCUITS

Step 3: (State Diagram)


x/y
 The information available in a state table can be
represented graphically in the form of a state diagram. AB
 As, there are two flip-flops with states A & B, hence, 4
combinations are possible namely AB={00,01,10,11}

Sequential Logic Circuit Design 19


ANALYSIS OF SEQUENTIAL CIRCUITS

For (01) state, when input x=0, next state is (00) For (01) state, when input x=1, next state is (11)
and output y=1. That is why, one arrow from (01) and output y=0 and another arrow from (01) to
to (00) with x/y is 0/1. (11) with x/y is 1/0.

Sequential Logic Circuit Design 20


ANALYSIS OF SEQUENTIAL CIRCUITS

Example 2: Analyze the clocked sequential circuit as shown the figure.

Sequential Logic Circuit Design 21


ANALYSIS OF SEQUENTIAL CIRCUITS

Solution: Bx AB

Step 1: (State Equations)

 Here, one input signal i.e. x and two Flip-flops


with states A & B. Now the state equations can be
written as
x
TA = Bx
TB = x
y = AB
 Now the main challenge is to find the next state.

Sequential Logic Circuit Design 22


ANALYSIS OF SEQUENTIAL CIRCUITS

 As we know the characteristics equation of T flip-flop


is

 Now, here states are A & B, hence the next states


become

 Substituting the values of TA and TB from the input


equations, we obtain the state equations for A and B:

Sequential Logic Circuit Design 23


ANALYSIS OF SEQUENTIAL CIRCUITS

Step 2: (State Table)

Sequential Logic Circuit Design 24


ANALYSIS OF SEQUENTIAL CIRCUITS

Step 3: (State Diagram)

Sequential Logic Circuit Design 25


SUMMARY

Mealy Machine Moore Machine


0/0 0
Reset S1
S1 Input [0] Output
1/0 1/1 O/P is dependent
on current state 1 1 Input
Output and input
Transition
S2 S2
[1] Output is
Arc dependent only
0/1 0 on current state
 Mealy Machine: Output is associated
 Moore Machine: Output is associated
with the state transition
 With the state Appears after the state
 Appears before the state transition is
transition takes place.
completed (by the next clock pulse).

Sequential Logic Circuit Design 26


Sequential Logic Circuit Design 27

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