UNIT III PROGRAMMABLE PERIPHERAL INTERFACE 9

Introduction – Architecture of 8255, Keyboard Interfacing, LED display – Interfacing, ADC and DAC
Interface, Temperature Control – Stepper Motor Control – Traffic Control Interface.

3.0 INTRODUCTION
Programmable peripheral interface 8255
 PPI 8255 is a general purpose programmable I/O device designed to interface the CPU with its
outside world such as ADC, DAC, keyboard etc.

 We can program it according to the given condition. It can be used with almost any
microprocessor.

 It consists of three 8-bit bidirectional I/O ports i.e. PORT A, PORT B and PORT C. We can assign
different ports as input or output functions.

Features of 8255

The prominent features of 8255 are as follows −

1. The 8255 is a widely used, programmable parallel I/O device or parallel communication
interface.
2. It can be programmed to transfer data under various conditions, from simple I/O to interrupt
I/O
3. It is flexible, versatile and economical (when multiple I/O ports are required).
4. It has three 8 bit ports port A, Port B and Port C.
5. It is a 40 pin Dip chip.
6. It is completely TTL compatible.
7. All I/O Pins of 8255 has 2.5 mA d.c driving capacity.
8. Ports of 8255A

 8255A has three ports, i.e., PORT A, PORT B, and PORT C.

 Port A contains one 8-bit output latch/buffer and one 8-bit input buffer.

 Port B is similar to PORT A.

 Port C can be split into two parts, i.e. PORT C lower (PC0-PC3) and PORT C upper (PC7-

PC4) by the control word.

 These three ports are further divided into two groups, i.e. Group A includes PORT A and upper
PORT C.
 Group B includes PORT B and lower PORT C.
 These two groups can be programmed in three different modes, i.e. the first mode is named as
mode 0, the second mode is named as Mode 1 and the third mode is named as Mode 2.

Page.No. 1
Operating Modes
8255A has three different operating modes −
1. Mode 0 :
 In this mode, Port A and B is used as two 8-bit ports and Port C as two 4-bit ports.
 Each port can be programmed in either input mode or output mode where outputs are
latched and inputs are not latched. Ports do not have interrupt capability.

2. Mode 1 :
 In this mode, Port A and B is used as 8-bit I/O ports.
 They can be configured as either input or output ports.
 Each port uses three lines from port C as handshake signals. Inputs and outputs are latched.
3. Mode 2 :
 In this mode, Port A can be configured as the bidirectional port and Port B either in Mode 0 or
Mode 1.
 Port A uses five signals from Port C as handshake signals for data transfer.
 The remaining three signals from Port C can be used either as simple I/O or as handshake for
port B.

3.1 ARCHITECTURE OF 8255:

The following figure shows the architecture of 8255A .

Fig. 3.1- Block Diagram of 8255A

Page.No. 2
  It consists of data bus buffer, control logic and Group a AND Group B controls.
1. Data Bus Buffer
 It is a tri-state Bidirectional 8-bit buffer, which is used to interface the microprocessor to the
system data bus.
 Data is transmitted or received by the buffer as per the instructions by the CPU. Control
words and status information are also transferred using this data bus buffer.

2. Read/Write Control Logic

 This block is responsible for controlling the internal/external transfer of data/control/status

word.
 It accepts the input from the CPU address and control buses, and in turn issues command to
both the control groups.
(i) A0 and A1
 These input signals work with RD, WR, and one of the control signal. Following is the table
showing their various signals with their result.
(ii) CS- Chip Select:
 It stands for Chip Select.
 A LOW on this input selects the chip and enables the communication between the 8255A and
the CPU.
 It is connected to the decoded address, and A0 & A1 are connected to the microprocessor
address lines.
(iii) WR- Write:
 It stands for write.
 This control signal enables the write operation.
 When this signal goes low, the microprocessor writes into a selected I/O port or control
register.
(iv) RESET
 This is an active high signal.
 It clears the control register and sets all ports in the input mode.
(v) RD
 It stands for Read.
 This control signal enables the Read operation.
 When the signal is low, the microprocessor reads the data from the selected I/O port of the
8255.
3. Group A and Group B Controls
 The functional configuration of each port is programmed by the system software.
 In essence, the CPU "output" a control word to the 8255A.

Page.No. 3
  The control word contains information such initializes the functional configuration of the
8255A.
 Each of the Control blocks accepts ( Group A and Group B) accepts commands from the
Read/Write Control Logic, receives control words from the internal data bus and issues the
proper commands to its associated ports.
 Port A: One 8 bit data output latch/buffer and one 8-bit data input latch.
 Port B: One 8-bit data output latch/buffer and one 8-bit data input buffer.
 Port C: One 8-bit data output latch/buffer and one 8-bit data input buffer. (No Latch for
input). This port can be divided into 4-bit ports under the mode control. Each 4-bit port
contains a 4-bit latch and it can be used for the controls signal outputs and status signal
inputs in conjunction with ports A and B.

PIN DIAGRAM OF 8255:

Fig. 3.2- Pin Diagram of 8255A

 PA0 – PA7 – Pins of port A
 PB0 – PB7 – Pins of port B
 PC0 – PC7 – Pins of port C
 D0 – D7 – Data pins for the transfer of data
 RESET – Reset input
 RD’ – Read input
 WR’ – Write input

Page.No. 4
  CS’ – Chip select
 A1 and A0 – Address pins

Modes of operation of 8255:

It works in two modes:
1. Bit set reset (BSR) mode
2. Input/output (I/O) mode

Operating modes –
1. Bit set reset (BSR) mode – If MSB of control word (D7) is 0, PPI works in BSR mode. In this
mode only port C bits are used for set or reset.

2. Input-Output mode – If MSB of control word (D7) is 1, PPI works in input-output mode. This is
further divided into three modes:

Mode 0 :
 In this mode all the three ports (port A, B, C) can work as simple input function or simple
output function. In this mode there is no interrupt handling capacity.
Mode 1 :
 Handshake I/O mode or strobed I/O mode. In this mode either port A or port B can work as
simple input port or simple output port, and port C bits are used for handshake signals before
actual data transmission.
 It has interrupt handling capacity and input and output are latched.
 Example: A CPU wants to transfer data to a printer.
 In this case since speed of processor is very fast as compared to relatively slow printer, so
before actual data transfer it will send handshake signals to the printer for synchronization of
the speed of the CPU and the peripherals.

Page.No. 5
 Mode 2 :
 Bi-directional data bus mode. In this mode only port A works, and port B can work either in
mode 0 or mode 1.
 6 bits ports C are used as handshake signals. It also has interrupt handling capacity.

Advantages:

 Versatility: The PPI 8255 can be programmed to operate in a variety of modes, which
makes it a versatile component in many different systems. It provides three 8-bit ports that
can be configured as input or output ports, and supports multiple modes of operation for
each port.
 Ease of use: The PPI 8255 is relatively easy to use and program, even for novice
programmers. The control register of the PPI can be programmed using simple commands,
which makes it easy to interface with other devices.
 Compatibility: The PPI 8255 is widely used and has been around for many years, which
means that it is compatible with a wide range of devices and software.
 Low cost: The PPI 8255 is a relatively low-cost component, which makes it an affordable
option for many different applications.

Disadvantages:

 Limited functionality: While the PPI 8255 is versatile, it has limited functionality compared
to newer I/O interface components. It is not capable of high-speed data transfer and has
limited memory capacity.
 Limited number of ports: The PPI 8255 provides only three 8-bit ports, which may not be
sufficient for some applications that require more I/O ports.
 Limited resolution: The PPI 8255 provides only 8 bits of resolution for each port, which may
not be sufficient for some applications that require higher resolution.
 Obsolete technology: While the PPI 8255 is still used in some applications, it is considered
an older technology and is being replaced by newer, more advanced I/O interface
components.

Page.No. 6
3.2 KEYBOARD INTERFACING:
 Keyboards are arranged in a matrix of rows and columns.
 The controller access both rows and columns through ports.
 Using two ports, we can connect to an 8x8 or a 4x4 matrix keyboard.
 When a key is pressed, a row and column make a contact, otherwise there is no contact.
 We will look at the details using a 4x4 keyboard. 4X 4 KEYBOARD Figure 5.4.31 shows a 4 x4
matrix connected to two ports.
 The rows are connected to an output port(Port 1) and the columns are connected to an input
port. (Port 2)
 If no key has been pressed, reading the input port will yield 1s for all columns since they are all
connected to high (Vcc). If all the rows are grounded and a key is pressed, one of the columns will
have 0
 since the key pressed provides the path to ground. It is the function of the microcontroller to
scan the keyboard continuously to detect and identify the key pressed.
 Getting meaningful data from a keyboard requires three major tasks:
1. Detect a keypress
2. Debounce the keypress.
3. Encode the keypress (produce a standard code for the pressed key).
 Logic 0 is read by the microprocessor when the key is pressed.
Key Debounce
 Whenever a mechanical push-bottom is pressed or released once, the mechanical components of
the key do not change the position smoothly; rather it generates a transient response.
 These may be interpreted as the multiple pressures and responded accordingly.

Fig. 3.3- A mechanical key and its response

Fig. 3.3.1 Hardware debouncing circuit

Page.No. 7
 The rows of the matrix are connected to four output Port lines, and columns are connected to
four input Port lines.
 When no keys are pressed, the column lines are held high by the pull-up resistors connected to +
5 V.
 Pressing a key connects a row and a column.
 To detect if any key is pressed is to output 0 to all rows and then check columns to see if a
pressed key has connected a low (zero) to a column.
 Once the columns are found to be all high, the program enters another loop, which waits until a
low appears on one of the columns i.e indicating a key press.

Fig. 3.4- Interfacing 4 x 4 Keyboard

 A simple 20/10 msec delay is executed to debounce task.
 After the debounce time, another check is made to see if the key is still pressed. If the columns are
now all high, then no key is pressed and the initial detection was caused by a noise pulse.
 The final task is to determine the row and column of the pressed key and convert this
information to Hex-code for the pressed key.
 The 4-bit code from I/P port and the 4-bit code from O/P port (row &column) are converted to
Hex-code.
 To avoid this problem, two schemes are suggested:
1. Use of Bistable multivibrator at the output of the key to debounce it.
2. The microprocessor has to wait for the transient period (at least for 10 ms), so that the
transient response settles down and reaches a steady state.
 If any of the columns are low now, then the assumption is made that it was a valid key press.

Page.No. 8
 The final task is to determine the row and column of the pressed key and convert this
information to Hex-code for the pressed key.
 The 4-bit code from I/P port and the 4-bit code from O/P port (row and column) are converted to
Hex- code.

Fig. 3.5- Keyboard Interfacing

Page.No. 9
3.3 LED DISPLAY INTERFACING:
 The most popular display is the Light Emitting Diode (LED) which is available in a variety of
forms: single LED, bi-colour LED, and seven segments LED.
 Another popular display device is the Liquid Crystal Display (LCD), which is also gaining
popularity because of its low power consumption.
Seven Segment LEDS
 There are many applications where you have to display numbers.
 The most popular display device used for displaying numbers is seven segment LED displays.

Fig. 3.3.1 (a) Seven segment LED Display module

 Seven Segment displays are used in a number of systems to display the numeric information.
 The seven segments can display one digit at a time.
 Thus the number of segments used depends on the number of digits in the number to be
displayed.
 In each module, seven (eight including the display point) LED segments are fabricated in a
pattern as shown in Fig. 3.3.1 (a).

Fig. 3.3.1 (b) Common cathode type Fig. 3.3.1 (c) Common anode type
7- segment LED seven segment LED
 The seven segments are numbered as a, b, c, d, e, f, g and the decimal point as dp.
 To reduce the number of pin counts, either all the cathodes are connected together inside the
module providing common cathode type display as shown in Fig. 3.3.1 (b) or all the anodes are
connected together providing common anode type display as shown in Fig. 3.3.1 (c).
 Both the types are commercially available.
 Depending on the type used, interface circuitry has to be made accordingly.
 All hex character from 0 to F can be conveniently displayed using seven segment LED displays as
shown in Fig. 3.3.2.

Page.No. 10
 Fig. 3.3.2. Display of Hex characters using Seven- segment LEDs

 One disadvantage of LED is that the readability of display becomes poor in bright light.
 To improve readability, the display is covered with amber coloured plastic sheet. an

Interfacing LED Display

 Fig. 3.3.3 shows the 8255A connected to set of 8, seven segment LED displays.
 In this circuit ports A and B are programmed as (mode-0) simple latched output ports.
 Port-A provides the segment data inputs to the display and port-B provides a means of selecting a
display.
 The resistor in series with the base of the segment switch assumes that the minimum gain of the
transistors is 100.
 The base current is, therefore, 80Ma / 100 = 0.8mA

Page.No. 11
Page.No. 12
3.4 ADC INTERFACE:
 The analog to digital converter chips 0808 and 0809 are 8-bit CMOS devices with an 8- channel
multiplexer.
 These devices are also designed to operate from common microprocessor control buses, with tri-
state output latches driving the data bus.
Analog to Digital Converter (ADC)
 An Analog to Digital Converter (ADC or A/D or A to D) is a device that converts a continuous
physical quantity to a digital number that represents the quantity's amplitude.

Fig. 3.4.1 Block schematic of ADC

 To convert an analog signal to digital, the time axis has to be divided into a number of equally
spaced intervals.
 This process is knows as "Quantisation".
 The input to ADC is the analog signal and output is in digital form.
Types of ADC
 Various types of ADCs are
1. Flash type ADC
2. Counter/ramp type ADC
3. Successive approximation type ADC
Features
a. 8-bit successive approximation ADC
b. Easy interface to all microprocessors
c. It operates on single 5 V DC or analog span
d. Adjusted voltage reference
e. No zero or full-scale adjust required
f. 8-channel multiplexer with address logic
g. 0 V to 5 V input range with single 5 V power supply
h. Outputs meet TTL voltage level specifications

Pin Diagram
 Fig. 3.4.2 shows pin diagram and block diagram of 0808/0809 ADC.

Page.No. 13
 Fig. 3.4.2 Pin diagram of 0808/0809 ADC
Operation
 The analog to digital converter chips 0808 and 0809 are 8-bit CMOS, successive approximation
converters.
 Successive approximation technique is one of the fast techniques for analog to digital conversion.

Fig. 3.4.3 Block diagram of 0808/0809 ADC

Page.No. 14
 The conversion delay is 100 µs at a clock frequency of 640 kHz, which is quite low as compared to
other converters.
 These converters internally have a 3:8 analog multiplexer so that at a time eight different analog
inputs can be connected to the chips.
 Out of these eight inputs only one can be selected for conversion by using address lines ADD A,
ADD B and ADD C, as shown.
 Using these address inputs, multichannel data acquisition systems can be designed using a single
ADC.
 The CPU may drive these lines using output port lines in case of multichannel applications.
 In case of single input applications, these may be hard wired to select the proper input.
Analog Address Lines
Input
Selected C B A

0 0 0 0
1 0 0 1
2 0 1 0
3 0 1 1
4 1 0 0
5 1 0 1
6 1 1 0
7 1 1 1

Fig. 3.4.4 Timing diagram of 0808/0809 ADC

Page.No. 15
 Interfacing
 Fig.3.4.5 shows the typical interfacing circuit for ADC 0808 with microprocessor system.

Fig. 3.4.5 Interfacing 0808 with 8086

3.5 DAC INTERFACE

 Digital to analog converter is used to convert digital quantity into analog quantity.
 DAC converter produces an output current of voltage proportional to digital quantity (binary
word) applied to its input.
 Today microcomputers are widely used for industrial control.
 The output of the microcomputer is a digital quantity.
 In many applications the digital output of the microcomputer has to be converted into analog
quantity which is used for the control of relay, small motor, actuator etc.
 In communication system digital transmission is faster and convenient but the digital signals
have to be converted back to analog signals at the receiving terminal.
 DAC converters are also used as a part of the circuitry of several ADC converters.
 The input to a ADC is an n-bit binary signal available in parallel form ( b1,b2,b3......b n )
 The output can be either voltage or current.
 Fig. 3.5.1 shows inputs and outputs of DAC.
 The output voltage of DAC is given as V o = K V V ref (b 1 2 -1 +b 2 2 -2 +...........+b n 2-n )
Where V ref - Reference voltage
Kv - Scaling constant
b n - 0' or '1' depending on logic level of corresponding input.
Vo - The result of multiplying the analog reference signal by the digital input.
Full scale range, VFS is given by V FS = K V V ref

Page.No. 16
 Fig. 3.5.1 Block schematic of DAC
The LSB contribution is called as resolution of DAC.

Types of DACs
There are two main types of DACs
1. Weighted resistor type DAC
2. R-2R ladder type DAC.

1. Weighted Resistor Type DAC

 Fig. 3.5.2 shows a 4-bit weighted-resistor D/A converter which includes a reference voltage
source, a set of four electronically controlled switches, a set of four binary-weighted precision
resistors, and an op amp.

Fig. 3.5.2 4 Bit weighted resistor D/A converter

 Each binary bit of digital input code controls its own switch.
 The switch closes with a bit value of 1, and the switch stays open with binary 0.
 The resistor connected to the most significant bit (MSB), b0, has a value of R;
bl is connected to 2R, b2 to 4R, and b3 to 8R.
 Thus, each low-order bit is connected to a resistor that is higher by a factor of 2. For a 4-bit D/A
converter, the binary input range is from 0000 to 1111.
 An important design parameter of a D/A converter is the resolution, which is the smallest output
voltage change, V, which for an n-bit D/A converter is given by

Page.No. 17
 The range of resistor values becomes impractical for binary words longer than 4 bits.
 Also, the dynamic range of the op amp limits the selection of resistance values.
 To overcome these limitations, the R-2R ladder D/A converter is developed.

Advantages:
1. It is Simple in Construction.
2. It provides fast conversion.

Disadvantages:
1. This type requires large range of resistors with necessary high precision for low resistors.
2. Requires low switch resistances in transistors.
3. Can be expensive. Hence resolution is limited to 8-bit size.

2. R-2R Ladder Type DAC

 The 4-bit R-2R ladder type DAC is the most popular DAC.
 It uses a ladder network containing series-parallel combinations of values R and 2R.
 It is easily scalable to any desired number of bits.
 It uses only two values of resistors which make for easy and accurate fabrication and integration.
 Output impedance is equal to R, regardless of the number of bits, simplifying filtering and further
analog signal processing circuit design.

Fig. 3.5.3 (a) 4-bit R-2R Ladder type DAC

 Each bit corresponds to a switch:
i. If the bit is high, the corresponding switch is connected to the inverting input of the op-amp.
ii. If the bit is low, the corresponding switch is connected to ground.
 Requires only two precision resistance value (R and 2R).

Page.No. 18
 Fig. 3.5.3 (b) 3-bit R-2R Ladder type DAC

Advantages of R-2R Ladder Type DAC

1. Only two resistor values.
2. Does not need as precision resistors as Binary weighted DACS
3. Cheap & Easy to manufacture
4. Faster response time

Disadvantages of R-2R Ladder Type DAC

1. Slower conversion rate
2. More confusing analysis

Pin Diagram of DAC 0800

Fig. 3.5.4 Pin Diagram of DAC 0800

Features of DAC 0800
 DAC0800 is a monolithic 8-bit DAC manufactured by National semiconductor.
 It has settling time around 100 ms
Page.No. 19
 It can operate on a range of power supply voltage i.e. from 4.5 V to +18 V. Usually the supply V+ is
5 V or +12 V. The V- pin can be kept at a minimum of - 12 V.
 Resolution of the DAC is 39.06 mV

INTERFACING OF DAC 0800 WITH 8086:

**************************************
3.6 TEMPERATURE CONTROL
 Temperature control is a process in which change of temperature of a space (and objects
collectively there within) is measured or otherwise detected, and the passage of heat energy into
or out of the space is adjusted to achieve a desire average temperature.
 An Automatic Temperature Control Unit mainly divided into three parts-
1. Temperature input unit
2. Processing unit
3. Control output unit

 The 8085 based trainer kit forms the basic processing unit.
 The Analog-to-Digital converter unit and temperature sensor forms the temperature input unit.
 The switching ON/OFF of the heater / cooler controls the heat supplied to the plant.
 Basic operation of the temperature control unit.
 Operationally, the system requires two set points.
i) Upper set point
ii) Lower set point
 Whenever the temperature of the plant exceeds the upper limit or recede the lower limit
heater/cooler is turned-off, so that a temperature is maintained within limits.
 The main hardware consists of automatic temperature control system
1) 8085 Microprocessor unit
2) ADC interface board
3) AD 590 temperature sensor

Page.No. 20
 4) Amplifier (741 op-Amp)
 The 8085 trainer kit consists of
1. 8085 MPU IC
2. 8KB EPROM
3. 8KB RAM
4. Keyboard and display controller 8279
5. Programmable Peripheral interface 8255(PPI)
6. 21 key hex-keypad
7. Six numbers of seven segment LED's

The ADC interface board consists of

 ADC 0808, which is an 8-bit converter with eight channels of input.
 Interfaced with the 8085 through 50-pin bus expansion connector.

Fig. 3.6.1 ADC Interface with 8085

Different types of temperature sensors

1.Thermistor
2.Thermocouples
3. Solid state temperature sensor
4. I.C. Temperature sensor (LM134-3)

Page.No. 21
Fig. 3.6.2 Entire circuit diagram of control unit

Fig. 3.6.3 ADC Interfacing with Microprocessor

Page.No. 22
3.7 STEPPER MOTOR CONTROL

 Stepper motor is an electromechanical device that rotates through fixed angular steps when
digital inputs are applied.
 It is suitable for precise position, speed and direction control which are required in automation
system.
 The angle through which stepper motor rotates with a fixed angle for each digital data is called
step angle.
 Different stepper motor has different step angle. The more frequently used stepper motor has
step angle of 0.9 degrees and 1.8 degrees.
 Depending on the sequence applied to stepper motor, it can be classified in two category:
 4- Step sequence or full step sequence
 8- Step sequence or half step sequence

Calculations:
1. Total no. of steps =
Ex:= 200 steps are required to complete one rotation
2. Total no. of repeated steps=
Ex:= 50 repetition of sequence = (32) in Hexadecimal.

4-Step sequence:
In this type of functioning, the following 4 binary sequence/code are used for rotation: (Considering
step angle= 1.8 degrees)

4-step sequence HEX Code Comments

binary pattern
A B C D
1 0 1 0 0AH Sequence for clockwise rotation
1 0 0 1 09H
0 1 0 1 05H
0 1 1 0 06H

0 1 1 0 06H Sequence for anti-clockwise rotation

0 1 0 1 05H
1 0 0 1 09H
1 0 1 0 0AH

8-Step sequence:
In this type of functioning, the following 8 binary sequence/code are used for rotation: (Considering
step angle= 0.9 degrees)

Page.No. 23
 4-step sequence HEX Code Comments
binary pattern
A B C D
0 1 0 1 05H Sequence for
clockwise rotation
0 0 0 1 01H
1 0 0 1 09H
1 0 0 0 08H
1 0 1 0 0AH
0 0 1 0 02H
0 1 1 0 06H
0 1 0 0 04H

Chip Select Logic: Control Word Format:

D7 D6 D5 D4 D3 D2 D1 D0
IO/BSR MA MA PA PCU MB PB PCU
1 0 0 0 0 0 0 0

Program:
LABEL OPCODE OPERAND COMMENT
LXI SP, 2800H Initialize stack pointer
MVI A, 80H Initialize 8255
OUT 83H (CWR)
MVI B,32H Initialize repeated count
REPEAT: LXI H, 2100H Initialize 4-step sequence
MVI C,04H Initialize 4-step sequence from LUT
BACK: MOV A,M
OUT 80H (PORT A) Sends data to Port-A
CALL DELAY Provide time interval between steps
INX H Increment LUT
DCR C Decrement 4-Steps count
JNZ BACK Is count = “00”? if no then jump to BACK
DCR B Is count = “00”? if YES then decrement repeated
count
JNZ REPEAT Repeated count is repeated for further rotation
HLT

 In the above program in look up table if the 4-step sequence for clock wise then stepper motor
will rotate in clockwise direction and if the 4-step sequence for anti-clock wise then stepper
motor will rotate in anti-clockwise direction.
 Speed control of stepper motor is achieved by writing program to rotate stepper motor
continuously in delay program.
 We can change the delay between two steps and thus change the speed of stepper motor.

Page.No. 24
Interfacing diagram of stepper motor with 8085:

3.8 TRAFFIC CONTROL INTERFACE.

 Nowadays microprocessors are used to implement the traffic control system.
 Fig. 3.8.1 shows the simple model of microprocessor based traffic control system.

Fig. 3.8.1 Traffic Light Control

Page.No. 25
 The various control signals such as red, green, orange, forward arrow, right arrow and left arrow
are used in this scheme.
 The forward, right and left arrows are used to indicate forward, right and left movement
respectively.
 The red(R) signal is used to stop the traffic in the required lane and the yellow(Y) signal is used
as standby, which indicates that the traffic must wait for the next signal.
 The green (G) light for a particular lane remains ON for DELAY-1 seconds followed by the standby
signal for DELAY-2 seconds.
 However, at a time for 3 out of the four roads, the left signal or the left arrow remains on even
though that lane may have a red signal.
 The traffic light control is implemented using the 8085 microprocessor kit having 8255 on board
and the interfacing circuit is illustrated in Fig. 3.8.2.
 Each signal is controlled by a separate pin of I/O ports.
 The total number of logic signals required for this arrangement is twenty-four.
 The programmable peripheral interface device 8255 is used to interface these 24 logic signals
with the lamps.
 The logic '0' and '1' represents the state of the lamp.
 Logic '1' represents ON and '0' represents OFF.
 All ports of 8255 are used as output ports.
 The control word to make all ports as output ports for Mode 0 operation is 80H.

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 The traffic light control program can be written by the following steps:
 Step 1: Initialize all ports of the 8255 as output ports.
 Step 2: Determine the required status of Port A, Port B and Port C of 8255 for north to south
traffic movement. Load data into accumulator and send to Port A, Port B and Port C of 8255 for
north to south traffic movement.
 Step 3: Call delay subroutine - 1.
 Step 4: Before starting east to west traffic movement, north to south traffic movement will be
ready to stop, and east to west traffic must be ready for movement. Therefore, determine the
required status of port A, Port B and Port C for this operation. Then load data into accumulator
and send to Port A, Port B and Port C for north to south traffic movement which will be ready to
stop and east to west traffic must be ready for movement.
 Step 5: Call delay subroutine-2.
 Step 6: For east to west traffic movement, determine the required status of port A, Port B and
Port C of 8255. Load data into accumulator and send to Port A, Port B and Port C for east to west
traffic movement.
 Step 7: Call delay subroutine-1.

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