HDL (Verilog)

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HDL (Verilog)

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11reventh

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Verilog Workshop

Contents :
What is HDL and its need .?
Verilog fundamentals
FPGA
Career Oppurtunities
What is HDL !?
It is a Hardware Descriptive Languge , used to describe the
structure and behaviour of the electronic circuit

Why HDL..?
Designing
Abstraction
Simulation & Verification
Synthesis of Automated systems
Reusability
VHDL

VHDL is close to natural language and it is more

structured and has strong typing
Hard To learn

How many
less flexible

Verilog
HDL ?
Verilog is close to c language and it is more
behavioural and has less strict typing
Easy to learn
More flexible
Mostly used
Verilog Fundamentals
Syntax :

Comments
White spaces
Operators
Number Format
Strings
Indentifiers
Keywords
Data Types :
Logic values in Verilog :
‘1’ : Logic one or a True condition
‘0’ : Logic zero or a false condition
‘x’ : Unknown value
‘z’ : High impedance or not connected

Nets
Registers
Other Data Types :
1. Integer
2. Time
3. Real
4. Strings
Vectors
Arrays
Modules
Ports
Assign
Always
Initial
Begin
end
Conditional Statements
For Loop
Case Statement
Blocking and Non blocking statements
Levels of Abstraction :

Switch Level
Gate Level
Data Flow
Behavioural
Where to write the code ?
How to implement it ?
Example : Verilog code for Half adder
Example : Test bench and Wave Form
Assignment : Write a verilog code for
full adder using half adder
code: testbench:
output:
FPGA :
Field-Programmable Gate Array (FPGA): An integrated circuit (IC) that can be
programmed after manufacturing to perform a wide range of digital functions.

Need for FPGA :

Flexibility
Prototyping
Customisation
Hardware acceleration
Design Flow of
FPGA :
Applications :
Oppurtunities
Higher Studies

On Campus : Texas Instruments

Qualcomm

Micron

Synopsys

Blaize
Infenion
Any Doubts ?..
Thank You
All the best!!

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HDL (Verilog)

Uploaded by

HDL (Verilog)

Uploaded by

Verilog Workshop

VHDL is close to natural language and it is more

Need for FPGA :

On Campus : Texas Instruments

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