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1 Analog - Mixed-Signal - Integrated - Circuits - For - Quantum - Computing

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1 Analog - Mixed-Signal - Integrated - Circuits - For - Quantum - Computing

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Olive Smith
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© © All Rights Reserved
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Analog/Mixed-Signal Integrated Circuits for

Quantum Computing
2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS) | 978-1-7281-9749-4/20/$31.00 ©2020 IEEE | DOI: 10.1109/BCICTS48439.2020.9392973

(Invited Paper)
Joseph C Bardin∗†
∗ Department
of Electrical and Computer Engineering
University of Massachusetts Amherst, Amherst, Massachusetts 01003–9292
† Google AI Quantum, Google Inc, Goleta, California 93117
Email: [email protected]

Abstract—Future error-corrected quantum computers will re- room-temperature arbitrary waveform generators, which are
quire analog/mixed-signal control systems capable of providing tightly integrated into a software stack that orchestrates the
a million or more high-precision analog waveforms. In this overall operation of the system. While it makes sense to use
article, we begin by introducing the reader to superconducting
transmon qubit technology and then explain how the state of a laboratory-grade electronics for demonstration experiments on
quantum processor implemented in this technology is controlled. today’s relatively small-scale quantum processors, the cost and
By example, we then show how one can implement one part of form-factor associated with this technology will be prohibitive
the quantum control system as a cryogenic integrated circuit and in scaling these systems by more than four orders of magni-
review experimental results from the characterization of such an tude, as required to implement QEC codes. Instead, integrated-
IC. The article concludes with a discussion of analog/mixed-signal
design challenges that must be overcome in order to build the circuit-based controllers must be developed.
system required to control a million-qubit quantum computer. While it is feasible to develop integrated control electronics
Index Terms—Cryogenic CMOS, quantum control, quantum
computing, classical-to-quantum interface operating at room temperature, a more attractive approach
involves cooling the controller to about 4 K, a temperature
I. I NTRODUCTION that is available in most closed-cycle dilution refrigerators [3].
This has the advantage of removing the need for high-density
Recent advances in quantum computing technology have
high-bandwidth interconnects from room temperature to 4 K,
culminated in the demonstration of quantum processors with
which would be lossy and introduce signal distortion (e.g.,
over 50 qubits—the scale required to perform computations
due to the skin effect). Connections from 4 K down to the
beyond the reach of classical computers [1]. However, today’s
the quantum processor can be made using superconducting
quantum computers are still far from ideal. During computa-
interconnects, which offer excellent thermal insulation. mini-
tion, a quantum processor operates in the analog domain and
mal electrical loss, and near dispersion free propagation [4].
is sensitive to noise. This makes calculations error-prone and
Already, several groups have begun working on cryogenically
limits the use-cases for today’s relatively small-scale quantum
cooled electronics for quantum control [5]–[10].
computers to algorithms that can tolerate error rates of the
order 0.1–1% per computational step—that is, any algorithm Here, we discuss the use of analog/mixed-signal electronics
to be carried out on a contemporary quantum processor must in the control of quantum processors. We focus on supercon-
converge to an answer after a small number of computations. ducting transmon qubit technology, which is currently among
To overcome the limitation of noise in quantum computers, it the most mature of quantum processor technologies. However,
will be necessary to employ quantum error correction (QEC) with small adjustments, many of the concepts can be extended
codes, which leverage redundancy to encode logical qubits to other qubit technologies, such as semiconductor spin qubits.
that are protected from errors. Of all known QEC codes, the We begin with an introduction to superconducting transmon
surface code is among the most compact and scalable [2]. qubits, describing the fundamentals of qubits and quantum
However, the surface code still requires on the order of 1,000 computing as necessary to convey the key points. We then
physical qubits to implement a single logical qubit, meaning explain the requirements for XY control of transmons and re-
that the realization of a machine with 1,000 error-protected view the design and experimental characterization of a recently
logical qubits will require about a million physical qubits. reported CMOS cryogenic quantum controller [9], [10]. The
There are numerous challenges associated with implementing article concludes with a discussion of circuit-related challenges
a quantum computer of this scale. that must be overcome to enable the implementation of a
Of particular relevance to the analog/mixed-signal circuits useful error-corrected quantum computer. When discussing
community is scaling of the control electronics required to run qubit technology, conceptual rather than physical descriptions
a quantum processor. Today’s state-of-the-art quantum proces- are provided. For a deeper dive into the field of quantum
sors, which operate within a dilution refrigerator at a physical computing and the inner workings of the transmon qubit, we
temperature of about 20 mK, are controlled using racks of refer the reader to a recently published tutorial article [11].

978-1-7281-9749-4/20/$31.00 ©2020 IEEE


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a) b) c) XY DRIVE Z BIAS
5 QUBIT
4
3 XY Z
6E=Ģt23 CC
2 CQ
CQ LJ(IJ) 6E=Ģt12
1
6E=Ģt01
0

Fig. 2. Schematic diagram of a frequency-tunable transmon qubit with XY


Fig. 1. (a) Schematic diagram of a transmon qubit. The ‘X’ symbol represents and Z control ports. The XY port is used to drive rotations of the qubit state
a Josephson junction. (b) Energy diagram of a transmon. (c) Bloch Sphere around an axis in the XY plane whereas the Z port is used to control the qubit
representation of a single-qubit state. frequency (ω01 ).

II. S UPERCONDUCTING T RANSMON Q UBITS using modern commercially-available dilution refrigerators.


Second, if we are going to use it for computation, we need
The fundamental building block in a quantum computer
a means to manipulate the quantum state of the transmon.
is the quantum bit, or qubit. An ideal qubit is a quantum
Such manipulations applied to single qubits are referred to
mechanical system with exactly two distinct energy states
as single-qubit quantum gates. The state of an ideal qubit
(e.g., |0 and |1); it is these energy states that serve as a
during computation is described by a complex superposition
computational basis. There are numerous physical approaches
of its |0 and |1 energy eigenstates, |ψ = α0 |0 + α1 |1 =
to approximating the behavior of such a device and one popu-
exp {jγ} [cos (θ/2) |0 + exp {jφ} sin (θ/2) |1], where the
lar technique is to build a nonlinear microwave resonator using
complex probability amplitudes α0 and α1 signify the proba-
superconducting components. Here, we consider the transmon
bility that one would find the qubit in the associated state, were
qubit (Fig. 1(a)), which consists of a Josephson junction (JJ)
a measurement to be carried out (to be explicit, P {|0} =
shunted by a capacitance [12].1 In this circuit,
 the JJ acts as a 2 2
|α0 | , P {|1} = |α1 | , and |α0 |2 +|α1 |2 = 1). As information
nonlinear inductance of value LJ = LJ0 / 1 − IJ2 /IC2 , where
is carried in the probability amplitudes, they are what we are
IJ is the current though the JJ, IC is the critical current of
operating on when we perform quantum gates.
the JJ, LJ0 = Φ0 /2πIC is the zero-bias inductance of the JJ,
and Φ0 = 2.07 mV · ps is the magnetic flux quantum. Typical Since the state of an isolated qubit is completely described
values for IC and LJ0 are 40 nA and 8 nH, respectively [14]. by angles θ and φ,3 it can be visualized as a point on the
surface of a unit sphere, which is known as the Bloch Sphere
The effect of the nonlinearity is that the addition of a single
(Fig. 1(c)). The ground state, |0, and excited state, |1, map
microwave photon to the energy stored in the transmon is
to the north and south poles, respectively, whereas all other
enough to shift its resonant frequency by η = −q 2 /2h̄CQ
points on the surface of the Bloch Sphere correspond to unique
(rad/sec), where q = 1.602 × 10−19 C is the charge of an
superposition states. In the Bloch Sphere picture, single-qubit
electron and h̄ = 1.05 × 10−34 J · s is the reduced Planck
gate operations correspond to rotations of the qubit state vector
constant. The energy diagram appears in Fig. 1(b) and typical
and for universal quantum computation, we need to be able to
values for ω01 /2π and |η| /2π are 4-8 GHz and 150–300 MHz,
perform deterministic rotations around the X, Y, and Z axes.
respectively—to emphasize how nonlinear this circuit is, for
typical parameters, a single microwave photon of energy of If we make the modifications to the transmon circuit that are
4 × 10−24 J causes a frequency shift of about 200 MHz. The shown in Fig. 2, then we will have all the hooks we need to
unequal energy spacings in Fig. 1(b) are a property referred perform the single-qubit gates required for universal quantum
to as anharmonicity and this anharmonicity is the essential computing. Two control ports, labeled XY and Z, have been
feature that allows us to isolate the |0 and |1 energy states, added. In addition, the single JJ has been replaced with a JJ
as necessary to emulate an ideal two-level qubit. loop (also known as a superconducting quantum interference
To use this device in a quantum processor, there are several device), which behaves as a flux-tunable nonlinear inductor.
additional criteria which must be met [15]. First, the transmon The XY port is used to drive the qubit with microwave pulses
should display coherent quantum mechanical behavior. This on resonance with the ω01 transition (Fig. 3). This permits
means that it must not be excited by thermal photons, which determinstic rotations of the qubit state vector, |ψ, about an
would randomize the quantum state. For typical qubit frequen- axis in the XY plane. Accordingly, such gate operations are
cies of 4–8 GHz, one needs to thermalize the device in the 10– referred to as XY gates. The axis of rotation is determined by
20 mK range to ensure that thermal population is sufficiently the microwave carrier phase whereas the angle of rotation is
suppressed.2 Fortunately, these temperatures can be reached set by the integrated envelope amplitude. Thus, one can carry
out an arbitrary XY gate through proper pulse design.
1 The transmon qubit is just one of many promising superconducting qubits. The characteristic timescale over which today’s transmons
We refer the reader to a recent review paper [13] for more information on the can maintain coherence is limited to about 100 μs by losses
rich field of superconducting qubit technology.
2 The effective temperature of a photon at ω is T and frequency fluctuations [16]. It is important that gate oper-
0 photon = h̄ω0 /k, where
k is the Boltzmann constant. If a transmon operating at ω0 is thermalized to
below Tphoton , its thermal excitation will drop exponentially with temperature. 3 The prefactor term, exp {jγ} has no observable effect and can be ignored.

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XY ctrl (a.u.)

Qubit #1 Tunable Coupler Qubit #2


Z ctrl (au.)

Fig. 4. Example approach to coupling of qubits. A tunable coupler constructed


using a tunable LC resonator is used to tune the coupling strength between
the qubits.
Time

Fig. 3. Example XY and Z control waveforms. The XY waveforms consist


of microwave pulses on resonance with the qubit transition frequency ω01
and are used to perform XY gates on the qubit. Critical parameters for the
design of these pulses include envelope amplitude range/resolution, envelope
shape, carrier phase, carrier phase jitter, spurious leakage, and the broadband
noise floor. The Z control waveforms are used to set the qubit frequency and
mediate both single- and two-qubit gates. Critical design parameters include
current range/resolution, stability, noise, and settling time.

ations are carried out in a small fraction of this coherence time


so that error rates associated with decoherence mechanisms are
kept to a few hundredths of a percent.4 Thus, the duration of
XY gates is made as short as possible—typically in the range
of 10–25 ns. It is crucial that XY pulses are appropriately
shaped to avoid spectral leakage which could drive the ω12
Fig. 5. Example arrangement of a state-of-the-art 54 qubit quantum processor
transition, taking the qubit out of the |0-|1 computational with tunable nearest neighbor coupling. In the quantum processor correspond-
space. Common envelope shapes include Gaussian and raised ing to the figure, one of the 54 qubits was found to be non-functional (gray
cosine waveforms and advanced techniques such as derivative outline with white fill). Reproduced with permission from [1].
removal by adiabatic gate (DRAG) are often employed to
further reduce the pulse duration while minimizing leakage to
the |2 state [17]. More detailed specifications for XY control either be static [18] or tunable [1]. An example approach for
waveforms are described later in the article, when we review implementing a tunable coupling between a pair of qubits
the design of an IC for performing XY gates on transmons. appears in Fig. 4 [19]. The coupler uses a detuned transmon
The Z port enables control of ω01 via a current bias, as a tunable LC resonator whose frequency can be set to
analogous to how a the frequency of a voltage controlled disable or enable coupling between the qubits. Two-qubit gates
oscillator is adjusted by a varactor tuning voltage. As shown can be implemented by simultaneously controlling the qubit
in Fig. 3, the waveforms applied to this port typically consist frequencies and the coupling strength. For instance, an iSWAP
of small current pulses superimposed on a dc current bias. gate, which causes a single excitation to oscillate back and
In the context of single-qubit gates, one can rotate the qubit forth between the pair of qubits, can be implemented by
state around the Z-axis by detuning the qubit frequency, which bringing the qubits on resonance and enabling the coupling.
results in an accumulation of phase. Such gates are referred to It can be shown that a wide range of two qubit gates can
as Z gates and can be carried out deterministically by precisely be realized through a proper choice of the qubit frequencies,
controlling the amount and duration of the frequency detuning. coupling strength, and gate duration [20].
Typically, the mutual inductance associated with the Z control Due to the 2D nature of superconducting quantum proces-
line is on the order of just a few pH and control currents of sors, it is most practical to restrict qubit coupling to nearest
a hundred microamps or more with nanoamp-level resolution neighbors only. The arrangement of a state-of-the-art 54 qubit
are required. As such, the DACs used for this purpose typically quantum processor [1] is shown in Fig. 5. With the exception
have at least 14 bits of resolution. of devices along the edge of the chip, each qubit connects to
A third requirement is that qubits be coupled together to four other qubits through tunable couplers. This architecture
enable the two-qubit gates required to create entagled states. is believed to be scalable to a much larger number of qubits.
Since transmons are just nonlinear LC resonators, they can Finally, we need a way to make on-demand measurements
be coupled via inductive or capacitive couplings, which can of the state of an individual qubit. Since the resonant frequency
of the transmon is state dependent, we can measure its
4 To reach a loss-limited coherence time of 100 μs, a transmon operating at impedance to determine its quantum state. However, since a
5 GHz must have a quality factor greater than 3 million. measurement of a quantum system extracts information from

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(a) (b) Beyond gate error rates, it is also important that any ap-
180

(degrees)
a1 b1 proach toward integrated quantum control be compatible with
90 large-scale systems. In the context of cryogenic electronics,
0 2r this means that the aggregate power should be kept to the
Z0 Z0
Cg -90 level at which cryogenic cooling is practical. Using large-scale
Cr -180 cryogenic cooling systems [21], it is feasible to remove about
Ȧp
1 kW at 4.2 K, so this means that the total power consump-
Frequency
Readout tion per qubit can be no more than 1 mW, including cable
resonator Ȧr (c) Q thermalization. As such, the power allocated to XY control
Cg should be well below 1 mW per qubit. While this tight power
CQ Ȧq constraint may make frequency-domain multiplexing appear
I like an attractive option, due to the limited anharmonicity of
Qubit
transmons qubits, it is believed that the challenges associated
with avoiding excitation of each qubit’s ω12 transition makes
such approaches impractical. As such, we assume that each
Fig. 6. Dispersive readout of a transmon qubit. (a) The qubit is coupled qubit will require its own XY controller, and that these devices
to a linear readout resonator that is capacitively coupled to a reflection
coefficient measurement apparatus. (b) The readout resonator experiences a must eventually dissipate  1 mW each.
state-dependent dispersive frequency shift which can be observed as a shift To map these broad specifications into hardware, we begin
in reflection phase at ωp . (c) Typical baseband constellation measurements
corresponding to a qubit that has been initialized in the |0 (blue) and |1
by noting that the basic function of this system will be
states. Reproduced with permission from [11]. © IEEE 2019. to generate pulses with a well-defined envelope and carrier
phase. Since direct synthesis of these modulated waveforms
using a high-speed DAC would be inefficient, we assume
the system, it digitizes the state to one of the measurement that any architecture meeting the power requirements will
basis states (e.g., |0 or |1). So, it is essential that any have to employ upconversion. As such, key considerations
measurement port not interfere with normal qubit operation. when determining the overall architecture include the dynamic
This makes direct measurement of the qubit impedance im- power consumption of the baseband DACs (including digital
practical. Instead, as shown in Fig. 6, we couple the qubit to a I/O) and the total power required to upconvert the baseband
linear resonator that is significantly detuned from the transmon signals (including mixer LO power).
resonance. The qubit state can then be sensed by measuring the In an effort to minimize the overall power consumption of
state-dependent dispersive frequency shift experienced by the the XY control IC, we chose the architecture shown in Fig. 7.
linear resonator. The dispersive shift is nominally close to the A direct-conversion approach has been utilized to minimize
value of the readout resonator linewidth (about 2-5 MHz), and the slew-rate requirements for the baseband DACs. Each of
the readout resonator is typically detuned from the qubit by the baseband DACs is implemented using an architecture that
1 GHz or more, so as to minimize its impact on qubit lifetime. has been optimized to generate symmetric signals (Fig. 8), as
required to produce Gaussian and/or raised cosine envelopes.
III. E LECTRICAL R EQUIREMENTS TO IC A RCHITECTURE This architecture uses an array of 11 current-mode sub-DACs
in conjunction with the appropriate timing waveforms to
Having introduced the operational concepts relevant to produce pulses that are 21 clock cycles long. The circuitry was
transmon-based quantum processors, we are now positioned to designed to support clock frequencies between 0.3 and 3 GHz
describe the electrical requirements of the quantum controller so as to support pulse durations in the range of 7–70 ns.
and to explain how these requirements flow down to architec- The resolution of each of the sub-DACs used in the base-
tural decisions. Here, we focus on XY control and illustrate band envelope generator is constrained by the specification
the process using a previously reported design [9], [10]. that error rates be kept below 10−5 , which demands that the
We assume that any quantum processor of the scale requir- axis and angle of rotation be controlled to better than 0.22◦
ing integrated control electronics will run the surface code, and 0.45◦ , respectively [10]. Since the amplitude specification
which is currently the leading QEC protocol. As such, the most is the more stringent of these requirements, we base our
fundamental specification for integrated control electronics specification on it. If we add the additional constraint that
is that they produce accurate enough waveforms to permit we be able to carry out rotations of at least 540◦ ,5 then we
execution of the surface code. A practical target for the average require our integrated envelope amplitude be programmable to
gate error rates needed to run the surface code is 0.1%. Since 10.2 bits of resolution. To meet this specification, we chose a
gate error rates are impacted by many error mechanisms (e.g., resolution of 8-bits for each of the sub-DACs. Furthermore, to
relaxation due to losses and dephasing due to 1/f frequency provide flexibility in the full-scale range, an additional 8-bits
fluctations), the error rates attributed to the quantum controller of control were provided to configure the bias reference. As
should be significantly lower than 0.1%; in the discussion that
follows, we conservatively consider specifications limiting the 5 While the maximum pulse that is useful in a computation is a π-pulse,
error rates of individual contributors to 10−5 . which produces a 180◦ rotation, larger pulses are useful in qubit bringup.

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DIGITAL CTRL ENV GEN VECTOR
MODULATOR
ENV
XY DAC_I
SEL<0:3> WAVEFORM RF_OUT
MEMORY
ENV
DAC_Q

SCLK SPI
DIN

CMOS IC
Fig. 9. Fabricated devices: (a) Die micrograph. The chip measures 1.1 mm×

LO_Q
CLK+
CLK–

TRIG

LO_I
1.6 mm. (b) Close-up photograph of the wirebonded IC. (c) Photograph of
the module. Reproduced with permission from [10]. © IEEE 2019.
Fig. 7. Quantum controller architecture. A 16-value waveform memory is used
to control a pair of baseband DACs. The baseband currents are upconverted MONITOR
Scope/
by a pair passive mixers whose outputs are combined and filtered to produce Spec An
CRYO CMOS IC
the XY control pulse. Reproduced with permission from [10]. © IEEE 2019. SPI
uProc

DACI DACQ
SEL<0:3> -20dB
Digital TP1
TRIG

Software Backend
AWGs
fCLK 0
CLK 180
-20dB
f0 LO -90 20dB
0
NULLING

i0 i1 i2 i10
STD XY 20dB
60dB
XY
iREF Standard
Qubit Z Z XY
iY +
e(t)
_
Electronics RO RO Qubit
BIAS HEMT Amp Parametric Amp
REF 300 K 3K 10mK

Fig. 8. Envelope DAC architecture. An array of eleven sub-DACs used to Fig. 10. Test setup used for characterization of cryo-CMOS quantum
generate a symmetric staircase of current, which is filtered to produce a controller. Reproduced with permission from [10]. © IEEE 2019.
smooth envelope waveform. A wide range of symmetric envelope shapes can
be realized through control of the individual current amplitudes.
temperature, the module was installed on the 3 K stage of a
dilution refrigerator and interfaced to a quantum processor IC.
such, the overall programmability of the architecture exceeds
that required; this conservative approach was selected since the A block diagram of the test setup appears in Fig. 10. The
design was carried out without cryogenic simulation models. clock and LO signals were sourced from commercial synthe-
The baseband waveforms are upconverted via a passive IQ sizers operating at room temperature, with commercial 180◦
mixer whose outputs are combined and filtered to produce and 90◦ couplers employed at 3 K to generate the required
the RF output. A limiting amplifier chain was incorporated in clock and LO phases, respectively. Since the prototype IC
the LO path to enable operation with a relatively weak LO employs a direct conversion architecture, any carrier leakage
(−13 dBm per quadrature). The qubit is extremely sensitive to through the chip causes unintentional drive of the qubit. To
noise on the RF drive line, which can cause decoherence. As minimize LO leakage-induced rotations, a nulling signal was
such, we avoid any amplification in the signal chain to prevent generated using a phase and amplitude shifted copy of the
increasing the broadband noise floor. The signal amplitude is LO, which was combined with the chip output using a 20 dB
thus set by the amplitude of the baseband current pulses. At directional coupler. This coupler was also used to inject an XY
the plane of the qubit drive port, a peak available signal power control signal generated by standard qubit control electronics,
of about −63 dBm is required [11] and the signal at 3 K must thereby allowing for baseline experiments to be carried-out. A
be at least 20 dB stronger to account for attenuation at 10 mK, second directional coupler was also employed at 3 K to tap-off
which is used to suppress the thermal noise floor. In our design, part of the output signal for monitoring at room temperature.
we conservatively target a peak amplitude that is 10× larger. The RF signal was then interfaced via 40 dB of attenuation to
Finally, an on chip memory bank was incorporated into a qubit thermalized to 10 mK. Standard electronics were used
the design to eliminate the need for a high-speed data bus for Z control and state readout. The trigger and select lines
between room temperature and 3 K. The memory allows for were interfaced to using digital arbitrary waveform generators
the definition of sixteen unique pulses, which is sufficient to and digital programming of the IC was accomplished via a
implement a basic single-qubit gate set. A four-bit interface microcontroller. All aspects of the experiment were orches-
is provided to select from these waveforms. Further details trated through a standard software stack which is used to run
regarding block-level implementation are provided in [9], [10]. quantum experiments.
The system was cooled down and a sequence of quantum
IV. E XPERIMENTAL R ESULTS control experiments were carried-out to characterize the sys-
The cryogenic XY control IC was fabricated in a 28-nm tem performance of the IC. The qubit used in the experiments
technology and packaged in a module for characterization with was a single device from a 5-qubit quantum processor. Prior
a quantum processor (Fig. 9). After characterization at room to the experiments described below, LO leakage was canceled

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(c) (a) (b)
(a) (b) 1.0
Z
Z 0.8
Qubit active reset (initialization)
Qubit active reset
X-pulses w/varying env amplitude, AA (_eA) 1

Probability
(initialization) e
X-Pulse w/Varying Amp. 0.6
XY 2
0.4
XY 1 2 3
0.2 /-pulse w/varying carrier
RO phase, qB, relative to pulses 1 & 3 3
RO
Readout pulse 0.0 Readout pulse
Time 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 Time
Measured Envelope Amplitude (a.u.)

350 350 1.0

Programmed qB (degrees)
IDEAL (c) (d)
Fig. 11. Rabi amplitude experiment. (a) Protocol used for experiment. (b) The 300 300 0.8
STANDARD XY CMOS IC
250 250

qB (degrees)
XY pulse causes a rotation of the qubit state around the X axis. (c) Measured 0.6
200 200
state probabilities versus measured envelope amplitude. Reproduced with 150 150 0.4
permission from [10]. © IEEE 2019. 100 100
0.2
50 50
0 0 0.0
0 20 40 60 80 100 120 140 160 0.0 0.2 0.4 0.6 0.8 1.0
eA (degrees) Programmed AA (a.u.)
using the nulling path [10]. During all experiments, unused
qubits were detuned from the active qubit to minimize their Fig. 12. Three-pulse experiment used to evaluate fast switching and phase
effect on the experiment. In addition, all XY pulse waveforms coherent features of the IC. (a) Experimental protocol. (b) Example qubit
employed nominally raised cosine envelopes. Unless stated trajectory for θA = φ/2 and φB = 5π/9. (c) Measured P {|0} for the
standard XY control electronics. (d) Measured P {|0} for the cryo-CMOS
otherwise, these experiments were carried out with RF and XY controller. Reproduced with permission from [10]. © IEEE 2019.
clock frequencies of 5.5 GHz and 1 GHz (21 ns pulse), respec-
tively. The corresponding pulse duration was 21 ns. Further
details regarding each experiment can be found in [10]. tion: when the first of the outer pulses leaves the qubit state
1) Rabi Amplitude Experiment: First, we ran a Rabi ampli- near one of the poles, the inner pulse should always flip the
tude experiment to study the ability to control pulse amplitude, state such that in the end P {|0} = 0. However, when the
following the protocol illustrated in Fig. 11(a). First, the qubit first pulse leaves the qubit state at the equator, the effect of the
was reset to the ground state. Next, it was excited by an inner pulse depends upon its phase so fringes should appear.
X pulse, causing a rotation about the X axis. Finally the It should be noted that, while both sets of data generally
qubit state was measured. As explained in Fig. 11(b), the agree with expectation, inspection of Fig. 12(c) and Fig. 12(d)
state probabilities are expected to oscillate with respect to the reveals significantly more distortion in the data obtained using
degree of rotation, which is proportional to pulse amplitude. the prototype IC. This is believed to be related to the fact that,
The experiment was performed over a wide range of pulse in contrast to the Rabi experiment, where the amplitude was
amplitudes and 5000 statistics were taken for each setting. separately measured, the axes have not been calibrated for this
When we initially performed the experiment, we found that the measurement. Nonetheless, even without this calibration, the
response as a function of the programmed envelope amplitude RMS error between the measured data obtained using the IC
was nonlinear and non-monotonic, which was not surprising and the ideal result was still just 11.7%.
as minimum feature transistors were used for LSB devices. As 3) T1 Measurement: Having validated the potential for
such, we calibrated the envelope amplitude using a spectrum coherent control, we next studied the effect of the control IC on
analyzer connected to the monitor port. The calibrated mea- the relaxation time of the qubit. To carry-out this experiment,
surement results appear in Fig. 11(c). The results show the we first reset the qubit. Next, we excited it to the |1 state
expected behavior: the maxima of the |0 and |1 state prob- and then waited a time τ before making a state measurement.
abilities are consistent with the separately measured |0 and Nominally, a transmon qubit relaxes from the excited state to
|1 state readout error rates of 2.4% and 6.8%, respectively, the ground state exponentially with a time constant T1 , which
and the results also agree with baseline data. is limited by the quality factor of the qubit. However, noise
2) Three-Pulse Experiment: Having verified our ability to or other spurious signals such as carrier leakage on the drive
drive Rabi oscillations using the cryogenic control IC, we line have the potential to affect the relaxation time constant
performed an experiment aimed at studying the fast-switching (by driving ω01 ), so we carried out this experiment using both
and phase coherent properties of the quantum controller. In this the standard and proposed control electronics to make sure
protocol, detailed in Fig. 12(a) and 12(b), the qubit was first the results were consistent. As shown in Fig. 13, exponential
reset to the |0 state. A three-gate sequence was then carried decay constants of 18.3 μs and 17.8 μs were observed when
out, with the first and third gates nominally inducing rotations using the standard qubit control electronics and the cryogenic
of varying degree (θA ) around the X axis and the middle pulse IC, respectively. Since these results are consistent to within
nominally inducing a 180◦ rotation about a varying axis (φB ). the measurement error, the quantum control IC did not appear
Finally, the qubit state was read out. to affect the qubit relaxation time.
This experiment was repeated with both the standard control 4) Two-State Population Measurement: To understand the
electronics and the cryogenic IC. Results appear in Fig. 12(c) level to which the cryogenic control IC was driving the
and Fig. 12(d). In both cases, the results agree with expecta- undesired ω12 transition, we carried out an experiment in

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lower than the estimated power consumption of the standard
τ |0 ,|1
XY electronics. Nonetheless, a power consumption of 2 mW is
|0 Xπ
still too high for this IC to be used in a million-qubit control
system, so further work is required to explore the fundamental
limitations in power consumption for an XY controller.
V. C HALLENGES A HEAD
While demonstration of a cryogenic quantum control IC
dissipating just 2 mW was an important step forward for the
field of quantum computing, major advances are still required
to enable the implementation of million-qubit level systems.
To operate an N -qubit quantum processor based on transmon
Fig. 13. Qubit relaxation time measurement. The relaxation times measured
using the CMOS IC (blue line) and the standard control system (red line) qubits with adjustable couplers of the form shown in Fig. 4,
were found to be 17.8 μs and 18.3 μs, respectively. It is believed that one needs N XY control channels and approximately 3N Z
these measurements are consistent to within the measurement repeatability. control channels. While we have provided a starting point as
Reproduced with permission from [10]. © IEEE 2019.
to how to think about the design of such a system, there are
still significant uncertainties which must be understood before
200x π pulse
it will be possible to actually implement it. Below, we provide
|0 ,|1 ,|2 a non-comprehensive discussion of some of the issues related
|0 Xπ ... Xπ to classical electronics to be considered as we move towards
implementing an error-corrected quantum computer.
To begin, let us consider the XY controller. This system
must generate pulses with sufficeint fidelity to perform XY
gates with error rates well below 10−4 . As a next step in
moving towards this goal, it is important to carry-out careful
benchmarking using an algorithm such as interleaved ran-
domized benchmarking, which is capable of extracting error
rates associated with individual gate operations [22]. This
Fig. 14. Two-state population as a function of pulse duration (red solid would nominally be carried-out using an on-chip sequencer
line) and two-state measurement noise floor (blue dashed line). Negligible similar to that reported in [5]. With error-rates understood,
|2 population was observed for gate times as short as 15 ns. Reproduced
with permission from [10]. © IEEE 2019. optimization will be required to minimize power consumption
while meeting error requirements. Issues such as crosstalk and
waveform synchronization will have to be understood and may
which we reset the qubit, excited it with 200 π-pulses, and necessitate architectural changes to support features such as
measured the qubit state using a measurement protocol capable active cancellation and/or local carrier generation.
of distinguishing between |0, |1, and |2. If the pulses have Now, let us consider the Z control system, which sources
significant energy at ω12 , one would expect each pulse to drive about 3/4 of the signals required to operate the quantum
some energy into |2 and to reach a steady-state population by processor. While the functional requirements of this block
the end of the measurement. The experiment was repeated for may seem straightforward, the situation becomes complicated
pulse durations ranging from 7.6 ns to 70 ns and the results by the necessary transmission medium connecting the Z con-
apprear in Fig. 14. The |2 population was found to be trollers to the qubit and coupler control ports. Losses and
negligible for pulse durations beyond about 15 ns and then rose reflections along these transmission lines cause distortion in
rapidly for shorter pulse durations. This behavior is consistent the same way that non-return-to-zero signals become distorted
with expectation, given the anharmonicity parameter of the when traveling over a backplane. In today’s systems, the
measured qubit (η/2π ≈ 330 MHz). long cables between the room temperature electronics and
5) Power Consumption: The largest XY pulse required the quantum processor lead to settling times that can be on
during a quantum algorithm is a π-pulse, which induces a 180◦ the order of microseconds [23]. To compensate for these long
rotation. As such, an upper limit to the power consumed by settling times, it is common practice to characterize the system
the IC can be estimated by the power required to continuously response and deconvolve this response from the transmitted
drive π-pulses. Based on the Rabi amplitude oscillation curves, Z signal, similar to how pre-emphasis is used in wireline
we found an appropriate setting to produce a π-pulse and mea- applications. While it is possible to reduce the impact of
sured the total power drawn when the chip was continuously long-term settling dramatically by using bipolar Z pulses, this
triggered while clocked at 1 GHz (21 ns pulse duration) and complicates waveform design and compensation for the short
driven with a 5.5 GHz LO signal. Under these conditions, we time-scale system response is still required [24]. As such,
found that the total ac and dc power delivered to the chip research will be required to understand how to implement
was below 2 mW, which is about three orders of magnitude precise Z control systems that are also low power.

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Once scalable control systems are developed, they still have [4] Q. P. Herr, A. D. Smith, and M. S. Wire, “High speed data link between
to be interfaced to the quantum processor. Assuming the digital superconductor chips,” Applied physics letters, vol. 80, no. 17,
pp. 3210–3212, 2002.
processor is thermalized at 10 mK, as necessary for super- [5] B. Patra et al., “A scalable cryo-CMOS 2-to-20GHz digitally-intensive
conducting processors, there will need to be some large-scale controller for 4× 32 frequency multiplexed spin qubits/transmons in 22-
array of interconnects between the quantum processor and the nm FinFET technology for quantum computers,” in 2020 International
Solid-State Circuits Conference, 2020.
control system. For qubit technologies such as semiconductor [6] S. Pauka et al., “A cryogenic interface for controlling many qubits,”
spin qubits in which the qubits themselves are nanoscale, arXiv preprint arXiv:1912.01299, 2019.
this level of interconnect would simply be impossible [25] [7] C. Degenhardt et al., “Systems engineering of cryogenic CMOS elec-
tronics for scalable quantum computers,” in 2019 IEEE International
and the only option for reaching the scale required to imple- Symposium on Circuits and Systems (ISCAS), 2019, pp. 1–5.
ment an error-corrected quantum computer is to integrate the [8] I. Bashir et al., “A mixed-signal control core for a fully integrated
control electronics in the same chip alongside the quantum semiconductor quantum computer system-on-chip,” in ESSCIRC 2019-
IEEE 45th European Solid State Circuits Conference (ESSCIRC). IEEE,
processor [26]. However, transmon qubits can be arranged 2019, pp. 125–128.
with a pitch on the order of 1 mm, so it does not appear [9] J. C. Bardin et al., “A 28nm bulk-CMOS 4-to-8GHz 2mW cryogenic
to be impossible to develop interconnect systems capable of pulse modulator for scalable quantum computing,” in 2019 IEEE In-
ternational Solid-State Circuits Conference-(ISSCC). IEEE, 2019, pp.
delivering signals from a cryogenic control system to a large- 456–458.
scale quantum processor; this is an area of active research. [10] ——, “Design and characterization of a 28-nm bulk-CMOS cryogenic
Finally, we will also need to implement scalable readout quantum controller dissipating less than 2 mW at 3 K,” IEEE J. Solid-
State Circ., vol. 54, no. 11, pp. 3043–3060, 2019.
systems which are able to operate with low power while [11] ——, “Quantum computing: An introduction for microwave engineers,”
approaching the fundamental limits in terms of noise per- IEEE Microw. Mag., vol. 21, no. 8, pp. 24–44, 2020.
formance. While the details are beyond the scope of this [12] J. Koch et al., “Charge-insensitive qubit design derived from the cooper
pair box,” Physical Review A, vol. 76, no. 4, p. 042319, 2007.
article, the implementation of these systems will require the [13] P. Krantz et al., “A quantum engineer’s guide to superconducting qubits,”
development of microwave cryogenic low noise amplifiers Applied Physics Reviews, vol. 6, no. 2, p. 021318, 2019.
which can deliver state-of-the-art noise temperatures while [14] Z. Chen, “Metrology of quantum control and measurement in supercon-
ducting qubits,” Ph.D. dissertation, UC Santa Barbara, 2018.
dissipating well below 1 mW. In contrast to the amplifiers [15] D. P. DiVincenzo, “The physical implementation of quantum computa-
used in today’s systems (e.g., [27]), which are hand packaged tion,” Fortschritte der Physik: Progress of Physics, vol. 48, no. 9-11, pp.
and individually characterized at cryogenic temperatures, these 771–783, 2000.
[16] P. Jurcevic et al., “Demonstration of quantum volume 64 on a supercon-
devices must be mass-manufacturable and compatible with ducting quantum computing system,” arXiv preprint arXiv:2008.08571,
CMOS technologies, as they will likely need to be integrated 2020.
on the same die as the control electronics. While SiGe hetero- [17] F. Motzoi et al., “Simple pulses for elimination of leakage in weakly
nonlinear qubits,” Phys. rev. lett., vol. 103, no. 11, p. 110501, 2009.
junction bipolar transistors offer one promising path towards [18] R. Barends et al., “Superconducting quantum circuits at the surface code
the realization of integrated readout systems [28], [29], further threshold for fault tolerance,” Nature, vol. 508, no. 7497, pp. 500–503,
work is required to understand the repeatability and ultimate 2014.
[19] F. Yan et al., “Tunable coupling scheme for implementing high-fidelity
performance limitations of this technology. two-qubit gates,” Phys. Rev. App., vol. 10, no. 5, p. 054062, 2018.
[20] B. Foxen et al., “Demonstrating a continuous set of two-qubit gates for
VI. C ONCLUSION near-term quantum algorithms,” arXiv preprint arXiv:2001.08343, 2020.
In this article, we have introduced the reader to transmon [21] Standard Helium Liquefier/Refrigerator L280/LR280, Linde
Kryotechnik, Pfugen, Switzerland. [Online]. Available: https://linde-
qubit technology and explained the role of analog/mixed signal kryotechnik.ch/wp-content/uploads/2016/10/Datasheet L280-LR280-
integrated circuits in future large-scale error-corrected quan- E.pdf
tum computers. Today, we are just at the beginning of the road [22] E. Magesan et al., “Efficient measurement of quantum gate error by
interleaved randomized benchmarking,” Phys. Rev. Lett., vol. 109, no. 8,
in the development of this technology, and we have just seen p. 080505, 2012.
the emergence of integrated circuits specifically for quantum [23] N. Langford et al., “Experimentally simulating the dynamics of quantum
control within the past two years [5]–[10]. Fortunately for light and matter at deep-strong coupling,” Nature communications,
vol. 8, no. 1, pp. 1–10, 2017.
analog/mixed signal researchers, there is plenty of time to [24] M. Rol et al., “Fast, high-fidelity conditional-phase gate exploiting
contribute to the development of the electronics to support leakage interference in weakly anharmonic superconducting qubits,”
future quantum computers: even if the scale of quantum Phys. rev. lett., vol. 123, no. 12, p. 120502, 2019.
[25] D. P. Franke et al., “Rents rule and extensibility in quantum computing,”
processors doubles every twelve months, we are still over a Microprocessors and Microsystems, vol. 67, pp. 1–7, 2019.
decade from the availability of million-qubit-scale systems. [26] L. Petit et al., “Universal quantum logic in hot silicon qubits,” Nature,
However, in the meantime it is essential that circuit designers vol. 580, no. 7803, pp. 355–359, 2020.
[27] LNF-LNC4 8C 4–8 GHz Cryogenic Low Noise Ampli-
become involved in this exciting effort. fier, Low Noise Factory, Göteborg, Sweden. [Online].
Available: https://www.lownoisefactory.com/files/7015/7825/6000/LNF-
R EFERENCES LNC4 8C.pdf
[1] F. Arute et al., “Quantum supremacy using a programmable supercon- [28] S. Montazeri et al., “Ultra-low-power cryogenic SiGe low-noise am-
ducting processor,” Nature, vol. 574, no. 7779, pp. 505–510, 2019. plifiers: Theory and demonstration,” IEEE Trans. Microw. Theory and
[2] A. G. Fowler et al., “Surface codes: Towards practical large-scale Techn., vol. 64, no. 1, pp. 178–187, 2015.
quantum computation,” Phys. Rev. A, vol. 86, no. 3, p. 032324, 2012. [29] W.-T. Wong et al., “A 1 mW cryogenic LNA exploiting optimized SiGe
[3] B. Patra et al., “Cryo-cmos circuits and systems for quantum computing HBTs to achieve an average noise temperature of 3.2 K from 4-8 GHz,”
applications,” IEEE J. Solid-State Circ., vol. 53, no. 1, pp. 309–321, in Proc. IEEE IMS, 2020, pp. 181–184.
2017.

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