stb5nk50z-1_stb5nk50zt4_std5nk50zt4_stp5nk50zfp
stb5nk50z-1_stb5nk50zt4_std5nk50zt4_stp5nk50zfp
stb5nk50z-1_stb5nk50zt4_std5nk50zt4_stp5nk50zfp
STP5NK50Z - STP5NK50ZFP
N-CHANNEL 500V - 1.22Ω - 4.4A TO-220/FP-D/IPAK-D2/I2PAK
Zener-Protected SuperMESH™MOSFET
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
Rev. 2
September 2005 1/17
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Table 8: Dynamic
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (1) Forward Transconductance VDS = 15 V , ID = 2.2 A 3.1 S
Ciss Input Capacitance VDS = 25 V, f = 1 MHz, VGS = 0 535 pF
Coss Output Capacitance 75 pF
Crss Reverse Transfer 17 pF
Capacitance
COSS eq (3). Equivalent Output VGS = 0 V, VDS = 0 to 400 V 45 pF
Capacitance
td(on) Turn-on Delay Time VDD = 250 V, ID = 2.2 A, 15 ns
tr Rise Time RG = 4.7 Ω, VGS = 10 V 10 ns
td(off) Turn-off-Delay Time (see Figure 19) 32 ns
tf Fall Time 15 ns
Qg Total Gate Charge VDD = 400 V, ID = 4.4 A, 20 28 nC
Qgs Gate-Source Charge VGS = 10 V 4 nC
Qgd Gate-Drain Charge (see Figure 22) 10 nC
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STB5NK50Z/-1 - STD5NK50Z/-1 - STP5NK50Z - STP5NK50ZFP
Figure 3: Safe Operating Area For DPAK/IPAK/ Figure 6: Safe Operating Area For TO-220FP
D2PAK/I2PAK/TO-220
Figure 4: Thermal Impedance For DPAK/IPAK/ Figure 7: Thermal Impedance For TO-220FP
D2PAK/I2PAK/TO-220
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STB5NK50Z/-1 - STD5NK50Z/-1 - STP5NK50Z - STP5NK50ZFP
Figure 10: Gate Charge vs Gate-source Voltage Figure 13: Capacitance Variations
Figure 11: Normalized Gate Threshold Voltage Figure 14: Normalized On Resistance vs Tem-
vs Temperature perature
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Figure 15: Source-Drain Forward Characteris- Figure 17: Normalized BVDSS vs Temperature
tics
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Figure 18: Unclamped Inductive Load Test Cir- Figure 21: Unclamped Inductive Wafeform
cuit
Figure 19: Switching Times Test Circuit For Figure 22: Gate Charge Test Circuit
Resistive Load
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STB5NK50Z/-1 - STD5NK50Z/-1 - STP5NK50Z - STP5NK50ZFP
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These
packages have a Lead-free second level interconnect . The category of second level interconnect is
marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The
maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an
ST trademark. ECOPACK specifications are available at: www.st.com
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mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.45 0.7 0.017 0.027
F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067
G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106
H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 .0385 0.417
L5 2.9 3.6 0.114 0.141
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366
Ø 3 3.2 0.118 0.126
E
A
D
B
L3
L6
L7
F1
G1
G
H
F2
1 2 3
L5
L2 L4
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mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
A 4.40 4.60 0.173 0.181
b 0.61 0.88 0.024 0.034
b1 1.15 1.70 0.045 0.066
c 0.49 0.70 0.019 0.027
D 15.25 15.75 0.60 0.620
E 10 10.40 0.393 0.409
e 2.40 2.70 0.094 0.106
e1 4.95 5.15 0.194 0.202
F 1.23 1.32 0.048 0.052
H1 6.20 6.60 0.244 0.256
J1 2.40 2.72 0.094 0.107
L 13 14 0.511 0.551
L1 3.50 3.93 0.137 0.154
L20 16.40 0.645
L30 28.90 1.137
øP 3.75 3.85 0.147 0.151
Q 2.65 2.95 0.104 0.116
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mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 2.2 2.4 0.086 0.094
A1 0.9 1.1 0.035 0.043
A3 0.7 1.3 0.027 0.051
B 0.64 0.9 0.025 0.031
B2 5.2 5.4 0.204 0.212
B3 0.85 0.033
B5 0.3 0.012
B6 0.95 0.037
C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
E 6.4 6.6 0.252 0.260
G 4.4 4.6 0.173 0.181
H 15.9 16.3 0.626 0.641
L 9 9.4 0.354 0.370
L1 0.8 1.2 0.031 0.047
L2 0.8 1 0.031 0.039
H
C
A
A3
C2
A1
L2 D L
B3
B6
B5
B
3
=
=
B2
G
E
2
=
=
1
L1
0068771-E
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STB5NK50Z/-1 - STD5NK50Z/-1 - STP5NK50Z - STP5NK50ZFP
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
L 13 14 0.511 0.551
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DPAK FOOTPRINT
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STB5NK50Z/-1 - STD5NK50Z/-1 - STP5NK50Z - STP5NK50ZFP
mm. inch
DIM.
MIN. TYP MAX. MIN. TYP. MAX.
D1 8 0.315
E 10 10.4 0.393
E1 8.5 0.334
R 0.4 0.015
V2 0º 4º
3
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STB5NK50Z/-1 - STD5NK50Z/-1 - STP5NK50Z - STP5NK50ZFP
mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
L2 0.8 0.031
V2 0o 8o 0o 0o
P032P_B
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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