1
Request Current State Final State If Grant or Deny Reason for Final Edge Type
Before Request Request Denial
Request Performed
P4 -> R1 safe Safe Grant - Assignment Edge
P2 -> R1 safe safe Deny P4 holds R1 Request Edge
P2 -> R3 safe safe Grant - Assignment Edge
P1 -> R2 safe safe Grant - Assignment Edge
P5 -> R4 safe Unsafe Deny Cycle Request Edge
P3 -> R1 safe safe Deny P4 holds R1 Assignment Edge
P3 -> R2 safe safe Deny P1 holds R2 Request Edge
P1 -> R4 safe safe Deny P5 holds R4 Request Edge
P5-> R2 safe safe Deny P1 holds R2 Request Edge
Final Resource Allocation Graph
R2
P1
1 P5
1
P2
1 R3
R1
R4
P3
1
P4
1
2
a)
P5 P3 P4 P1 P2
A B C A B C A B C A B C A B C
4 2 1 4 3 2 6 6 4 7 7 5 8 7 7
The system is in safe state.
b) There are two rules;
i. 1. P2 need (7,0,4) > (1,0,2) TRUE
2. Available (2,0,1) > (1,0,2) FALSE
ii. 1. P3 need (3,0,1) > (2,0,1) TRUE
2. Available (2,0,1) >= (2,0,1) TRUE NEW SYSTEM -→
Allocation MAX NEED AVAILABLE
A B C A B C A B C
P1 1 1 1 3 2 5 A B C
2 1 4
P2 1 0 2 8 0 6 0 0 0
7 0 4
P3 2 1 2 3 1 2 1 0 0
P4 2 3 2 4 4 4 2 1 2
P5 2 2 0 3 2 0 1 0 0
iii. 1. P4 need (2,1,2) >(1,0,0) TRUE
2. Available (2,0,1) > (1,0,0) TRUE NEW SYSTEM -→
Allocation MAX NEED AVAILABLE
A B C A B C A B C
A B C
3 2 5 2 1 4 1 0 1
P1 1 1 1
P2 1 0 2 8 0 6 7 0 4
P3 0 1 1 3 1 2 3 0 1
P4 3 3 2 4 4 4 1 1 2
P5 2 2 0 3 2 0 1 0 0
S0,
P5 P3 P4 P1 P2
A B C A B C A B C A B C A B C
3 2 1 3 3 2 6 6 4 7 7 5 8 7 7
Finally, request is granted.
3
a) First-fit
15KB 25KB 10KB 15KB 35KB 15KB 20KB 5KB 30KB 15KB
P1 P4 P2 P5
NOT: P3 cannot be allocated because no hole large enough.
b) Best-fit
35KB 5KB 20KB 5KB 40KB 10KB 25KB 30KB 15KB
P2 P5 P3 P4 P1
c) Worst-fit
40KB 25KB 15KB 35KB 25KB 10KB 20KB 15KB
P3 P1 P2 P4 P5
4
a) HASH FUNCTİON ??????????
Hash = Page Number mod 5
Here, Page Number is the first two bits of the logical address and is used to convert this page number
to a frame number in physical memory.
b)
HASHED PAGE TABLE
Page Number Frame Number
0 4
1 3
2 1
3 0
Answer is “I hope to pass the class”
5
32-bit logical addressing,
Logical Address Space Size: 2GB = 2 x 230 bytes 231 bytes
Page Size: 4KB = 4 x 210 212 bytes
Page Table Entry Size: 4 bytes
So,
a) Number of pages = Size of the logical address space / Page size
219 = 231 / 212
This result ( 219 ) pages are required to map the entire logical address space.
b) Page offset log2212 12 bits
The logical address space is 32 bits in total, and we know the page offset uses 12 bits, so the
remaining 20 bits (32 - 12) will be used for the page table index.
P1 (higher-level page table index): 10 bits
P2 (second-level page table index): 10 bits
Then,
Size of each second level page table=210 × 4 KB=212 x 210 bytes=4 MB (222 )
Total memory for page tables = 210 x 4 KB = 4 MB
