University Questions with Solutions-

Module 5: Memory Organization

1) Set-Associative -Memory Mapping Example- (Dec 2022)(10 M)

Solution:

1 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 2) Set-Associative Memory Mapping Example- (Nov 2023) (10 M)

Solution:

2 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 3) Set-Associative -Memory Mapping Example- (May 2022)(5M)

Solution:

3 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 4) Set-Associative-Memory Mapping Example- (May 2024)(10 M)

Solution:

4 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 5) Direct-Memory Mapping Example

Solution:

5 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

 6) Consider a fully associative mapped cache of size 16 KB with block size 256 bytes.
The size of main memory is 128 KB. Find1.Number of bits in tag, 2. Tag directory
size.

Solution:

6 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering

7 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering
 7) List and explain characteristics of memory. (May 2023 and May 2024) Dec 2022
(5M)
Solution:
Computer Memory is broadly classified in to;
a. Cache Memory
b. Primary or Main Memory (RAM+ROM)
c. Secondary Memory
1. Cache Memory
• Speed: Extremely fast compared to primary and secondary memory.
• Location: Located close to the CPU, either integrated into the processor (L1 and L2
cache) or on the motherboard (L3 cache).
• Purpose: Used to store frequently accessed data and instructions to reduce the time
the CPU takes to fetch data from the main memory.
• Capacity: Limited in size, typically in the range of a few MBs (megabytes).
• Types:
o L1 Cache: Fastest, smallest, located directly on the processor.
o L2 Cache: Larger and slower than L1, may be located on the processor or
near it.
o L3 Cache: Largest and slowest of the three, shared among cores in multi-core
processors.
• Volatile: Loses data when the computer is powered off.
2. Primary Memory (Main Memory)
This includes RAM (Random Access Memory) and ROM (Read-Only Memory). It is used
for storing data temporarily while the computer is running.
a. RAM (Random Access Memory)
• Speed: Faster than secondary memory but slower than cache memory.
• Capacity: Larger than cache memory, typically ranging from several GBs (gigabytes)
to tens of GBs.
• Volatile: Loses data when the computer is turned off.
• Purpose: Holds data and instructions that are actively being used by the CPU. All
running applications and the operating system are loaded into RAM to allow quick
access.
• Types:
o DRAM (Dynamic RAM): Requires periodic refreshing, used in main
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 memory.
o SRAM (Static RAM): Faster, more expensive, used in cache memory.
b. ROM (Read-Only Memory)
• Speed: Slower than RAM.
• Non-volatile: Retains data even when the computer is powered off.
• Purpose: Stores firmware or essential system instructions (such as the BIOS) that are
required for the system to boot up and operate.
• Types:
o PROM (Programmable ROM): Can be written once and read many times.
o EPROM (Erasable Programmable ROM): Can be erased and reprogrammed
using UV light.
o EEPROM (Electrically Erasable Programmable ROM): Can be erased and
reprogrammed electrically.
3. Secondary Memory (Storage)
This includes storage devices like HDD (Hard Disk Drives), SSD (Solid State Drives),
USB drives, and optical discs (e.g., CDs, DVDs). Secondary memory is used for long-
term data storage.
• Speed: Slower than primary memory and cache memory.
• Capacity: Much larger than primary memory, ranging from GBs to several TBs
(terabytes).
• Non-volatile: Data is retained even when the computer is powered off.
• Purpose: Stores files, applications, and the operating system permanently or semi-
permanently.
• Types:
o HDD (Hard Disk Drive): Traditional mechanical drive, slower but cheaper,
with larger capacities.
o SSD (Solid State Drive): Faster, more reliable, and uses flash memory, but
more expensive per GB than HDD.
o Optical Discs: Used for backup and distribution of data. Slower and less
common in modern systems.
o USB Drives: Portable, used for transferring data between systems.
9 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering
 Key Differences Between the Memory Types:
• Speed: Cache > RAM > Secondary Storage.
• Cost: Cache (most expensive per bit) > RAM > Secondary Storage (least expensive per
bit).
• Capacity: Secondary Storage > RAM > Cache.
• Volatility: Cache and RAM are volatile, while ROM and secondary storage are non-
volatile.
Each type of memory serves a specific role in balancing speed, cost, and capacity
in a computer system.

8) Explain different memory mapping techniques. (May 2023) (10 M)

Solution:
Note: Refer Chapter 5-Memory Mapping Techniques Notes (Uploaded on Moodle)
9) Explain the principle of locality of reference in detail. (May 2024) (5 M)

Solution:
1. Spatial Locality
2. Temporal Locality
• Information which is required frequently is kept in cache memory and Which
information from main memory has to be loaded in to cache memory is decided
by locality of Reference.
• There are 2 approaches used by processor to decide which data has to be moved to
cache memory.
• Spatial Locality: At particular point of time if memory location referred by processor
and chances are nearby locations are required in future.
• Temporal Locality: At particular point of time if memory location referred by
processor and there are chances that this memory location will be referred again.

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 10) Explain in detail cache coherence. (Dec 2022 and May 2023) (5M)

Solution:
Consider Examples of Multi Core Processor.
• Each processor is having L1 and L2 cache i.e. these L1 and L2 caches are private storage
of each processor. And L3 cache is combined to both 2 processor.
• Processor is connected to Main memory via system bus.

• Consider there are 4 processors P1, P2, P3 and P4 and they are connected to main memory
via system bus. Each one is having its own private caches and these private caches are
connected internally by internal Bus. Consider entire organization work as (MISD)
Multiple Instruction steam and Single Data stream organization. All these processors
operate on same data.
• Consider in Main Memory there is a program having global variable A and value of
A=7.
• Suppose P1 want to perform operation P1=A+1
• Suppose P2 want to perform operation P2=A+2
• Suppose P3 want to perform operation P3=A-1
• Suppose P4 want to perform operation P4=A-2

• Suppose P1 want to perform operation P1=A+1 (increment value of A by One); so P1

check for value of A in its internal cache; but as it is first access to A , value of A in not

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 available in internal cache of P1. So P1 go for next hierarchy i.e. main memory and bring
the value of A and stored in its internal cache memory; and perform P1=A+1 ; so now
value of A=8.

• Suppose now P2 want to perform operation A+2; now value of A in internal cache P2 is
• Similarly P3 perform A-1 operation
• P4 perform operation A-2.
• So variable A is having different value in different cache memory and this results in
cache coherence problem.

11) Write short note on interleaved and associative memory. (May 2022)(5 M)
Solution:
a. Interleaved Memory:
• Consider there are two operations needs to perform on main memory, that read memory
location 2000 and write at memory location 3000. These two operations cannot be
performed at same time, i.e., one operation at one time only. That is main memory
is single main memory and both requests cannot be accepted at same time. This is
limitation of main memory. To overcome this problem “Memory Interleaving”
Concept is used.

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 • In this memory interleaving main memory (single large memory) is divided in to
equal sized blocks called as memory modules based on system requirements.

• Here Memory is divided in to 4 memory modules; module M1, M2, M3 and M4. There is
assignment of two register AR (Address Register) and DR (Data Register) for each
memory module.

• Address Bus and data bus is common to all memory modules. Address register received
address from Address bus and address bus is unidirectional. Data bus is bidirectional;
data register received data from data bus as well as DR send data to data bus. DR
received the data from memory module 1 or 2 or 3 or 4.

• Consider AR received address 0010. Last 2 bits specify memory module (M1=00,
M2=01, M3=10, M4=11). So here memory module 3 and remaining 2 bits represent
specific memory location of that memory module. That is based on this we can find
which memory module is in activity. That is Module M3 will not affect processing of
all other modules.

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 • If any memory module is involved in read or write operation, it will not affect
processing of other modules. i.e. performance of the system is increased.

b. Associative Memory:
In conventional memory, data is stored in specific locations, called addresses, and retrieved
by referencing those addresses. In associative memory, data is stored together with
additional tags or metadata that describe its content. When a search is performed, the
associative memory compares the search query with the tags of all stored data, and retrieves
the data that matches the query.
• Associative memory is the Memory Unit accessed by content rather than address.
• When data is accessed by the content rather than data address, then the memory is
called as “Associative Memory” or “Content Addressable Memory (CAM)”.
• During write operation Data is stored at the very first empty location found in memory.
• In associative memory data is stored at a particular location but no address is stored along
with it.
• During read operation data is read based on content matched or key. When stored data
need to searched then only the key (i.e. data or part of data) is provided.

• Block Diagram of Associative Memory or Hardware organisation of Associative

Memory:

Argument Register (A): It contains the word to be searched. It contains n number

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 of bits.
Key Register (K): Key Register is used for comparison purpose. This register
specifies which part of the word needs to be compared with words in memory. If all
bits in register are 1, then entire word should be compared. Else only the bits having 1
will be compared.
Associative Memory Array and Logic: Consist of m memory words of size n bits.
Match Register: Use to match data based on Key. Contains ‘0’ value or ‘1’ value and
capacity of M register is m bits.
Case 1: Match register contains value ‘1’
When content of argument register is compared with content of
Associative memory when key register contains only once then match is
occurred and Value of M is put it as ‘1’
Case 2: Match Register contains value ‘0’
When key register contains ‘0’ then no comparison is performed, i.e.
match is not found at M value put it as ‘O’.

12) Compare SRAM and DRAM. (May 2023 and Nov 2023)(5M)
Solution:
1. Speed: SRAM is much faster than DRAM, which is why it is used in cache memory,
whereas DRAM is used for main system memory where large capacity is more
important.
2. Power Consumption: SRAM consumes less power than DRAM when idle, but DRAM
is more power-efficient in terms of storage capacity per watt.
3. Cost and Density: SRAM is more expensive and larger per bit, while DRAM is cheaper
and offers higher memory density.
4. Usage: SRAM’s higher speed makes it suitable for CPU caches, while DRAM's larger
capacity and lower cost make it ideal for primary memory in computers and devices.

15 Prepared by Dr. Mamta Kurvey/Prof. Sukhada Aloni/Prof. Reshma Koli/Computer Engineering