Scribd
Upload
19 views13 pages

Working of NMOS

Uploaded by

As Venkivenkatesh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
19 views13 pages

Working of NMOS

Uploaded by

As Venkivenkatesh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 13

p-substrate

nMOS
Polysilicon gate
Device Behavior
Inversion
Oxide insulator
Region
(n-type)

Depletion region
Depletion region

Vgs = Vt Vgs > Vt


Vgs << Vt
Depletion mode Inversion mode
Accumulation
mode
• Enhancement-mode transistor: Conducts when gate
bias Vgs > Vt
•Depletion-mode transistor: Conducts when gate bias is zero

Dr. Girish, Assoc. Prof., Department of Electronics & Communication Engineering www.cambridge.edu.in
Accumulation, Depletion & Inversion
modes

Department of Electronics & Communication Engineering www.cambridge.edu.i


• In Figure 2.2(a) , a negative voltage is applied to the gate, so there is
negative charge on the gate.
• The mobile positively charged holes are attracted to the region
beneath the gate. This is called the accumulation mode.
• In Figure 2.2(b), a small positive voltage is applied to the gate,
resulting in some positive charge on the gate.
• The holes in the body are repelled from the region directly beneath
the gate, resulting in a depletion region forming below the gate.

Department of Electronics & Communication Engineering www.cambridge.edu.i


• In Figure 2.2(c), a higher positive potential exceeding a critical
threshold voltage Vt is applied, attracting more positive charge to the
gate.
• The holes are repelled further and some free electrons in the body
are attracted to the region beneath the gate.
• This conductive layer of electrons in the p-type body is called the
inversion layer
• The threshold voltage depends on the number of dopants in the body
and the thickness tox of the oxide. It is usually positive, as shown in
this example.
Department of Electronics & Communication Engineering www.cambridge.edu.i
Working of nMOS Transisor

• 3 Regions of operation of nMOS Transistor

• Cutoff Region: VGS<VT


• Linear Region: VGS>=VT; VDS<VGS-VT
• Saturation Region : VGS>=VT; VDS>VGS-VT

Dr. Girish, Assoc. Prof., Department of Electronics & Communication Engineering www.cambridge.edu.in
Dr. Girish, Assoc. Prof., Department of Electronics & Communication Engineering
Cutoff Region

• Figure 2.3 shows an nMOS transistor.


• In Figure 2.3(a), the gate-to-source voltage Vgs is less than the threshold voltage.
• The source and drain have free electrons. The body has free holes but no free
electrons.
• Since the source is grounded, The junctions between the body and the source or
drain are zero-biased or reverse-biased, so little or no current flows. We say the
transistor is OFF, and this mode of operation is called cutoff.

Department of Electronics & Communication Engineering www.cambridge.edu.i


Linear region

In Figure 2.3(b), the gate voltage is greater than the threshold voltage.
Now an inversion region of electrons (majority carriers) called the channel connects
the source and drain, creating a conductive path and turning the transistor ON.

Department of Electronics & Communication Engineering www.cambridge.edu.i


• The number of carriers and the conductivity increases with the gate
voltage. The potential difference between drain and source is Vds =
Vgs -Vgd .
• If Vds = 0 (i.e., Vgs = Vgd), there is no electric field tending to push
current from drain to source.
• When a small positive potential Vds is applied to the drain (Figure
2.3(c)), current Ids flows through the channel from drain to source.
• This mode of operation is termed linear, resistive, triode,
nonsaturated, or unsaturated;
Saturation region

• The current increases with both the drain voltage and gate voltage.
• If Vds becomes sufficiently large that Vgd < Vt , the channel is no
longer inverted near the drain and becomes pinched off (Figure
2.3(d)).
• As electrons reach the end of the channel, they are injected into the
depletion region near the drain and accelerated toward the drain.
• Above this drain voltage the current Ids is controlled only by the gate
voltage and ceases to be influenced by the drain.
• This mode is called saturation.
• In summary, the nMOS transistor has three modes of operation.
• If Vgs < Vt, the transistor is cutoff (OFF).
• If Vgs > Vt, the transistor turns ON.
• If Vds is small, the transistor acts as a linear resistor in which the
current flow is proportional to Vds.
• If Vgs > Vt and Vds is large, the transistor acts as a current source in
which the current flow becomes independent of Vds.
PMOS Transistor

The pMOS transistor in Figure 2.4 operates in just the opposite fashion. The n-type body
is tied to a high potential so the junctions with the p-type source and drain are normally
reverse-biased. When the gate is also at a high potential, no current flows between
drain and source. When the gate voltage is lowered by a threshold Vt , holes are
attracted to form a p-type channel immediately beneath the gate, allowing current to
flow between drain and source. The threshold voltages of the two types of transistors
are not necessarily equal, so we use the terms Vtn and Vtp to distinguish the nMOS and
pMOS thresholds.

You might also like