0% found this document useful (0 votes)
10 views42 pages

Ch8a Myppt

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
10 views42 pages

Ch8a Myppt

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 42

1

Code Generation
2

Flow Graphs
• A flow graph is a graphical depiction of a
sequence of instructions with control flow
edges
• A flow graph can be defined at the
intermediate code level or target code level
MOV 1,R0 MOV 0,R0
MOV n,R1 MOV n,R1
JMP L2 JMP L2
L1: MUL 2,R0 L1: MUL 2,R0
SUB 1,R1 SUB 1,R1
L2: JMPNZ R1,L1 L2: JMPNZ R1,L1
3

Basic Blocks
• A basic block is a sequence of instructions
– Control enters through the first instruction
– Control leaves the block without branching,
except possibly at the last instruction
MOV 1,R0
MOV 1,R0 MOV n,R1
MOV n,R1 JMP L2
JMP L2
L1: MUL 2,R0 L1: MUL 2,R0
SUB 1,R1 SUB 1,R1
L2: JMPNZ R1,L1
L2: JMPNZ R1,L1
4

Basic Blocks and Control Flow


Graphs
• A control flow graph (CFG) is a directed
graph with basic blocks Bi as vertices and
with edges Bi → Bj iff Bj can be executed
immediately after Bi
MOV 1,R0
MOV n,R1
MOV 1,R0 JMP L2
MOV n,R1
JMP L2 L1: MUL 2,R0
L1: MUL 2,R0 SUB 1,R1
SUB 1,R1
L2: JMPNZ R1,L1
L2: JMPNZ R1,L1
5

Successor and Predecessor


Blocks
• Suppose the CFG has an edge B1 → B2
– Basic block B1 is a predecessor of B2
– Basic block B2 is a successor of B1

MOV 1,R0
MOV n,R1
JMP L2

L1: MUL 2,R0


SUB 1,R1

L2: JMPNZ R1,L1


6

Partition Algorithm for Basic


Blocks
Input: A sequence of three-address statements
Output: A list of basic blocks with each three-address statement
in exactly one block

1. Determine the set of leaders, the first statements if basic blocks


a) The first statement is the leader
b) Any statement that is the target of a goto is a leader
c) Any statement that immediately follows a goto is a leader
2. For each leader, its basic block consist of the leader and all
statements up to but not including the next leader or the end
of the program
7

Loops
• A loop is a collection of basic blocks, such
that
– All blocks in the collection are strongly
connected
– The collection has a unique entry, and the only
way to reach a block in the loop is through the
entry
8

Loops (Example)
B1: MOV 1,R0 Strongly connected
MOV n,R1
JMP L2
components:

B2: L1: MUL 2,R0 SCC={{B2,B3},


SUB 1,R1 {B4} }
B3: L2: JMPNZ R1,L1

B4: L3: ADD 2,R2


SUB 1,R0 Entries:
JMPNZ R0,L3 B3, B4
9

Equivalence of Basic Blocks


• Two basic blocks are (semantically)
equivalent if they compute the same set of
expressions
b := 0
t1 := a + b
t2 := c * t1 a := c * a
a := t2 b := 0

a := c*a a := c*a
b := 0 b := 0
Blocks are equivalent, assuming t1 and t2 are dead: no longer used (no longer live)
10

Transformations on Basic Blocks


• A code-improving transformation is a code
optimization to improve speed or reduce code size
• Global transformations are performed across basic
blocks
• Local transformations are only performed on
single basic blocks
• Transformations must be safe and preserve the
meaning of the code
– A local transformation is safe if the transformed basic
block is guaranteed to be equivalent to its original form
11

Common-Subexpression
Elimination
• Remove redundant computations

a := b + c a := b + c
b := a - d b := a - d
c := b + c c := b + c
d := a - d d := b

t1 := b * c
t1 := b * c
t2 := a - t1
t2 := a - t1
t3 := b * c
t4 := t2 + t1
t4 := t2 + t3
12

Dead Code Elimination


• Remove unused statements

b := a + 1 b := a + 1
a := b + c …

Assuming a is dead (not used)

if true goto L2

b := x + y
Remove unreachable code

13

Renaming Temporary Variables


• Temporary variables that are dead at the end
of a block can be safely renamed

t1 := b + c t1 := b + c
t2 := a - t1 t2 := a - t1
t1 := t1 * d t3 := t1 * d
d := t2 + t1 d := t2 + t3

Normal-form block
14

Interchange of Statements
• Independent statements can be reordered

t1 := b + c t1 := b + c
t2 := a - t1 t3 := t1 * d
t3 := t1 * d t2 := a - t1
d := t2 + t3 d := t2 + t3

Note that normal-form blocks permit all


statement interchanges that are possible
15

Algebraic Transformations
• Change arithmetic operations to transform
blocks to algebraic equivalent forms

t1 := a - a t1 := 0
t2 := b + t1 t2 := b
t3 := 2 * t2 t3 := t2 << 1
16
17
18
19
20
21
22
23
24
25

A Code Generator
• Generates target code for a sequence of
three-address statements using next-use
information
• Uses getreg to assign registers to variables
• For instruction x := y op z
getreg(y, z) returns a location (register) for x
• Results are kept in registers as long as possible:
– Result is needed in another computation
– Register is kept up to a procedure call or end of block
• Check if operands of three-address code are
available in registers
26

The Code Generation Algorithm


• For each statement x := y op z
1. Set location L = getreg(y, z) to get register for x
2. If y ∉ L then generate
MOV y’,L
where y’ denotes one of the locations where the value
of y is available (choose register if possible)
3. Generate
OP z’,L
where z’ is one of the locations of z;
Update register/address descriptor of x to include L
4. If y and/or z has no next use and is stored in register,
update register descriptors to remove y and/or z
27

Register and Address Descriptors


• A register descriptor keeps track of what is
currently stored in a register at a particular point in
the code, e.g. a local variable, argument, global
variable, etc.
MOV a,R0 “R0 contains a”
• An address descriptor keeps track of the location
where the current value of the name can be found
at run time, e.g. a register, stack location, memory
address, etc.
MOV a,R0
MOV R0,R1 “a in R0 and R1”
28

The getreg Algorithm


• To compute getreg(y, z)
1. If y is stored in a register R and R only holds the
value y, and y has no next use, then return R;
Update address descriptor: value y no longer in R
2. Else, return a new empty register if available
3. Else, find an occupied register R;
Store contents (register spill) by generating
MOV R,M
for every M in address descriptor of y;
Return register R
4. Return a memory location
29

Code Generation Example


Register Address
Statements Code Generated
Descriptor Descriptor
Registers empty
t := a - b MOV a,R0 R0 contains t t in R0
SUB b,R0

u := a - c MOV a,R1 R0 contains t t in R0


SUB c,R1 R1 contains u u in R1

v := t + u ADD R1,R0 R0 contains v u in R1


R1 contains u v in R0

d := v + u ADD R1,R0 R0 contains d d in R0


MOV R0,d d in R0 and
live(d)=true memory
all other dead
30

Peephole Optimization
• Examines a short sequence of target instructions in
a window (peephole) and replaces the instructions
by a faster and/or shorter sequence when possible
• Applied to intermediate code or target code
• Typical optimizations:
– Redundant instruction elimination
– Flow-of-control optimizations
– Algebraic simplifications
– Use of machine idioms
31

Peephole Opt: Eliminating


Redundant Loads and Stores
• Consider
MOV R0,a
MOV a,R0
• The second instruction can be deleted, but only if
it is not labeled with a target label
– Peephole represents sequence of instructions with at
most one entry point
• The first instruction can also be deleted if
live(a)=false
32

Peephole Optimization: Deleting


Unreachable Code
• Unlabeled blocks can be removed

if 0==0 goto L2 goto L2

b := x + y b := x + y
… …
33

Peephole Optimization: Branch


Chaining
• Shorten chain of branches by modifying
target labels

if a==0 goto L2 if a==0 goto L3

b := x + y b := x + y
… …

L2: goto L3 L2: goto L3


34

Peephole Optimization: Other


Flow-of-Control Optimizations
• Remove redundant jumps


goto L1

L1:
… …
35

Other Peephole Optimizations


• Reduction in strength: replace expensive
arithmetic operations with cheaper ones
… …
a := x ^ 2 a := x * x
b := y / 8 b := y >> 3
• Utilize machine idioms
… …
a := a + 1 inc a
• Algebraic simplifications
… …
a := a + 0
b := b * 1
36
37

Heuristic ordering for DAGS


38
39
40
41
42

You might also like