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Coal Week 4 Lectures (Lec 10-12)

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0% found this document useful (0 votes)
18 views52 pages

Coal Week 4 Lectures (Lec 10-12)

Uploaded by

Zajnan Aslam
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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EE-2003

Computer Organization
& Assembly Language
INSTRUCTOR

Engr. Aashir Mahboob


Lecturer, Department of Computer Science
FAST NUCES (Karachi)
[email protected]
Chapter No: 04

Data Transfers, Addressing, and Arithmetic


OUTLINE
 DATA TRANSFER INSTRUCTIONS

 ADDITION AND SUBTRACTION

 DATA RELATED OPERATORS AND DIRECTIVES

 INDIRECT ADDRESSING

 JMP AND LOOP INSTRUCTIONS


DATA TRANSFER INSTRUCTION
Operand Types
 •Instructions in assembly language can have zero, one, two, or three operands.

 •mnemonic

 •mnemonic [destination]

 •mnemonic [destination],[source]

 •mnemonic [destination],[source1],[source2]
DATA TRANSFER INSTRUCTION
•The three types of operands are:

1. Immediate: a numeric literal expression /a constant integer (8, 16, or 32 bits), value is
encoded within the instruction.

2. Register: the name of a register, register name is converted to a number and


encoded within the instruction.

3. Memory: references a location in memory, memory address is encoded within the


instruction, or a register holds the address of a memory location.
DATA TRANSFER INSTRUCTION
DATA TRANSFER INSTRUCTION
 Direct Memory Operands
•Variable names are references to offsets within the data segment.

•A direct memory operand is a named reference to storage in memory.

•The named reference (label) is automatically dereferenced by the assembler.


MOV INSTRUCTION
•The MOV instruction copies data from a source operand to a destination operand.
Known as a data transfer instruction.

MOV destination,source
•Both operands must be the same size.
•Both operands cannot be memory operands.
•The instruction pointer register (IP, EIP) and CS cannot be a destination operand.
MOV INSTRUCTION
MOVZX INSTRUCTION
 Zero Extension

•MOV instruction cannot directly copy data from a smaller operand to a larger one.

mov bl,10001111b
mov ax,bl ; error

•MOVZX (move with zero-extend) instruction fills (extends) the upper half of the destination
with zeros.
EXERCISE
EXERCISE
MOVSX INSTRUCTION
 The MOVSX instruction (move with sign-extend) copies the contents of a source
operand into a destination operand and fills the upper half of the destination with a
copy of the source operand's sign bit.
EXERCISE
XCHG INSTRUCTION
 The XCHG (exchange data) instruction exchanges the contents of two operands.

 There are three variants:

 You can exchange data between registers or between registers and memory, but not
from memory to memory:
XCHG INSTRUCTION
 The rules for operands in the XCHG instruction are the same as those for
the MOV instruction...
...except that XCHG does not accept immediate operands.

 In array sorting applications, XCHG provides a simple way to exchange two array
elements.
EXERCISE
Direct-Offset Operands
 lets you access memory locations that may not have explicit labels.

 A constant is added to a data label to produce an effective


address (EA). The address is dereferenced to get the value inside its
memory location.
Direct-Offset Operands
 WORD Arrays; In an array of 16-bit words, the offset of each array element is 2 bytes beyond the
previous one.
 That’s why 2 is added as offset in Array (for each next element of an array)

 DWORD Arrays; In an array of 32-bit words, the offset of each array element is 4 bytes beyond the
previous one.
 That’s why 4 is added as offset in Array (for each next element of an array)
EXAMPLE PROGRAM (MOVES)
ADDITION AND SUBTRACTION
 INC and DEC Instructions
•The INC (increment) and DEC (decrement) instructions, respectively, add 1 and
subtract 1 from a register or memory operand.
ADDITION AND SUBTRACTION
ADD Instruction
The ADD instruction adds a source operand to a destination operand of the same
size.

SUB Instruction
The SUB instruction subtracts a source operand from a destination operand.

•The set of possible operands is the same as for the MOV instruction
ADDITION AND SUBTRACTION
NEG Instruction
 The neg (negate) instruction takes the two's complement of a byte or word.

 It takes a single (destination) operation and negates it. The syntax for this
instruction is:

 Neg always updates the A, S, P, and Z flags as though you were using the sub
instruction.
Implementing Arithmetic Expressions
 HLL compilers translate mathematical expressions into assembly language.
You can do it also. For example:
Flags Affected by Addition and Subtraction
•The ALU has a number of status flags that reflect the outcome of arithmetic
(and bitwise) operations.
• based on the contents of the destination operand.

•We use the values of CPU status flags to check the outcome of arithmetic
operations and to activate conditional branching instructions.
•Essential flags:
 Zero flag – set when destination equals zero
 Sign flag – set when destination is negative; if the MSB of the destination
operand is set,
 Carry flag – set when unsigned value is out of range.
 Overflow flag – set when signed value is out of range .
Flags Affected by Addition and Subtraction
ADD & SUB Instructions
 Example:
ADD & SUB Instructions
 Example:
ADD & SUB Instructions
Sign and Overflow Flags:
 The Sign flag is set when the result of a signed arithmetic operation is negative.

 The Overflow flag is set when the result of a signed arithmetic operation overflows or underflows
the destination operand.
LAHF/SAHF (load/store status flag from/to AH)
 LAHF instruction loads lower byte of the EFLAGS register into AH register.

 The lowest 8 bits of the flags are transferred:


 Sign

 Zero

 Auxiliary Carry
 Parity

 Carry
LAHF/SAHF (load/store status flag from/to AH)
 SAHF restores the value of lower byte flags.

 This instruction copies, AH into low byte of EFLAGS Register.


EFLAGS
ALIGN DIRECTIVE
 The ALIGN directive aligns a variable on a byte, word, doubleword,
or paragraph boundary.
 The syntax is :
ALIGN bound

 Bound can be 1, 2, 4, 8, or 16. A value of 1 aligns the next variable


on a 1- byte boundary (the default).

 If bound is 2, the next variable is aligned on an even-numbered


address. If bound is 4, the next address is a multiple of 4. If bound is
16, the next address is a multiple of 16, a paragraph boundary.
ALIGN DIRECTIVE
 The assembler can insert one or more empty bytes before the variable
to fix the alignment.

 Why bother aligning data?

 Because the CPU can process data stored at even-numbered


addresses more quickly than those at odd-numbered addresses.
ALIGN DIRECTIVE
 In the following example, bVal is arbitrarily located at offset
00404000. Inserting the ALIGN 2 directive before wVal causes it to
be assigned an even-numbered offset:

 Note that dVal would have been at offset 00404005, but the ALIGN
4 directive bumped it up to offset 00404008.
OFFSET Operator
 The OFFSET operator return the offset of a data label
 The offset represents the distance, in bytes, of the label from beginning of the data segment
 Figure shows a variable named myByte inside the data segment
OFFSET Operator
 Example:
 Declaration of different types:

 If bVal were located at offset 00404000 (hexa-decimal), the OFFSET operator would return the
following values:
PTR Operator
 You can use the PTR operator to override the declared size of an operand.

 Why wasn’t 1234h moved into AX?


 x86 processors use the little endian storage format in which the low-order byte
is stored at the variable’s starting address.
TYPE Operator
 The TYPE operator returns the size, in bytes, of a single element of a data
declaration.
LENGTHOF Operator
 The LENGTHOF operator counts the number of elements in an array, defined
by the values appearing on the same line as its label.

 If you declare an array that spans multiple program lines, LENGTHOF only
regards the data from the first line as part of the array (here LENGTHOF
myArray returns 5).
SIZEOF Operator
 The SIZEOF operator returns a value that is equivalent to multiplying
LENGTHOF by TYPE.
LABEL Directive
 The LABEL directive assigns an alternate label name and type to an existing
storage location. LABEL does not allocate any storage of its own.
• A common use of LABEL is to provide an alternative name and size attribute
for the variable declared next in the data segment.
INDIRECT ADDRESSING
 Direct addressing is rarely used for array processing because it is impractical to
use constant offsets to address more than a few array elements.
 An indirect operand holds the address of a variable, usually an array or string. It
can be dereferenced (just like a pointer).
INDIRECT ADDRESSING
 The size of an operand may not be evident from the context of an instruction.

 Because the assembler does not know whether ESI points to a byte, word,
doubleword, or some other size. The PTR operator confirms the operand size:
Arrays
 Indirect operands are ideal tools for stepping through arrays.
Indexed Operands
 An indexed operand adds a constant to a register to generate an effective
address. There are two notational forms:
 [label + reg] label[reg]
Scale Factors in Indexed Operands
 Indexed operands must take into account the size of each array
element when calculating offsets.

 Using an array of doublewords, as in the following example, we


multiply the subscript (3) by 4 (the size of a doubleword) to
generate the offset of the array element containing 400h:
Scale Factors in Indexed Operands
 The x86 instruction set provides a way for offsets to be calculated,
using a scale factor .

 The scale factor is the size of the array component (WORD=2,


DWORD=4 or QWORD=8 ).
EXERCISE
 What will be the value of EAX after each of the following instructions execute?
EXERCISE

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