Coal Week 1 Lectures
Coal Week 1 Lectures
Computer Organization
& Assembly Language
INSTRUCTOR
Quizzes 8%
Assignments 12%
Midterm Exams 30%
Final 50%
• Device handlers
A C++ program, for example, should compile and run on just about
any computer, unless it makes specific references to library functions
that exist under a single operating system.
For writing the compilers or device drivers, write some code in assembly language.
Applications of Assembly Language
Embedded System Programming
The memory storage unit is where instructions and data are held while a computer
program is running.
The storage unit receives requests for data from the CPU, transfers data from random
access memory (RAM) to the CPU, and transfers data from the CPU into memory.
All processing of data takes place within the CPU, so programs residing in memory must be
copied into the CPU before they can execute.
Basic Microcomputer Design
The central processor unit (CPU), where calculations and logic
operations take place, contains a limited number of storage
locations named registers, a high-frequency clock, a control unit,
and an arithmetic logic unit.
The memory storage unit is where instructions and data are held
while a computer program is running.
Basic Microcomputer Design
The storage unit receives requests for data from the CPU, transfers
data from random access memory (RAM) to the CPU, and transfers
data from the CPU into memory.
All processing of data takes place within the CPU, so programs
residing in memory must be copied into the CPU before they can
execute.
Buses
A bus is a group of parallel wires that transfer data from one part of the computer to
another.
A computer system usually contains four bus types: data, I/O, control, and address.
The data bus transfers instructions and data between the CPU and memory.
The I/O bus transfers data between the CPU and the system input/output devices.
The control bus uses binary signals to synchronize actions of all devices attached to the
system bus.
The address bus holds the addresses of instructions and data when the currently executing
instruction transfers data between the CPU and memory.
Clock Cycles
A machine instruction requires at least one clock cycle to execute.
Few require in excess of 50 clocks (the multiply instruction on the 8088 processor, for example).
Instructions requiring memory access often have empty clock cycles called wait states.
Because of the differences in the speeds of the CPU, the system bus, and memory circuits.
Instruction Execution Cycle
Instruction Execution Cycle
The CPU go through a predefined sequence of steps to execute a machine instruction, called
the instruction execution cycle.
The instruction pointer (IP) register holds the address of the instruction we want to execute.
Here are the steps to execute it:
1. First, the CPU has to fetch the instruction from an area of memory called the instruction queue. It then
increments the instruction pointer.
2. Next, the CPU decodes the instruction by looking at its binary bit pattern.
This bit pattern might reveal that the instruction has operands (input values).
3. If operands are involved, the CPU fetches the operands from registers and memory.
Sometimes, this involves address calculations.
4. Next, the CPU executes the instruction, using any operand values it fetched during the earlier step. It
also updates a few status flags, such as Zero, Carry, and Overflow.
5. Finally, if an output operand was part of the instruction, the CPU stores the result of its execution in the
operand.
Instruction Execution Cycle
Instruction Execution Cycle
An operand is a value that is either an input or an output to an operation.
For example, the expression Z = X + Y has two input operands (X and Y) and a single output
operand (Z).
In order to read program instructions from memory, an address is placed on the address
bus.
Next, the memory controller places the requested code on the data bus, making the
code available inside the code cache.
The instruction pointer’s value determines which instruction will be executed next.
The instruction is analyzed by the instruction decoder, causing the appropriate digital
signals to be sent to the control unit, which coordinates the ALU and floating-point unit.
Control bus carries signals that use the system clock to coordinate the transfer of data
between different CPU components.
Reading from Memory
As a rule, computers read memory much more slowly than they access internal registers.
Reading a single value from memory involves four separate steps:
1. Place the address of the value you want to read on the address bus.
2. Assert (change the value of) the processor’s RD (read) pin.
3. Wait one clock cycle for the memory chips to respond.
4. Copy the data from the data bus into the destination operand.
2. Level-2 cache (or secondary cache) is a little bit slower, and attached to the CPU by a high-
speed data bus.
Virtual Machine Concept
Computers are Build with Physical Parts i.e. Hardware
Virtual Machine Concept
SOFTWARES → Makes Computer easy to use.
Virtual Machine Concept
Virtual Machine Concept
Virtual Machine Concept
Virtual Machine Concept
Virtual Machine Concept
A virtual machine (VM) is an image file managed by the hypervisor that exhibits the
behavior of a separate computer, capable of performing tasks such as running
applications and programs like a separate computer.
The virtual machine VM1, can execute commands written in language L1.
The virtual machine VM0 can execute commands written in language L0
Virtual Machine Concept
1
(descriptions of individual levels
follow . . . )
High-Level Language
Level 4
Application-oriented languages
C++, Java, Pascal, Visual Basic . . .
Programs compile into assembly language (Level 3)
Assembly Language
Level 3
Instruction mnemonics that have a one-to-one correspondence to machine language
Programs are translated into Instruction Set Architecture Level - machine language (Level 2)
The instructions in assembly language may directly match the computer’s architecture or they may
be translated during execution by a program inside the processor known as a microcode interpreter.
Instruction Set Architecture (ISA)
Level 2
Also known as conventional machine language.
Executed by Level 1 (Digital Logic).
Digital Logic
Level 1
CPU, constructed from digital logic gates
System bus
Memory
Implemented using bipolar transistors