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Boolean Algebra and Logic Gate

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19 views64 pages

Boolean Algebra and Logic Gate

Uploaded by

Vivaan Sharma
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Digital Logic Design

Chapter 2

Boolean Algebra and Logic Gate

Digital Logic Design


2.2 BASIC DEFINITIONS
 A set is collection of elements having the same property.
◆ S: set, x and y: element or event
◆ For example: S = {1, 2, 3, 4}
» If x = 2, then xS.
» If y = 5, then y S.

 A binary operator defines on a set S of elements is a rule that


assigns, to each pair of elements from S, a unique element from S.
◆ For example: given a set S, consider a*b = c and * is a binary operator.
◆ If (a, b) through * get c and a, b, cS, then * is a binary operator of S.
◆ On the other hand, if * is not a binary operator of S and a, bS, then c  S.

Digital Logic Design


2.1 Algebras
 What is an algebra?
◆ Mathematical system consisting of
» Set of elements (example: N = {1,2,3,4,…})
» Set of operators (+, -, ×, ÷)
» Axioms or postulates (associativity, distributivity, closure, identity
elements, etc.)
 Why is it important?
◆ Defines rules of “calculations”
 Note: operators with two inputs are called binary
◆ Does not mean they are restricted to binary numbers!
◆ Operator(s) with one input are called unary

Digital Logic Design


BASIC DEFINITIONS
 The common postulates used to formulate algebraic structures are:
1. Closure: a set S is closed with respect to a binary operator if, for every
pair of elements of S, the binary operator specifies a rule for obtaining a
unique element of S.
◆ For example, natural numbers N={1,2,3,...} is closed w.r.t. the binary
operator + by the rule of arithmetic addition, since, for any a, bN, there is
a unique cN such that
» a+b = c
» But operator – is not closed for N, because 2-3 = -1 and 2, 3 N, but (-1)N.
2. Associative law: a binary operator * on a set S is said to be associative
whenever
◆ (x * y) * z = x * (y * z) for all x, y, zS
» (x+y)+z = x+(y+z)
3. Commutative law: a binary operator * on a set S is said to be
commutative whenever
◆ x * y = y * x for all x, yS
» x+y = y+x
Digital Logic Design
BASIC DEFINITIONS
4. Identity element: a set S is said to have an identity element with
respect to a binary operation * on S if there exists an element
eS with the property that
◆ e*x=x*e=x for every xS
» 0+x = x+0 =x for every xI I = {…, -3, -2, -1, 0, 1, 2, 3, …}.
» 1×x = x×1 =x for every xI I = {…, -3, -2, -1, 0, 1, 2, 3, …}.
5. Inverse: a set having the identity element e with respect to the
binary operator to have an inverse whenever, for every xS,
there exists an element yS such that
◆ x*y=e
» The operator + over I, with e = 0, the inverse of an element a is (-a), since
a+(-a) = 0.
6. Distributive law: if (*) and (.) are two binary operators on a set
S, (*) is said to be distributive over (.) whenever
◆ x * (y.z) = (x * y).(x * z)
Digital Logic Design
George Boole
 Father of Boolean algebra
 He came up with a type of linguistic algebra, the
three most basic operations of which were (and still
are) AND, OR and NOT. It was these three
functions that formed the basis of his premise, and
were the only operations necessary to perform
comparisons or basic mathematical functions.
 Boole’s system was based on a binary approach,
processing only two objects - the yes-no, true-false,
on-off, zero-one approach. George Boole (1815 - 1864)
 Surprisingly, given his standing in the academic
community, Boole's idea was either criticized or
completely ignored by the majority of his peers.
 Eventually, one bright student, claude shunnon(1916-
2001), picked up the idea and ran with it

Digital Logic Design


2.3 Axiomatic Definition of Boolean Algebra

 We need to define algebra for binary values


◆ Developed by George Boole in 1854

 Huntington postulates (1904) for Boolean algebra :


 B = {0, 1} and two binary operations, (+) and (.)
◆ Closure with respect to operator (+) and operator (.)

◆ Identity element 0 for operator (+) and 1 for operator (.)

◆ Commutativity with respect to (+) and (.)

x+y = y+x, x·y = y·x


◆ Distributivity of (.) over (+), and (+) over (.)

x·(y+z) = (x·y)+(x·z) and x+(y·z) = (x+y)·(x+z)


⚫ Complement for every element x is x’ with x+x’=1, x·x’=0

◆ There are at least two elements x,yB such that xy


Digital Logic Design
Boolean Algebra

 Terminology:
◆ Literal: A variable or its complement

◆ Product term: literals connected by (·)

◆ Sum term: literals connected by (+)

Digital Logic Design


Postulates of Two-Valued Boolean Algebra
 B = {0, 1} and two binary operations, (+) and (.)
 The rules of operations: AND, OR and NOT.
AND OR NOT
x y x.y x y x+y x x’
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1

1. Closure (+ and ‧)
2. The identity elements
(1) 0+0 = 0
(2) 1 ·1 = 1
Digital Logic Design
Postulates of Two-Valued Boolean Algebra
3. The commutative laws x+y = y+x, x.y = y.x
4. The distributive laws

x y z y+z x.(y+z) x.y x.z (x.y)+(x.z)


0 0 0 0 0 0 0 0
0 0 1 1 0 0 0 0
0 1 0 1 0 0 0 0
0 1 1 1 0 0 0 0
1 0 0 0 0 0 0 0
1 0 1 1 1 0 1 1
1 1 0 1 1 1 0 1
1 1 1 1 1 1 1 1

Digital Logic Design


Postulates of Two-Valued Boolean Algebra

5. Complement
◆ x+x'=1 → 0+0'=0+1=1; 1+1'=1+0=1
◆ x.x'=0 → 0.0'=0.1=0; 1.1'=1.0=0

6. Has two distinct elements 1 and 0, with 0 ≠ 1

 Note
◆ A set of two elements

◆ (+) : OR operation; (·) : AND operation


◆ A complement operator: NOT operation

◆ Binary logic is a two-valued Boolean algebra

Digital Logic Design


2.4 Basic Theorems And Properties Of Boolean Algebra
Duality

 The principle of duality is an important concept. This says that


if an expression is valid in Boolean algebra, the dual of that
expression is also valid.
 To form the dual of an expression, replace all (+) operators with
(·) operators, all (·) operators with (+) operators, all ones with
zeros, and all zeros with ones.
 Following the replacement rules…
a(b + c) = ab + ac
 Form the dual of the expression
a + (bc) = (a + b)(a + c)
 Take care not to alter the location of the parentheses if they are
present.

Digital Logic Design


Basic Theorems

Digital Logic Design


Boolean Theorems
 Huntington’s postulates define some rules
Post. 1:
closure
Post. 2:
(a) x+0=x, (b) x·1=x
Post. 3:
(a) x+y=y+x, (b) x·y=y·x
Post. 4:
(a) x(y+z) = xy+xz,
(b) x+yz = (x+y)(x+z)
Post. 5: (a) x+x’=1, (b) x·x’=0
 Need more rules to modify
algebraic expressions
◆ Theorems that are derived from postulates
 What is a theorem?
◆ A formula or statement that is derived from postulates
(or other proven theorems)
 Basic theorems of Boolean algebra
◆ Theorem 1 (a): x + x = x (b): x · x = x
◆ Looks straightforward, but needs to be proven !
Digital Logic Design
Proof of x+x=x
Huntington postulates:
 We can only use
Huntington postulates: Post. 2: (a) x+0=x, (b) x·1=x
Post. 3: (a) x+y=y+x, (b) x·y=y·x
Post. 4: (a) x(y+z) = xy+xz,
(b) x+yz = (x+y)(x+z)
Post. 5: (a) x+x’=1, (b) x·x’=0

 Show that x+x=x.


x+x = (x+x)·1 by 2(b)
= (x+x)(x+x’) by 5(a)
= x+xx’ by 4(b)
= x+0 by 5(b)
=x by 2(a)
Q.E.D.
 We can now use Theorem 1(a) in future proofs

Digital Logic Design


Proof of x·x=x
Huntington postulates:
 Similar to previous
proof Post. 2: (a) x+0=x, (b) x·1=x
Post. 3: (a) x+y=y+x, (b) x·y=y·x
Post. 4: (a) x(y+z) = xy+xz,
(b) x+yz = (x+y)(x+z)
Post. 5: (a) x+x’=1, (b) x·x’=0
Th. 1: (a) x+x=x

 Show that x·x = x.


x·x = xx+0 by 2(a)
= xx+xx’by 5(b)
= x(x+x’) by 4(a)
= x·1 by 5(a)
=x by 2(b)

Digital Logic Design


Proof of x+1=1
 Theorem 2(a): x + 1 = 1 Huntington postulates:
x + 1 = 1.(x + 1) by 2(b)
Post. 2: (a) x+0=x, (b) x·1=x
=(x + x')(x + 1) 5(a) Post. 3: (a) x+y=y+x, (b) x·y=y·x
= x + x' 1 4(b) Post. 4: (a) x(y+z) = xy+xz,
= x + x' 2(b) (b) x+yz = (x+y)(x+z)
Post. 5: (a) x+x’=1, (b) x·x’=0
=1 5(a) Th. 1: (a) x+x=x
 Theorem 2(b): x.0 = 0 by duality
 Theorem 3: (x')' = x
◆ Postulate 5 defines the complement of x, x + x' = 1 and x x' = 0
◆ The complement of x' is x is also (x')'

Digital Logic Design


Absorption Property (Covering)
 Theorem 6(a): x + xy = x Huntington postulates:
◆ x + xy = x.1 + xy by 2(b)
= x (1 + y) 4(a) Post. 2: (a) x+0=x, (b) x·1=x
= x (y + 1) 3(a) Post. 3: (a) x+y=y+x, (b) x·y=y·x
Post. 4: (a) x(y+z) = xy+xz,
= x.1 Th 2(a) (b) x+yz = (x+y)(x+z)
=x 2(b) Post. 5: (a) x+x’=1, (b) x·x’=0
Th. 2: (a) x+1=1
 Theorem 6(b): x (x + y) = x by duality
 By means of truth table (another way to proof )

x y xy x+xy
0 0 0 0
0 1 0 0
1 0 0 1
1 1 1 1
Digital Logic Design
DeMorgan’s Theorem
 Theorem 5(a): (x + y)’ = x’y’
 Theorem 5(b): (xy)’ = x’ + y’
 By means of truth table

x y x’ y’ x+y (x+y)’ x’y’ xy x’+y' (xy)’

0 0 1 1 0 1 1 0 1 1
0 1 1 0 1 0 0 0 1 1
1 0 0 1 1 0 0 0 1 1
1 1 0 0 1 0 0 1 0 0

Digital Logic Design


An easy way to remember De Morgan's rules is that each term is
complemented, and
then the ORs become ANDs, and the ANDs become ORs.

Digital Logic Design


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Consensus Theorem

1. xy + x’z + yz = xy + x’z
2. (x+y)•(x’+z)•(y+z) = (x+y)•(x’+z) -- (dual)
 Proof:
◆ xy + x’z + yz
» = xy + x’z + 1.yz 2(a)
» = xy + x’z + (x+x’)yz 5(a)
» = xy + x’z + xyz + x’yz 3(b) &4(a)
» = (xy + xyz) + (x’z + x’zy) Th4(a)
» = x(y + yz) + x’ (z + zy) 4(a)
» = xy + x’z Th6(a)
» Hence the proof (2 true by duality).
Digital Logic Design
Operator Precedence

 The operator precedence for evaluating Boolean


Expression is
◆ Parentheses
◆ NOT

◆ AND

◆ OR

 Examples
◆ x y' + z

◆ (x y + z)'

Digital Logic Design


2.5 Boolean Functions
 A Boolean function
◆ Binary variables

◆ Binary operators OR and AND

◆ Unary operator NOT

◆ Parentheses

 Examples
◆ F1= x y z'

◆ F2 = x + y'z

◆ F3 = x' y' z + x' y z + x y'

◆ F4 = x y' + x' z

Digital Logic Design


Boolean Functions
 The truth table of 2n entries (n=number of variables)

x y z F1 F2 F3 F4
0 0 0 0 0 0 0
0 0 1 0 1 1 1
0 1 0 0 0 0 0
0 1 1 0 0 1 1
1 0 0 0 1 1 1
1 0 1 0 1 1 1
1 1 0 1 1 0 0
1 1 1 0 1 0 0
 Two Boolean expressions may specify the same function
◆ F3 = F4

Digital Logic Design


Boolean Functions
Implementation with logic gates
◆ F4 is more economical

F2 = x + y'z

F3 = x' y' z + x' y z + x y'

F4 = x y' + x' z

Digital Logic Design


Algebraic Manipulation
 When a Boolean expression is implemented with logic gates, each
term requires a gate and each variable (Literal) within the term
designates an input to the gate. (F3 has 3 terms and 8 literal)
 To minimize Boolean expressions, minimize the number of
literals and the number of terms → a circuit with less equipment
◆ It is a hard problem (no specific rules to follow)

 Example 2.1
1. x(x'+y) = xx' + xy = 0+xy = xy
2. x+x'y = (x+x')(x+y) = 1 (x+y) = x+y
3. (x+y)(x+y') = x+xy+xy'+yy' = x(1+y+y') = x
4. xy + x'z + yz = xy + x'z + yz(x+x') = xy + x'z + yzx + yzx' = xy(1+z) +
x'z(1+y) = xy +x'z
5. (x+y)(x'+z)(y+z) = (x+y)(x'+z), by duality from function 4. (consensus
theorem with duality)
Digital Logic Design
Complement of a Function
 An interchange of 0's for 1's and 1's for 0's in the value of
F
◆ By DeMorgan's theorem
◆ (A+B+C)' = (A+X)' let B+C = X
= A'X' by theorem 5(a) (DeMorgan's)
= A'(B+C)' substitute B+C = X
= A'(B'C') by theorem 5(a)
(DeMorgan's)
= A'B'C' by theorem 4(b) (associative)
 Generalization: a function is obtained by interchanging
AND and OR operators and complementing each literal.
◆ (A+B+C+D+ ... +F)' = A'B'C'D'... F'
◆ (ABCD ... F)' = A'+ B'+C'+D' ... +F' Digital Logic Design
Examples
 Example 2.2
◆ F1' = (x'yz' + x'y'z)' = (x'yz')' (x'y'z)' = (x+y'+z) (x+y+z')
◆ F2' = [x(y'z'+yz)]' = x' + (y'z'+yz)' = x' + (y'z')' (yz)‘
= x' + (y+z) (y'+z')
= x' + yz‘+y'z
 Example 2.3: a simpler procedure
◆ Take the dual of the function and complement each literal
1. F1 = x'yz' + x'y'z.
The dual of F1 is (x'+y+z') (x'+y'+z).
Complement each literal: (x+y'+z)(x+y+z') = F1'
2. F2 = x(y' z' + yz).
The dual of F2 is x+(y'+z') (y+z).
Complement each literal: x'+(y+z)(y' +z') = F2'

Digital Logic Design


2.6 Canonical and Standard Forms
Minterms and Maxterms
 A minterm (standard product): an AND term consists of
all literals in their normal form or in their complement
form.
◆ For example, two binary variables x and y,
» xy, xy', x'y, x'y'
◆ It is also called a standard product.
n
◆ n variables can be combined to form 2 minterms.

 A maxterm (standard sums): an OR term


◆ It is also call a standard sum.
n
◆ 2 maxterms.

Digital Logic Design


Minterms and Maxterms
 Each maxterm is the complement of its corresponding
minterm, and vice versa.

Digital Logic Design


Minterms and Maxterms
 An Boolean function can be expressed by
◆ A truth table

◆ Sum of minterms for each combination of variables that


produces a (1) in the function.
◆ f1 = x'y'z + xy'z' + xyz = m1 + m4 +m7 (Minterms)

◆ f2 = x'yz+ xy'z + xyz'+xyz = m3 + m5 +m6 + m7 (Minterms)

Digital Logic Design


Minterms and Maxterms
 The complement of a Boolean function
◆ The minterms that produce a 0

◆ f1' = m0 + m2 +m3 + m5 + m6 = x'y'z'+x'yz'+x'yz+xy'z+xyz'


◆ f1 = (f1')'

◆ = (x+y+z)(x+y'+z) (x+y'+z') (x'+y+z')(x'+y'+z) = M0 M2 M3


M5 M6
◆ f2 = (x+y+z)(x+y+z')(x+y'+z)(x'+y+z)=M0M1M2M4

◆ Any Boolean function can be expressed asterms).


◆ A product of maxterms (“product” meaning the ANDing of
terms).

◆ A sum of minterms (“sum” meaning the ORing of Both


boolean functions are said to be in Canonical Digital
form.Logic Design
Sum of Minterms
 Sum of minterms: there are 2n minterms and 22n combinations of
functions with n Boolean variables.
 Example 2.4: express F = A+B’C as a sum of minterms.
◆ F = A+B'C = A (B+B') + B'C = AB +AB' + B'C = AB(C+C') + AB'(C+C')
+ (A+A')B'C = ABC+ABC'+AB'C+AB'C'+A'B'C
◆ F = A'B'C +AB'C' +AB'C+ABC'+ ABC = m1 + m4 +m5 + m6 + m7
◆ F(A, B, C) = S(1, 4, 5, 6, 7)
◆ or, built the truth table first

Digital Logic Design


Product of Maxterms
 Product of maxterms: using distributive law to expand.
◆ x + yz = (x + y)(x + z) = (x+y+zz')(x+z+yy') =
(x+y+z)(x+y+z')(x+y'+z)
 Example 2.5: express F = xy + x'z as a product of
maxterms.
◆ F = xy + x'z = (xy + x')(xy +z) = (x+x')(y+x')(x+z)(y+z) =
(x'+y)(x+z)(y+z)
◆ x'+y = x' + y + zz' = (x'+y+z)(x'+y+z')
◆ F = (x+y+z)(x+y'+z)(x'+y+z)(x'+y+z') = M0M2M4M5
◆ F(x, y, z) = P(0, 2, 4, 5)

Digital Logic Design


Conversion between Canonical Forms
 The complement of a function expressed as the sum of minterms
equals the sum of minterms missing from the original function.
◆ F(A, B, C) = S(1, 4, 5, 6, 7)

◆ Thus, F‘ (A, B, C) = S(0, 2, 3)

◆ By DeMorgan's theorem

F(A, B, C) = P(0, 2, 3)
F'(A, B, C) =P (1, 4, 5, 6, 7)
◆ mj' = Mj

 To convert from one canonical form to another: interchange the


symbols S and P and list those numbers missing from the
original form
» S of 1's
» P of 0's
Digital Logic Design
 Example
◆ F = xy + xz

◆ F(x, y, z) = S(1, 3, 6, 7)

◆ F(x, y, z) = P (0, 2, 4, 6)

Digital Logic Design


Standard Forms
 In canonical forms each minterm or maxterm must contain all
the variables either complemented or uncomplemented, thus
these forms are very seldom the ones with the least number of
literals.
 Standard forms: the terms that form the function may obtain
one, two, or any number of literals, .There are two types of
standard forms:
◆ Sum of products: F1 = y' + xy+ x'yz'
◆ Product of sums: F2 = x(y'+z)(x'+y+z')
 A Boolean function may be expressed in a nonstandard form
◆ F3 = AB + C(D + E)
 But it can be changed to a standard form by using The
. .

distributive law
◆ F3 = AB + C(D + E) = AB + CD + CE
Digital Logic Design
Implementation
 Two-level implementation

F1 = y' + xy+ x'yz' F2 = x(y'+z)(x'+y+z')

 Multi-level implementation

Digital Logic Design


2.7 Other Logic Operations
 2n rows in the truth table of n binary variables.
n
 2 2
functions for n binary variables.
 16 functions of two binary variables.

 All the new symbols except for the exclusive-OR symbol are
not in common use by digital designers.

Digital Logic Design


Boolean Expressions

Digital Logic Design


2.8 Digital Logic Gates

 Boolean expression: AND, OR and NOT operations


 Constructing gates of other logic operations
◆ The feasibility and economy;
◆ The possibility of extending gate's inputs;

◆ The basic properties of the binary operations


(commutative and associative);
◆ The ability of the gate to implement Boolean functions.

Digital Logic Design


Standard Gates

 Consider the 16 functions in Table 2.8


◆ Two functions produce a constant : (F0 and F15).

◆ Four functions with unary operations: complement and


transfer: (F3, F5, F10 and F12).
◆ The other ten functions with binary operators

 Eight function are used as standard gates :


complement (F12), transfer (F3), AND (F1), OR (F7),
NAND (F14), NOR (F8), XOR (F6), and equivalence
(XNOR) (F9).
◆ Complement: inverter.
◆ Transfer: buffer (increasing drive strength).

◆ Equivalence: XNOR.
Digital Logic Design
Summary of Logic Gates

Figure 2.5 Digital logic gates Digital Logic Design


Summary of Logic Gates

Figure 2.5 Digital logic gates


Digital Logic Design
Multiple Inputs
 Extension to multiple inputs
◆ A gate can be extended to multiple inputs.
» If its binary operation is commutative and associative.
◆ AND and OR are commutative and associative.
» OR
− x+y = y+x
− (x+y)+z = x+(y+z) = x+y+z
» AND
− xy = yx
− (x y)z = x(y z) = x y z

Digital Logic Design


Multiple Inputs
 Multiple NOR = a complement of OR gate, Multiple NAND
= a complement of AND.
 The cascaded NAND operations = sum of products.
 The cascaded NOR operations = product of sums.

Figure 2.7 Multiple-input and cascated NOR and


NAND gates Digital Logic Design
Multiple Inputs
 The XOR and XNOR gates are commutative and associative.
 Multiple-input XOR gates are uncommon?
 XOR is an odd function: it is equal to 1 if the inputs variables
have an odd number of 1's.

Figure 2.8 3-input XOR gate


Digital Logic Design
Positive and Negative Logic

 Positive and Negative Logic


◆ Two signal values <=> two
logic values
◆ Positive logic: H=1; L=0

◆ Negative logic: H=0; L=1

 Consider a TTL gates


◆ A positive logic AND gate

◆ A negative logic OR gate

Figure 2.9 Signal assignment and logic polarity


Digital Logic Design
Positive and Negative Logic

Figure 2.10 Demonstration of positive and negative logic


Digital Logic Design
2.9 Integrated Circuits
Level of Integration
 An IC (a chip)
 Examples:
◆ Small-scale Integration (SSI): < 10 gates
◆ Medium-scale Integration (MSI): 10 ~ 100 gates
◆ Large-scale Integration (LSI): 100 ~ xk gates
◆ Very Large-scale Integration (VLSI): > xk gates

 VLSI
◆ Small size (compact size)
◆ Low cost
◆ Low power consumption
◆ High reliability
◆ High speed
Digital Logic Design
Digital Logic Families

 Digital logic families: circuit technology


◆ TTL: transistor-transistor logic

◆ ECL: emitter-coupled logic (high speed, high power


consumption)
◆ MOS: metal-oxide semiconductor (NMOS, high density)

◆ CMOS: complementary MOS (low power)

◆ BiCMOS: high speed, high density

Digital Logic Design


Digital Logic Families

 The characteristics of digital logic families


◆ Fan-out: the number of standard loads that the output of a
typical gate can drive.
◆ Power dissipation.

◆ Propagation delay: the average transition delay time for


the signal to propagate from input to output.
◆ Noise margin: the minimum of external noise voltage that
caused an undesirable change in the circuit output.

Digital Logic Design


CAD

 CAD – Computer-Aided Design


◆ Software programs that support computer-based
representation of circuits of millions of gates.
◆ Automate the design process

◆ Two design entry:


» Schematic capture
» HDL – Hardware Description Language
− Verilog, VHDL
◆ Simulation

◆ Physical realization

Digital Logic Design

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