Boolean Algebra and Logic Gate
Boolean Algebra and Logic Gate
Chapter 2
Terminology:
◆ Literal: A variable or its complement
1. Closure (+ and ‧)
2. The identity elements
(1) 0+0 = 0
(2) 1 ·1 = 1
Digital Logic Design
Postulates of Two-Valued Boolean Algebra
3. The commutative laws x+y = y+x, x.y = y.x
4. The distributive laws
5. Complement
◆ x+x'=1 → 0+0'=0+1=1; 1+1'=1+0=1
◆ x.x'=0 → 0.0'=0.1=0; 1.1'=1.0=0
Note
◆ A set of two elements
x y xy x+xy
0 0 0 0
0 1 0 0
1 0 0 1
1 1 1 1
Digital Logic Design
DeMorgan’s Theorem
Theorem 5(a): (x + y)’ = x’y’
Theorem 5(b): (xy)’ = x’ + y’
By means of truth table
0 0 1 1 0 1 1 0 1 1
0 1 1 0 1 0 0 0 1 1
1 0 0 1 1 0 0 0 1 1
1 1 0 0 1 0 0 1 0 0
1. xy + x’z + yz = xy + x’z
2. (x+y)•(x’+z)•(y+z) = (x+y)•(x’+z) -- (dual)
Proof:
◆ xy + x’z + yz
» = xy + x’z + 1.yz 2(a)
» = xy + x’z + (x+x’)yz 5(a)
» = xy + x’z + xyz + x’yz 3(b) &4(a)
» = (xy + xyz) + (x’z + x’zy) Th4(a)
» = x(y + yz) + x’ (z + zy) 4(a)
» = xy + x’z Th6(a)
» Hence the proof (2 true by duality).
Digital Logic Design
Operator Precedence
◆ AND
◆ OR
Examples
◆ x y' + z
◆ (x y + z)'
◆ Parentheses
Examples
◆ F1= x y z'
◆ F2 = x + y'z
◆ F4 = x y' + x' z
x y z F1 F2 F3 F4
0 0 0 0 0 0 0
0 0 1 0 1 1 1
0 1 0 0 0 0 0
0 1 1 0 0 1 1
1 0 0 0 1 1 1
1 0 1 0 1 1 1
1 1 0 1 1 0 0
1 1 1 0 1 0 0
Two Boolean expressions may specify the same function
◆ F3 = F4
F2 = x + y'z
F4 = x y' + x' z
Example 2.1
1. x(x'+y) = xx' + xy = 0+xy = xy
2. x+x'y = (x+x')(x+y) = 1 (x+y) = x+y
3. (x+y)(x+y') = x+xy+xy'+yy' = x(1+y+y') = x
4. xy + x'z + yz = xy + x'z + yz(x+x') = xy + x'z + yzx + yzx' = xy(1+z) +
x'z(1+y) = xy +x'z
5. (x+y)(x'+z)(y+z) = (x+y)(x'+z), by duality from function 4. (consensus
theorem with duality)
Digital Logic Design
Complement of a Function
An interchange of 0's for 1's and 1's for 0's in the value of
F
◆ By DeMorgan's theorem
◆ (A+B+C)' = (A+X)' let B+C = X
= A'X' by theorem 5(a) (DeMorgan's)
= A'(B+C)' substitute B+C = X
= A'(B'C') by theorem 5(a)
(DeMorgan's)
= A'B'C' by theorem 4(b) (associative)
Generalization: a function is obtained by interchanging
AND and OR operators and complementing each literal.
◆ (A+B+C+D+ ... +F)' = A'B'C'D'... F'
◆ (ABCD ... F)' = A'+ B'+C'+D' ... +F' Digital Logic Design
Examples
Example 2.2
◆ F1' = (x'yz' + x'y'z)' = (x'yz')' (x'y'z)' = (x+y'+z) (x+y+z')
◆ F2' = [x(y'z'+yz)]' = x' + (y'z'+yz)' = x' + (y'z')' (yz)‘
= x' + (y+z) (y'+z')
= x' + yz‘+y'z
Example 2.3: a simpler procedure
◆ Take the dual of the function and complement each literal
1. F1 = x'yz' + x'y'z.
The dual of F1 is (x'+y+z') (x'+y'+z).
Complement each literal: (x+y'+z)(x+y+z') = F1'
2. F2 = x(y' z' + yz).
The dual of F2 is x+(y'+z') (y+z).
Complement each literal: x'+(y+z)(y' +z') = F2'
◆ By DeMorgan's theorem
F(A, B, C) = P(0, 2, 3)
F'(A, B, C) =P (1, 4, 5, 6, 7)
◆ mj' = Mj
◆ F(x, y, z) = S(1, 3, 6, 7)
◆ F(x, y, z) = P (0, 2, 4, 6)
distributive law
◆ F3 = AB + C(D + E) = AB + CD + CE
Digital Logic Design
Implementation
Two-level implementation
Multi-level implementation
All the new symbols except for the exclusive-OR symbol are
not in common use by digital designers.
◆ Equivalence: XNOR.
Digital Logic Design
Summary of Logic Gates
VLSI
◆ Small size (compact size)
◆ Low cost
◆ Low power consumption
◆ High reliability
◆ High speed
Digital Logic Design
Digital Logic Families
◆ Physical realization