Unit-1

Difference between Computer Architecture and Computer Organization.

Functional Units of Digital Computer / Von Neumann’s Architecture / Block

Diagram of Digital Computer
The components of a computer built on Von Neumann Architecture include:
1. Input — an input signal comes from an input device such as a keyboard etc.
2. Output — and output signal generated after processing a command from CPU. They
are output by devices such as to monitor etc.
3. Central Processing Unit — holds ALU (Arithmetic Logic Unit), CU (Control unit),
and registers.
4. Control unit — controls the operations of ALU, memory unit, Input/Output.
5. ALU — perform arithmetic operations such as addition and substation.
6. Memory Unit — it is partitioned and contains an address with its content. It stores
commands
7. Registers — the tiny block in CPU made up of high-speed memory cells which store
data to be processed, and perform all logical, arithmetic, and shift operations.
8. Buses — the parallel wire sets which connect two or more components inside the CPU.

The Basic Process of a computer built in Von Neumann Architecture

 The input comes in and is stored in the memory (RAM).
 The input becomes the command and ready to be processed.
 The CU in the CPU fetches the command from the memory and checks which
operations to be performed.
 The fetched command is processed by CU and ALU in the CPU.
 After processing completes, the control unit stores the result in memory again.
 Finally, the output is displayed via an output device.
 Interconnection of the digital computer.

A computer consists of input unit that takes input, a CPU that processes the input and an output
unit that produces output. All these devices communicate with each other through a common
bus.
A bus is a transmission path, made of a set of conducting wires over which data or information
in the form of electric signals, is passed from one component to another in a computer.
The bus can be of three types – Address bus, Data bus and Control Bus.

 The Address Bus carries the address of data (but not the data) between the processor
and the memory.
 The Data Bus carries data between the processor, the memory unit and the input/output
devices.
 The Control Bus carries signals/commands from the CPU.
The system bus is the common communication path that carries signals to/from CPU, main
memory and input/output devices. The input/output devices communicate with the system bus
through the controller circuit which helps in managing various input/output devices attached
to the computer.

Registers and Types of Registers

o A Register is a fast memory used to accept, store, and transfer data and instructions that
are being used immediately by the CPU.
o A Register can also be considered as a group of flip-flops with each flip-flop capable
of storing one bit of information.
 o Computer registers are small storage areas inside the CPU.

o They hold data temporarily while the CPU processes instructions.

o Registers help the CPU work faster by providing quick access to important information
needed for calculations and operations.

The following are the various computer registers and their functions:

 Accumulator Register(AC)
Accumulator Register is a general-purpose Register. The initial data to be processed,
the intermediate result, and the final result of the processing operation are all stored in
this register. If no specific address for the result operation is specified, the result of
arithmetic operations is transferred to AC. The number of bits in the accumulator
register equals the number of bits per word

 Address Register(AR)
The Address Register is the address of the memory location or Register where data is
stored or retrieved. The size of the Address Register is equal to the width of the memory
address is directly related to the size of the memory because it contains an address. If
the memory has a size of 2n * m, then the address is specified using n bits

 Data Register(DR)
The operand is stored in the Data Register from memory. When a direct or indirect
addressing operand is found, it is placed in the Data Register. This value was then used
as data by the processor during its operation. It's about the same size as a word in
memory
  Instruction Register(IR)
The instruction is stored in the Instruction Register. The instruction register contains
the currently executed instruction. Because it includes instructions, the number of bits
in the Instruction Register equals the number of bits in the instruction, which is n bits
for an n-bit CPU

 Input Register(INPR)
Input Register is a register that stores the data from an input device. The computer's
alphanumeric code determines the size of the input register

 Program Counter(PC)
The Program Counter serves as a pointer to the memory location where the next
instruction is stored. The size of the PC is equal to the width of the memory address,
and the number of bits in the PC is equal to the number of bits in the PC

 Temporary Register(TR)
The Temporary Register is used to hold data while it is being processed. As Temporary
Register stores data, the number of bits it contains is the same as the number of bits in
the data word

 Output Register(OUTR)
The data that needs to be sent to an output device is stored in the Output Register. Its
size is determined by the alphanumeric code used by the computer

Instruction
Computer instructions are a set of machine language instructions that a particular processor
understands and executes. A computer performs tasks on the basis of the instruction provided.
An instruction comprises of groups called fields. These fields include:
o The Operation code (Opcode) field which specifies the operation to be performed.
o The Address field which contains the location of the operand, i.e., register or memory
location.
o The Mode field which specifies how the operand will be located.
A basic computer has three instruction code formats which are:
1. Memory - reference instruction

2. Register - reference instruction

3. Input-Output instruction

Memory - reference instruction

In Memory-reference instruction, 12 bits of memory is used to specify an address and one bit
to specify the addressing mode 'I'.

Register - reference instruction

The Register-reference instructions are represented by the Opcode 111 with a 0 in the leftmost
bit (bit 15) of the instruction.
Note: The Operation code (Opcode) of an instruction refers to a group of bits that define
arithmetic and logic operations such as add, subtract, multiply, shift, and compliment.
A Register-reference instruction specifies an operation on or a test of the AC (Accumulator)
register.

Input-Output instruction

Just like the Register-reference instruction, an Input-Output instruction does not need a
reference to memory and is recognized by the operation code 111 with a 1 in the leftmost bit
of the instruction. The remaining 12 bits are used to specify the type of the input-output
operation or test performed.
 Instruction Code

• An instruction code is a group of bits that instruct the computer to perform a specific
operation.
• The operation code of an instruction is a group of bits that define operations such as addition,
subtraction, shift, complement, etc.
• An instruction must also include one or more operands, which indicate the registers and/or
memory addresses from which data is taken or to which data is deposited.

Instruction Format / Types of Instruction fields

An instruction format defines the layout of the bits of an instruction, in terms of its
constituent parts.
The bits of an instruction are divided into groups called fields. The most common fields
found in instruction formats are:
 An operation code field that specifies the operation to be performed.
 An address field that designates a memory address or a processor register.
 A mode field that specifies the way the operand or the effective address is determined

There are mainly four types of instruction formats:

 Three address instructions
 Two address instructions
 One address instruction
 Zero address instruction
Three address instructions

Computers with three address instructions formats can use each address field to specify either
a processor register or a memory operand.
The program in assembly language that evaluates X= (A+B)*(C+D) is shown below, together
with comments that explain the register transfer operation of each instruction.

Add R1, A, B R1M [A] + M [B]

Add R2, C, D R2M [C] + M [D]
Mul X, R1,R2 M [X]R1 + R2

It is assumed that the computer has two processor registers, R1 and R2. The symbol M[A]
denotes the operand at memory address symbolized by A.
The advantage of the three-address format is that it results in short programs when evaluating
arithmetic expressions.
The disadvantage is that the binary coded instructions require too many bits to specify three
addresses.

Two address instructions

Two address instructions are the most common in commercial computers. Here again each
address field can specify either a processor register or a memory word. The program to evaluate
X= (A+B)*(C+D) is as follows:

The MOV instruction moves or transfers the operands to and from memory and processor
registers. The first symbol listed in an instruction is assumed to be both a source and the
destination where the result of the operation is transferred.

One address instruction

One address instruction use an implied accumulator (AC) register for all data manipulation.
For multiplication and division there is a need for a second register.
However, here we will neglect the second register and assume that the AC contains the result
of all operations.
The program to evaluate X= (A+B)*(C+D) is

All operations are done between the AC register and a memory operand. T is the address of a
temporary memory location required for storing the intermediate result. Commercially
available computers also use this type of instruction format.

Zero address instructions

A stack organized computer does not use an address field for the instructions ADD and MUL.
The PUSH and POP instructions, however, need an address field to specify the operand that
communicates with the stack.
The following program shows how X=(A+B)*(C+D) will be written for a stack organized
computer.(TOS stands for top of stack.)
To evaluate arithmetic expressions in a stack computer, it is necessary to convert the expression
into reverse polish notation. The name “zero address” is given to this type of computer because
of the absence of an address field in computational instructions.

Difference between Direct and Indirect Addressing Mode

S.
Direct Addressing Mode Indirect Addressing Mode
No.

In this mode, the address field contains the In this mode, the address field contains
1.
effective address of the operand. the effective address of the operand.

This addressing mode requires one memory

2. It requires two memory references.
reference only.

It is slower in comparison to direct

3. It is a quick addressing mode.
addressing mode

It can be further classified into two

4. There is no further classification in this mode.
categories.

It requires further calculation to

There are no further calculations required to
5. determine the effective address of the
perform the operation in this addressing mode.
operand.
 Types of Instructions

 Memory-reference Instructions
a) First 12 bits (0-11) specify an address.
b) 3 bits of opcode are used to specify the types of instruction.
c) Value of opcode ranges from 000 to 110.
d) If I=0, it is direct addressing mode.
If I=1, it is indirect addressing mode.

 Register Reference Instructions

a) First 12 bits (0-11) specify the register operation.
b) The next three bits equals to 111 specify opcode.
c)The last mode bit of the instruction is 0 for register reference instruction.
d)Therefore, left most 4 bits are always 0111 which is equal to hexadecimal 7.

 Input / Output Instruction

a) First 12 bits (0-11) specify the I/O operation.
b) The next three bits equals to 111 specify opcode.
c) The last mode bit of the instruction is 1.
d) Therefore, left most 4 bits are always 1111 which is equal to hexadecimal F.
 Timing and Control Unit

The timings for all the registers are controlled a master clock generator.
 Its pulses are applied to all flip-flops and registers, including in the control unit.
 The control signals are generated in the control unit and provide control inputs for the
bus’s multiplexers and for the processor registers and provides microoperations for the
accumulator.
There are two types of control:
Hardwired – control logic is implemented with gates, flip-flops, decoders and other digital
circuits.
Microprogrammed – control information is stored in a control program, which is programmed
to perform the necessary steps to implement instructions.

Difference between Hardwired and Micro programmed Control Unit

Hardwired Control Micro

programmed Control

This Technology is circuit- This Technology is software-

based. based.

It is implemented through Micro-instructions generate

flip-flops, gates, decoders, signals, and then these
etc. signals control the execution
of instructions.

All the Instructions are Instructions are not register-

register-based. based.

ROM is not used in this ROM is used in this

Technology. Technology.

This is used in RISC. This is used in CISC.

Difficult to modify. Easily modified.

 Fixed instruction format. Variable instruction format
(16, 32,64 bits per
instruction).

The chip area is less. The chip area is large.

Block Diagram of Control Unit/ Hardwired Control Unit-

The basic components of hardwired control units are
 2 decoders, one is 3×8, and the other is 4×16.
 One sequential counter
 One control logic gate
 and one Instruction Register
The block diagram of a Hardwired Control organization is shown below-

 A Hardwired Control contains two decoders, one Instruction Register, one sequence
counter, and control logic gates.
  Fetched instructions from the memory are placed in the instruction register (IR).
 An instruction register contains three fields: Operand (0-11 bits), Opcode (12-14
bits), and Mode (15 bits).
 The operand provides the operand or address of the operand and is directly connected
with control logic gates.
 The operation code (Opcode) bits are connected with a 3 x 8 decoder. The outputs of
the decoder are denoted by the symbols D0 through D7.
 Mode Bit 15 represents the addressing modes and is directly connected with control
logic gates.
 The Sequence counter (SC) can count from 0 through 15 in binary and is connected
with a 4×16 decoder.
 As the 15th bit is 1. So, it represents an indirect addressing mode.
 12,13,14 bits of opcode are 001, which represents ADD operation. D1 also denotes the
ADD operation.
 0 to 11 bits are 010001010111, which represents the address of the operand.
 Suppose this instruction is executed at Time T2. Then, it can symbolically represent
D1T2, and SC becomes zero.
 This instruction means that the ADD operation is applied to the address
(010001010111) of memory.

Timing cycle
Let’s explain the time cycle at point D3T4: SC←0

Disadvantages
 Increasing the control unit’s size complicates the control unit’s organization.
 If a bit of change or modification is required in control units, then it causes the
modification of the entire control unit, which is problematic.
 Instruction Cycle

An instruction cycle, also known as fetch-decode-execute cycle is the basic operational

process of a computer. This process is repeated continuously by CPU from boot up to shut
down of computer.

Following are the steps that occur during an instruction cycle:

1. Fetch the Instruction

The instruction is fetched from memory address that is stored in PC(Program Counter) and
stored in the instruction register IR. At the end of the fetch operation, PC is incremented by
1 and it then points to the next instruction to be executed.

2. Decode the Instruction

The instruction in the IR is executed by the decoder.

3. Read the Effective Address

If the instruction has an indirect address, the effective address is read from the memory.
Otherwise, operands are directly read in case of immediate operand instruction.

4. Execute the Instruction

The Control Unit passes the information in the form of control signals to the functional unit
of CPU. The result generated is stored in main memory or sent to an output device.

The cycle is then repeated by fetching the next instruction. Thus in this way the instruction
cycle is repeated continuously.
 A program residing in the memory unit of the computer consists of a sequence of
instructions. The program is executed in the computer by going through a cycle for each
instruction. Each instruction cycle in turn is subdivided into a sequence of sub cycles
or phases.
 In the basic computer each instruction cycle consists of the following phases:
1. Fetch an instruction from memory.
2. Decode the instruction.
3. Read the effective address from memory if the instruction has an indirect
address.
4. Execute the instruction.

 Upon the completion of step 4, the control goes back to step 1 to fetch, decode, and
execute the next instruction. This process continues indefinitely unless a HALT
instruction is encountered.
 Fetch and Decode
 Initially, the program counter PC is loaded with the address of the first instruction in
the program.
 The sequence counter SC is cleared to 0, providing a decoded timing signal T0. After
each clock pulse, SC is incremented by one, so that the timing signals go through a
sequence T0, T1, T2, and so on.
 The microoperations for the fetch and decode phases can be specified by the following
register transfer statements.
T0: AR ← PC
T1: IR ← M[AR], PC ← PC + 1
T2: D0, .... , D7 ← Decode IR(12-14), AR ← IR(0-11), I ← IR(15)

 Since only AR is connected to the address inputs of memory, it is necessary to transfer

the address from PC to AR during the clock transition associated with timing signal T0.
The instruction read from memory is then placed in the instruction register IR with the
clock transition associated with timing signal T1.
 At the same time, PC is incremented by one to prepare it for the address of the next
instruction in the program. At time T2, the operation code in IR is decoded, the indirect
bit is transferred to flip-flop I, and the address part of the instruction is transferred to
AR .
 Note that SC is incremented after each clock pulse to produce the sequence T0, T1,
and T2

Memory-Reference Instructions
 AND: This instruction performs the ‘AND’ logical operation between the
accumulator’s contents and the content that resides in the memory address specified
by the instruction. The final result of the operation is stored in the accumulator.
 ADD: This instruction adds the content stored in the accumulator with the content
stored in the address mentioned in the instruction and stores the result in the
accumulator.
 LDA: This instruction stores the operand from a memory location in the accumulator.
 STA: This instruction stores the accumulator’s content in the address specified by the
instruction.
 BUN (Branch Unconditionally): This instruction mentions the address of an
instruction that is to be executed out of sequence.
 BSA: The ‘Branch and Save Return Address’ (BSA) instruction transfers the
execution of a program to another portion (a subroutine) which is to be executed out
of sequence.

 ISZ: This instruction increases the value of the effective address by 1. If the value
after incrementation is equal to zero, the value of the program counter increments by
1. Its full form is Increment and skip if zero.
 Micro-operations
The operations executed on data stored in registers are called Micro-operations.
An elementary operation performed in information stored in register(s).
Ex: shift, count, clear, increment, load etc.

Types of Micro-operations
 Register Transfer Micro-operations: Transfer binary information from one register to
another.
 Arithmetic Micro-operations: Perform arithmetic operation on numeric data stored in
registers.
 Logical Micro-operations: Perform bit manipulation operations on data stored in
registers.
 Shift Micro-operations: Perform shift operations on data stored in registers.

Shift Micro-operations
Shift micro-operations are those micro-operations that are used for the serial transfer of
information.
These are also used in conjunction with arithmetic micro-operation, logic micro-operation,
and other data-processing operations. There are three types of shift micro-operations: 1.
1. Logical Shift:
It transfers the 0 zero through the serial input. We use the symbols ‘<<‘ for the logical left
shift and ‘>>‘ for the logical right shift.
a) Logical Left Shift:
In this shift, one position moves each bit to the left one by one. The Empty least significant
bit (LSB) is filled with zero (i.e, the serial input), and the most significant bit (MSB) is
rejected.
The left shift operator is denoted by the double left arrow key (<<). The general syntax for
the left shift is shift-expression << k.
Note: Every time we shift a number towards the left by 1 bit it multiplies that number by 2.
b) Logical Right Shift
In this shift, each bit moves to the right one by one and the least significant bit(LSB) is rejected
and the empty MSB is filled with zero.
The right shift operator is denoted by the double right arrow key (>>). The general syntax for
the right shift is “shift-expression >> k”.

Note: Every time we shift a number towards the right by 1 bit it divides that number by 2.
2. Arithmetic Shift:
The arithmetic shift micro-operation moves the signed binary number either to the left or to the
right position.
Following are the two ways to perform the arithmetic shift.
a) Arithmetic Left Shift:
In this shift, each bit is moved to the left one by one. The empty least significant bit (LSB) is
filled with zero and the most significant bit (MSB) is rejected. Same as the Left Logical Shift.

b) Arithmetic Right Shift:

In this shift, each bit is moved to the right one by one and the least significant(LSB) bit is
rejected and the empty most significant bit(MSB) is filled with the value of the previous MSB.
3. Circular Shift:
The circular shift circulates the bits in the sequence of the register around both ends without
any loss of information.
Following are the two ways to perform the circular shift.
a) Circular Left Shift:
In this micro shift operation each bit in the register is shifted to the left one by one. After
shifting, the LSB becomes empty, so the value of the MSB is filled in there.

b) Circular Right Shift:

In this micro shift operation each bit in the register is shifted to the right one by one. After
shifting, the MSB becomes empty, so the value of the LSB is filled in there.