FPGA and GSM Technology Based Wireless M
FPGA and GSM Technology Based Wireless M
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All Rights Reserved © 2020 IJARECE
ISSN: 2278 – 909X
International Journal of Advanced Research in Electronics and Communication Engineering (IJARECE)
Volume 9, Issue 4, April 2020
MSP430 microcontroller by creating a prototype system using III. BLOCK DIAGRAM
an nRF24L01 wireless module; together with devoted software Fig. 1 depicts the block diagram of wireless monitoring
to exhibit appropriate data transmission, detection and display system; including various sensors, signal conditioning blocks,
[5]. Mauricio Villarroel et.al have developed the system which
processing block and display device and wireless module.
detects heart rate, respiratory rate and variations in oxygen
The system includes temperature sensors to detect the
saturation continuously in the NICU, with an accuracy of
ambient temperature and skin temperature of infant inside
clinical records. This was the first study establishing the
incubator, humidity sensor and light detector. The output of
possibility of incessant non-contact monitoring of
cardiorespiratory vital signs in hospital using a digital video each sensing unit was modified according to the systems
camera and normal ambient light, for several hours, without requirements through signal conditioning blocks. The
affecting patient care. They have successfully monitored fifteen analogue multiplexer was used to select the parameters in
infants continuously during the daytime. The algorithms sequence for conversion and display purpose. The analogue
developed for processing the camera reflectance signals were outputs of sensors were converted into digital equivalents by
capable of identifying clinically important events such as a using the serial Analogue to Digital Convertor PmodAD2,
bradycardia accompanied by major desaturation [6]. Chen Wei, developed by Digilent Inc. and powered by the analogue
Sonntag, Christoph, Boesten, Freek Oetomo, Sidarto Bambang, device AD7991.The ADC generates 12 bit serial output
Feijs Loe proposed a design of wireless power supply working proportional to the analogue voltage. This output of ADC
on the principle of inductive contactless energy transfer which was displayed on the LCD through the LCD driver code
can be used in the NICUs. The proposed power supply meets the written in Very High Speed Integrated Circuit Hardware
requirements of neonatal monitoring and provides continuous Description Language (VHDL) and implemented on Spartan
power when the neonate is inside the incubator or during 3E Fpga device. Further the status of each parameter was
Kangaroo mother care. A sample model was designed and sent towards GSM module through UART soft IP core
implemented to reveal the performance of the power supply and designed with the help of MicroBlaze soft processor present
the possibilities for aesthetic features. Experimental results in Core generator system present in Xilinx ISE design suit.
illustrate that the designed power supply transfers
The necessary Attention commands to drive the GSM
approximately 840 mW of power [7]. The design of a smart
module SIM900A were generated through UART soft IP
jacket for vital sign detection of neonates admitted in NICU was
core. The status of all parameters was transmitted through
proposed by Wei Chen, Sidarto Bambang Oetomo, Loe Feijs,
GSM module towards user’s cell phone in the form of text
Sibrecht Bouwstra, Idowu Ayoola, and Sietse Dols. The
prototype symbolizes a unique combination of sensor message. The soft IP core is generated in Very High Speed
technology, user’s attention and design features. The system Integrated Circuit Hardware Description Language (VHDL)
includes the textile sensors, a reflectance pulse oximeter and a using Core Generator System.
wearable temperature sensor embedded into the smart jacket.
Position of the sensor, materials and appearance were designed The MicroBlaze embedded processor soft core is a
to meet the accuracy in the functionality, patient comfort and the reduced instruction set computer (RISC) designed for
possibilities for aesthetic features [8]. Benny P.L. Lo, Surapa implementation in Xilinx Field Programmable Gate Arrays.
Thiemjarus, Rachel King and Guang-Zhong Yang have Xilinx's Embedded Development Kit (EDK) is the advanced
presented a Body Sensor Network (BSN) prototype for the real package for building MicroBlaze embedded processor
time health monitoring which incorporates the multi-sensor data systems in Xilinx FPGAs [10]. This soft processor core is
fusion with low power, flexible and compact design, providing available in Core generator system. Xilinx CORE Generator
an adaptable environment for wireless sensing. The BSN node System speed ups the design time by providing access to
was built around Texas Instrument (TI) MSP430 16-bit ultra highly parameterized Intellectual Properties (IP) for Xilinx
low power RISC processor consisting of on-chip w 60KB+256B FPGAs and is incorporated in the Integrated Software
Flash memory, 2KB RAM, 12-bit ADC with 6 analogue Environment (ISE) Design Suite. CORE Generator offers a
channels (providing connections for 6 sensors). For wireless directory of structural design specific, domain-specific
communication, the Chipcon CC2420 RF module was used
(embedded, connectivity and DSP), and market specific IP
which has a throughput of 250kbps with a range over 50m.
(Automotive, Consumer, Mil/Aero, Communications,
Along with this, 512KB serial flash memory was incorporated
Broadcast etc.). These user-customizable IP functions range
in the BSN node for data storage or buffering [9].
in complexity from commonly used functions, such as
From the review taken from many research work contributed memories and FIFOs, to system-level building blocks, such
by the other researchers, the present research work focuses on as filters and transforms. Using these IP blocks we can save
the development of wireless monitoring system to detect the days to months of design time [11]. The design flow for
Incubator parameters. The main feature of the designed MicroBlaze embedded soft processor core is targeted for
prototype was the simple designing and low cost which targets Spartan 3E FPGA board (Nexys2); developed by Digilent
the hospitals situated in rural areas in developing countries. The Inc. The reference manual of this board is given in [12].
system is capable to transmit the status of all parameters to the
long distance in form of text message sent towards the user’s
cell phone.
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All Rights Reserved © 2020 IJARECE
ISSN: 2278 – 909X
International Journal of Advanced Research in Electronics and Communication Engineering (IJARECE)
Volume 9, Issue 4, April 2020
IV. ANALOG FRONT END DESIGN FOR THE WIRELESS The following section gives the necessary steps to create
MONITORING SYSTEM FOR INFANT INCUBATORS MicroBlaze soft processor core based UART IP core for
Fig. 2 depicts the circuit design of analogue front end of the sending text message through GSM modem. The Core generator
system. In this the LM35 temperature sensor was used to detect system consists of many IP cores from which the MicroBlaze
the ambient temperature and Skin temperature of the infant MCS core under the ‘Embedded processing’ tab of Architecture
admitted in NICU. The SYHS230 humidity sensor was used to Wizard was selected. The input clock frequency for the
detect the relative humidity inside incubator, and LDR; placed MicroBlaze processor was set to 50MHz. The memory size for
the processor can be selected as per requirement. In this case it
in a voltage divider circuit was deployed for the light intensity
was set to 16KB. The General purpose input (GPI) port and the
monitoring. The output of each sensor was amplified with the
General Purpose output (GPO) port of the processor were set to
operational amplifier IC LM358 which consists of two
8-bit. The Transmitter and Receiver were enabled and the baud
independent high gain operational amplifiers working on single rate was set to 9600 present under the UART tab of the core.
supply voltage starting from low voltage of 3V to maximum of The figure 3 shows the MicroBlaze processor core, which was
32V. The data sheet of this IC was given in [14]. Further the generated after clicking the ‘Generate’ tab. The generated core
output of each amplifier stage was given to the individual input was shown as .xco file in the hierarchy pane of the main ISE
channels of analogue multiplexer CD405 [15]. The status of project. A new top level entity with connections to the clock
select lines of multiplexer was varied through the FPGA device and peripherals on the Nexys2 board was created in Very High
Spartan 3E. Speed Integrated Circuit Hardware Description Language
The output of multiplexer was connected to the input of serial (VHDL) as per the user guide given in [17].
ADC PmodAD2. The IC7991 converts the signal into 12 bit
digital equivalent. The AD7991 device works on I2C
communication protocol.
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All Rights Reserved © 2020 IJARECE
ISSN: 2278 – 909X
International Journal of Advanced Research in Electronics and Communication Engineering (IJARECE)
Volume 9, Issue 4, April 2020
port ( ----MUX Select Inputs---- AD2_SDA : inout STD_LOGIC;
sel: inout std_logic_vector(1 downto 0); DCH0 : out STD_LOGIC_VECTOR
(15 downto 0));
----------Pmod pins---------
RESET : in STD_LOGIC; end component;
SYS_CLK : in STD_LOGIC;
AD2_SCL : inout STD_LOGIC; component nicucode
AD2_SDA : inout STD_LOGIC; PORT (
------microblaze_uart pins---- Clk : IN STD_LOGIC;
Clk : IN STD_LOGIC; Reset : IN STD_LOGIC;
UART_Rx : IN STD_LOGIC; UART_Rx : IN STD_LOGIC;
UART_Tx : OUT STD_LOGIC; UART_Tx : OUT STD_LOGIC;
GPO1 : OUT STD_LOGIC_VECTOR(7 DOWNTO 0); GPO1 : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
GPI1 : IN STD_LOGIC_VECTOR(7 DOWNTO 0); GPI1 : IN STD_LOGIC_VECTOR(7 DOWNTO 0)
);
end component;
------------- LCD Data Pins----------
LCD_DATA : inout STD_LOGIC_VECTOR (7 downto COMPONENT microblaze_mcs
0); PORT (
Clk : IN STD_LOGIC;
--Control Pins Reset : IN STD_LOGIC;
LCD_ENABLE : out STD_LOGIC; UART_Rx : IN STD_LOGIC;
LCD_RS : out STD_LOGIC; UART_Tx : OUT STD_LOGIC;
LCD_RW : out STD_LOGIC; GPO1 : OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
data_read: in STD_LOGIC_VECTOR (7 downto 0); GPI1 : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
);
LED1 : out STD_LOGIC; END COMPONENT;
LED2 : out STD_LOGIC;
component parameter_integration
binary_in: in std_logic_vector(N-1 downto 0); port (
bcd0, bcd1, bcd2 : out std_logic_vector(3 downto 0); sel: inout std_logic_vector(1 downto 0);
LCD_DATA : inout STD_LOGIC_VECTOR (7 downto
bcds_out_reg_vector2,bcds_out_reg_vector1,bcds_out_reg_vector 0);
0:
inout std_logic_vector(7 downto --Control Pins
0); LCD_ENABLE : out STD_LOGIC;
ascii2,ascii1,ascii0: inout std_logic_vector(7 downto 0)); LCD_RS : out STD_LOGIC;
LCD_RW : out STD_LOGIC;
end Multiparameter_LCD_UART;
LED1 : out STD_LOGIC;
architecture Behavioral of Multiparameter_LCD_UART is LED2 : out STD_LOGIC;
type state_type is ( S0, S1, S2, S3, S4, S5, S6, S7, S8, S9, S10, --Clock & Reset
S11,S12,S13,S14,S15,S16,S17,S18,S19,S20,S21,S22,S23,S24,S2 CLK : in STD_LOGIC;
5,S26,S27,S28,S29,S30,S31,IDLE); RESET : IN STD_LOGIC;
signal current_state: state_type;
signal a : std_logic := '0'; binary_in: in std_logic_vector(N-1 downto 0);
signal b : std_logic := '0'; bcd0, bcd1, bcd2 : out std_logic_vector(3 downto 0);
bcds_out_reg_vector2,bcds_out_reg_vector1,bcds_out_reg_vec
type states is (start, shift, done); tor0: inout std_logic_vector(7 downto 0);
signal state, state_next: states; ascii2,ascii1,ascii0: inout std_logic_vector(7 downto 0));
signal binary, binary_next: std_logic_vector(N-1 downto 0); end component;
signal bcds, bcds_reg, bcds_next: std_logic_vector(11 downto
0); begin
signal bcds_out_reg, bcds_out_reg_next: std_logic_vector(11 masterControler1: masterControler
downto 0); port map ( RESET => RESET,
SYS_CLK => SYS_CLK,
signal shift_counter, shift_counter_next: natural range 0 to N; AD2_SCL=> AD2_SCL,
signal DCH0_view: STD_LOGIC_VECTOR(15 downto 0); AD2_SDA => AD2_SDA,
DCH0 => DCH0_view );
component masterControler is
Port ( RESET : in STD_LOGIC; nicucode1: nicucode
SYS_CLK : in STD_LOGIC; port map ( Clk => SYS_CLK,
AD2_SCL : inout STD_LOGIC; Reset => RESET,
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All Rights Reserved © 2020 IJARECE
ISSN: 2278 – 909X
International Journal of Advanced Research in Electronics and Communication Engineering (IJARECE)
Volume 9, Issue 4, April 2020
UART_Rx => UART_Rx, NET "GPO1<6>" LOC = "F4";#LED6
GPI1 => DCH0_view(11 downto 4)); NET "GPO1<7>" LOC = "R4";#LED7
NET "LCD_DATA<0>" LOC = "M13";#JB1
mcs_0:microblaze_mcs NET "LCD_DATA<1>" LOC = "R18";#JB2
PORT MAP ( Clk => SYS_CLK, NET "LCD_DATA<2>" LOC = "R15";#JB3
Reset => RESET, NET "LCD_DATA<3>" LOC = "T17";#JB4
UART_Rx => UART_Rx, NET "LCD_DATA<4>" LOC = "P17";#JB7
UART_Tx => UART_Tx,
NET "LCD_DATA<5>" LOC = "R16";#JB8
GPO1 => GPO1,
NET "LCD_DATA<6>" LOC = "T18";#JB9
GPI1 => DCH0_view(11 downto 4) );
NET "LCD_DATA<7>" LOC = "U18";#JB10
parameter_integration1: parameter_integration
port map( sel => sel, Table I shows the summary of synthesis report. Figure 5
LCD_DATA =>LCD_DATA, depicts the working model of the system, where as figure 6
LCD_ENABLE =>LCD_ENABLE, shows the necessary AT commands generated to drive the GSM
LCD_RS =>LCD_RS, module and the status of each parameter transmitted towards the
LCD_RW =>LCD_RW, GSM module.
--Clock & Reset
CLK =>SYS_CLK, Table I: Summary of Device Utilization Report
RESET =>RESET,
binary_in => DCH0_view(11 downto 4));
end Behavioral;
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All Rights Reserved © 2020 IJARECE
ISSN: 2278 – 909X
International Journal of Advanced Research in Electronics and Communication Engineering (IJARECE)
Volume 9, Issue 4, April 2020
library.theiet.org/docserver/fulltext/htl/1/3/HTL.2014.0077.pdf?expires=15199
84368&id=id&accname=guest&checksum=5A37F6DECF90C9EF8CB481DD
C6339DE6
[7] Chen, Wei, Sonntag, Christoph, Boesten, Freek Oetomo, Sidarto Bambang,
Feijs Loe, “A design of power supply for neonatal
monitoring with wearable sensors”, Journal of Ambient Intelligence and
Smart Environments, vol. 1, no. 2, pp. 185-196, 2009, [Online]
Available:
https://content.iospress.com/articles/journal-of-ambient-intelligence-and-smart
-environments/ais022
Fig 6: Hyper Terminal Window showing the status of each
parameter and AT commands necessary to drive GSM module [8] Wei Chen, Sidarto Bambang Oetomo, Loe Feijs, Sibrecht Bouwstra, Idowu
Ayoola, and Sietse Dols, “Design of an Integrated Sensor
Platform for Vital Sign Monitoring of Newborn Infants at Neonatal
VII. CONCLUSION Intensive Care Units”, Journal of Healthcare Engineering, Volume 1 (2010),
The present research work is a prototype development Issue 4, Pages 535- 554, [Online] Available:
https://www.hindawi.com/journals/jhe/2010/124270/abs/
for continuous monitoring of environmental parameters inside
infant incubators of NICU. The potential of HDL, that is, [9] Benny P.L. Lo, Surapa Thiemjarus, Rachel King and Guang-Zhong Yang,
executing more than one module concurrently has been utilized “Body Sensor Network– A Wireless Sensor Platform for
Pervasive Healthcare Monitoring”, [Online] Available:
in this research work. By means of executing data acquisition http://csis.pace.edu/~marchese/CS396x/L3/p077-080.pdf
process in a VHDL component and implementation of serial
communication between Fpga device and GSM using UART [10]MicroBlaze Processor Reference Guide, [Online] Available :
http://www.xilinx.com/support/documentation/sw_manuals/mb_ref_guide. pdf
soft IP core designed with the help of MicroBlaze soft
embedded processor core from Core generator system; gives [11] [Online]. Available: http://www.xilinx.com/tools/coregen.htm
the evidence of HDLs having the concurrency in behavior. As a
result of this, the prototype developed in the research work for [12] Digilent Nexys2 Board Reference Manual, [Online]. Available:
www.digilentinc.com/data/products/nexys2/nexys2_rm.pdf
neonatal care unit reads the status of each parameter; displays it
on LCD at local level and transmits the same towards user’s cell [13] EDK Concepts, Tools, and Techniques reference guide
phone through GSM module. The data acquisition system was [Online].Available:
www.xilinx.com/support/documentation/sw.../xilinx14_1/edk_ctt.pdf
developed by installing the required sensors, serial ADC, GSM
module and FPGA from Xilinx Inc. [14] Data sheet of LM358 Operational Amplifier, [Online]. Available:
https://www.sparkfun.com/datasheets/Components/General/LM358.pdf
[5] Wei Chen, Son Tung Nguyen, Sibrecht Bouwstra, Roland Coops, Lindsay
Brown, Sidarto Bambang Oetomo, Loe Feijs, “Design of
Wireless Sensor System for Neonatal Monitoring”, [Online] Available:
https://www.researchgate.net/publication/224222222_Design_of
Wireless_Sensor_System_for_Neonatal_Monitoring
[6] Mauricio Villarroel, Alessandro Guazzi, João Jorge, Sara Davis, Peter
Watkinso, Gabrielle Green, Asha Shenvi, Kenny McCormick, Lionel
Tarassenko, “Continuous non-contact vital sign monitoring in neonatal
intensive care unit”, Published in Healthcare Technology Letters; Received on
6th July 2014; Revised on 22nd August 2014; Accepted on 22nd August 2014,
[Online] Available: http://digital-
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