Architecture of Ring-based Redundant TSV for Clustered

Faults
Wei-Hen Lo, Kang Chi, TingTing Hwang
Department of Computer Science, National Tsing Hua University, R.O.C
turtleevil [email protected], [email protected]

A BSTRACT Li Jiang et al. [1] addressed this fault clustering problem and proposed a
Three-dimensional Integrated Circuits (3D-ICs) that employ the router-based TSV redundant architecture for fault tolerance. Their design
Through-Silicon Vias (TSVs) vertically stacking multiple dies provide many can not only repair the faulty TSVs by their neighboring signal TSVs
beneãts, such as high density, high bandwidth, low-power. However, the but also by other distant signal TSVs. To achieve this goal, their design
fabrication and bonding of TSVs may fail because of many factors, such needs a lot of routers each of which consists of three 3-to-1 MUXes in
as the winding level of the thinned wafers, the surface roughness and the TSV block. These routers allow the signals to bypass the routers and
cleaness of silicon dies, and bonding technology. To improve the yield to be rerouted to distant TSVs. Therefore, their method can repair almost
of 3D-ICs, many redundant TSV architectures were proposed to repair all combination of clustered TSV faults. However, in order to repair all
3D-ICs with faulty TSVs. These methods reroute siganls of faulty TSVs possible TSV defective patterns, each signal TSV is placed with a router.
to other regular or redundant TSVs. In practice, the faulty TSVs may Therefore, the routers cause a lot of area overhead in the TSV block.
cluster because of imperfect bonding technology. To resolve the problem Moreover, the space between TSVs may be widened by these routers,
of clustered TSV faults, router-based [1] redundant TSV architecture was hence the probability of clustered TSV faults is less than expected.
the ãrst paper proposed to pay attention to this clustering problem. Their In this paper, we propose a new redundant TSV architecture to repair
method enables faulty TSVs to be repaired by redundant TSVs that are clustered TSV faults. One feature of our architecture is to maintain high
farther apart. However, for some rarely occurring defective patterns, their yield rate with much less hardware overhead. In addition, the minimum
method consumes too much area. In this paper, we propose a ring-based shifting length in our design is always 1 which guarantees the minimum
redundant TSV architecture to utilize the area more efãciently as well as timing overhead of each signal. Our design mainly divides the TSVs in
to maintain high yield. Simulation results show that for a given number the TSV block to multiple rings. The signals located in these rings can
of TSVs (8 × 8) and TSV failure rate (1%), our design achieves 54% area be shifted in the direction of their own rings and their outer rings. The
reduction of MUXes per signal, while the yield of our ring-based redundant redundant TSVs are placed in four corners of the TSV block or any other
TSV architectures can still maintain 98.47% to 99.00% as compared with locations of the outermost ring. Moreover, the number of redundant TSVs
router-based desgin [1]. Furthermore, the minimum shifting length of our can be adjusted depending on the number of faulty TSVs to be repaired.
ring-based redundant TSV architecture is at most 1 which guarantees the The rest of this paper is organized as follows. In Section II, we
minimum timing overhead of each signal. will analyze the fault rate of clustered TSV faults and show that some
complicated clustered TSV defects rarely happen. Next, in Section III,
I. I NTRODUCTION our ring-based architecture for TSV redundancy is introduced. Section IV
Three-dimensional integrated circuits (3D ICs) have been proposed as an presents the experimental results for various hypothetical 3D-ICs. Finally,
effective solution to overcome scaling bottleneck. 3D-ICs stack multiple the conclusions are given in Section V.
dies and link them together with Through-Silicon Vias (TSVs). Due to
shorter vertical interconnect path by TSVs, it results in lower parasitic II. M OTIVATION
losses, reduced power consumption, higher I/O density and improved In view of the fact that the main bonding steps including the winding
system performance. In spite of above beneãts, TSVs may fail during level of thinned wafers, the surface roughness and cleanness of silicon
the assembly process and cause the circuits failure [7]–[9]. The types of dies, cause faulty TSVs to be close to each other, Li Jiang et al [1]. have
TSV defects include the misalignment of TSVs and bond pads [14], [15], proposed a router-based redundant TSV repairing framework to solve this
random open defects [19], impurity of TSVs [20], bond pads short, leak clustered TSV faults problem. In Li’s work, each signal TSV is placed
and delaminating [21]. near a router. If one signal is disconnected due to a TSV fault, the
To avoid chip failure caused by defects of TSVs, several redundant TSV router can reroute the signal to a neighboring or a distant fault-free TSV.
designs have been proposed. The basic idea of these methods is to add Redundant TSVs are placed near the right and bottom boundary of the TSV
some redundant TSVs. Thus, the faulty TSVs can be replaced by these block. Their method is able to repair multiple heavy-clustered faulty TSVs.
redundant TSVs. In [10], the idea has been realized in 3D DRAM memory Assume there are 4 × 4 signal TSVs and 8 redundant TSVs in the TSV
where every four signal TSVs and two redundant TSVs are allocated as a block. Their router-based design is shown in Figure 1, where white circles
group. Each signal TSV is connected to a MUX to reroute the signal to , grey circles, black squares, octagons represent signal TSVs, redundant
neighboring signal TSV or the redundant TSV. In [5], Hsieh et al. proposed TSVs, signals that are to pass to different tiers and routers (switches),
a redundant TSV design based on the concept of TSV-chain. Their method respectively. The routers consist of 3 3-to-1 MUXes. The signals can be
adds only one redundant TSV in each TSV block and uses 2-to-1 MUXes shifted to their neighboring TSVs or bypass the routers. Figure 1 shows
to chain the signal TSVs and the redundant TSV together. The signals can one of the most difãcult defective patterns where ãve clustered faulty TSVs
be shifted to their neighboring TSVs following the direction towards the are denoted as X. The arrows represents the repair paths from signals to
redundant TSV. In [11], a redundant row or column of TSVs is added for the TSVs. A repair path means that the signal is shifted to a target TSV.
fault tolerance. However, the previous work is all based on the assumption For example, signal a is rerouted to TSV b by passing two routers r1, r2.
that TSV faults are independent to each other and follow the uniform This router-based redundant architecture is effective in recovering multi-
distribution. When there are multiple TSV faults clustering together, these ple heavily clustered faulty TSVs. However, the probability of occurrence
previous redundant TSV architecture may not be able to repair TSV faults. of such defective pattern is negligible. Our analysis is described as follows.
In practice, the main causes of clustered TSV defects include the winding Let the yield model Compound Poisson Distribution [2] which is commonly
level of thinned wafer, the surface roughness and cleaness of silicaon dies used in IC manufacture [22] be adopted to model the clustered defects.
and bonding technology. Figure 2 shows the probability of occurrence of different number of faulty

978-3-9815370-4-8/DATE15/2015
c EDAA 848
 4
x 10 Case Distribution
3.5

Number of Case
2.5

1.5

0.5

0
2 4 6 8 10 12 14
Bounding Box Size

Fig. 1. Example of router-based TSV repair framework repairing a 5-faulty-TSVs Fig. 3. 100000 Bounding boxes consisted of 5 faulty TSVs following pareto
case distribution

TSVs where the parameter controlling clustering effect (denoted as α) III. P ROPOSED TSV R EDUNDANCY A RCHITECTURE
varies from 0.5 to 5. Note that smaller values of α indicate increased fault Since some patterns of clustered TSV defects as shown in Figure 1 rarely
clustering. Based on our analysis, the probability of cases that have less happen, it is inefãcient to spend a lot of hardware resources to ãx those
than 4 faulty TSVs reaches 92.65% to 96.41% for all α values based on faults. In order to reduce hardware usage and still maintain high faulty
Compound Poisson Distribution. In other words, the probability is only TSV repairing rate considering clustering effect, we propose a new ring-
about 5% for the cases that have more than 3 faulty TSVs. based TSV redundancy architecture that considers the most common TSVs
Moreover, based on the probability of faults generating by Compound defects patterns.
Poisson Distribution, the fault distribution on the plane quantitated by
Pareto Distribution [17] shows that the difãcult defective patterns are very
rare to happen. The analysis is shown as follows. A. Ring-based TSV Redundancy Architecture Design
Let the defective probability is inverse proportional to the area. That is, The overall structure of our ring-based TSV redundancy architecture is
our assumption is that the bounding box area consisting of faulty TSVs illustrated in Figure 4, where there has 8 × 8 TSVs. Note that the size
follows Pareto Distribution [17]. Hence, different bounding boxes consist- of TSV block is not restricted to 8 × 8. Our design can be extended to
ing of faulty TSVs represent different defective patterns. Mathematically, arbitrary sizes of TSV blocks. In Figure 4, assume the probability of 5 or
a Pareto Distribution of area region consisting of N clustering faulty TSVs more than 5 TSVs defects is low enough, our design places 4 redundant
with parameter α is deãned by: TSVs in 4 corners to recover at most 4 faulty TSVs. The TSVs in the
 TSV block are divided into multiple rings in our design. Take Figure 4
(Bm /B)α , x ≥ Bm , as an example, where 8 × 8 TSVs are divided into 3 rings. They are the
P robability{X > B} = (1) ãrst ring, the second ring, and the third ring. Other TSVs are categorized
1, x < Bm ,
as the innermost TSVs. The innermost TSVs will form either a ring or a
where Bm is the (necessarily positive) minimum possible value of X, B straight line depending on the size of TSVs in a block. For example, in a
represents the bounding box consisting of N faulty TSVs and α is constant. 3 × 8 TSV block, the innermost TSVs will form a line.
Equation (1) means that the bounding box consisting of N faulty TSVs must In Figure 4, ãrst, the signals of TSVs in the ãrst ring can be shifted to
be larger than a minimum area Bm and the probability of a bounding box their neighboring TSVs in any direction. In other words, these signals
larger than B is inversely proportional to B. The parameter α controls the can be shifted to neighboring TSVs in the ãrst ring clockwise and
degree of the heavy-tailed effect, where large α means that the bounding counterclockwise, and to neighboring TSVs in the second ring. Next, the
box consisting of N faulty TSVs are more likely to be close to B. This signals of the TSVs in the second ring can be shifted to the neighboring
model has also been used in modeling the memory trafãc [23], [24]. TSVs in the ãrst ring and the neighboring TSVs in the same ring clockwise
To understand the occurrence of the most difãcult patterns, we randomly while the signals of TSVs in the third ring can be shifted to the neighboring
generated 100000 bounding boxes consisting of 5 faulty TSVs whose area TSVs in the second ring and the neighboring TSVs in the same ring
following Pareto Distribution with α = 1 and Bm = 3. We set Bm = 3 counterclockwise. Finally, the signals of the innermost TSVs can be shifted
since the minimum bounding box area consisting of 5 faulty TSVs equals to neighboring TSVs in innermost TSVs and its neighboring TSVs in the
to 3 (2 × 3). Figure 3 shows the statistics result where there are 32% third ring.
of bounding boxes equal to 3. That is, if we assume the probability of The detailed interconnections of the outermost signals i.e. the ãrst ring
occurrence of 5 faulty TSVs by Compound Poisson Distribution is shown in this example and their TSVs are shown in the lower right corner of
as the ãrst row in Figure 2, the probability of defective pattern, i.e. the Figure 5. Every TSV in the outermost ring is connected to a 4-to-1 MUX
most difãcult patterns for repairing (the most compact patterns) shown in whose inputs are from its own signal and other three neighboring signals.
Figure 1 is approximately 0.91% · 32% = 0.291%. Therefore, spending These MUXes are connected to an e-fuse array which can be programmed
a lot of hardware resources such as routers and redundant TSVs to repair by a scan-chain to deãne a connection. By default, all signals are set to the
this type of defective pattern is inefãcient. In addition, the space between value which represents the connection to its own TSV. After the testing for
TSVs may be widened by those routers. This may alleviate the clustering TSVs is done, the MUXes will receive appropriate controlling values to
effect caused by the imperfect bonding process. reroute the signals. This allows signals to be shifted to their neighboring
Due to the above mentioned reason, it is less efãcient to use a lot of TSVs or their own TSV. There are three directions for signal rerouting.
hardware to simply repair a defective pattern occuring less than 0.291% One is to reroute the signal to the TSVs in the inner rings, and the other
as shown in Figure 1. To solve this problem, we design a new TSV repair two are to reroute the signals to their neighboring TSVs clockwise or
architecture that can repair most of TSVs defective patterns considering counterclockwise.
clustering effect with both less the area overhead and the number of On the other hand, the detailed interconnection of the inner signals
redundant TSVs. and their TSVs is illustrated in Figure 6. We divide the inner TSVs into

2015 Design, Automation & Test in Europe Conference & Exhibition (DATE) 849
 Compound Poisson Distribution
fault rate: 1% ߙǣ 0.5 1 2 3 5
70%
60%

Probobility
50%
40%
30%
20%
10%
0%
0 1 2 3 4 5 6+
0.5 66.23% 18.59% 7.83% 3.66% 1.80% 0.91% 0.98%
1 60.98% 23.80% 9.29% 3.62% 1.41% 0.55% 0.35%
2 57.39% 27.83% 10.12% 3.27% 0.99% 0.29% 0.11%
3 55.98% 29.53% 10.38% 3.04% 0.80% 0.20% 0.07%
5 54.76% 31.07% 10.58% 2.80% 0.64% 0.13% 0.02%
Number of Fault

Fig. 2. Probability of occurrence of different number of defective TSVs

TSV in the next layer of the ring and the other is to reroute the signal to
the neighboring TSV in the same ring clockwise. Second, we consider all
other inner rings. In Figure 6, only the third ring is in this category. In this
category, a TSV is connected to a 3-to-1 MUX whose inputs are its own
signal, signal from the same ring, and signal from inner ring. Note that
only the TSVs in the ãrst ring and second ring except for its 4 corners
are connected to 4-to-1 MUXes. All other TSVs in the inner rings are
connected to 3-to-1 MUXes.

Fig. 4. Ring-based TSV redundancy design

Fig. 6. Detailed interconnection of TSVs in inner rings

As for the most inner signals and TSVs, we simply let the signals reroute
to the next layer of the ring and the neighboring TSVs which are also
innermost TSV. Once there is a faulty TSV inside the innermost TSVs,
the signal of that faulty TSV can be shifted to the next layer or the other
innermost TSV. It follows that the signals in the next layer are also shifted
to the next next layer and ãnally the shifting process propagates the signal
to one of the redundant TSVs in the corners.
Figure 7 shows an example where white circles represent regular signal
Fig. 5. Detailed interconnection of outermost TSVs TSVs, grey circles redundant TSVs, black squares signals, the crosses on
regular signal TSVs faulty TSVs, the small arrows the directions for signal
several layers of rings. The directions for signal shifting of each layer is
rerouting, and the large blue arrows the repair sequence. We assume that
either clockwise or counterclockwise alternatively. In Figure 6, the shifting
the size of TSV block is 8×8 and there are 4 clustered faulty TSVs forming
direction of the outer ring (second ring) is clockwise while the shifting
an L shape. The signals of those faulty TSVs are shifted to their neighbors
direction of the next layer of the ring (third ring) is counterclockwise. The
TSVs following the direction of the arrows. This causes all signals on the
signals can also be shifted to their neighboring TSVs which are located in
paths of arrows to be shifted. Shifting continues till the last signals are
the next layer of the ring. First, we consider the second outermost ring. The
shifted to redundant TSVs in 4 corners.
structure of this ring is different from that of other inner rings. Take two
Our ring-based design can be applied to TSV block whose size is large
signals and their TSVs in the dashed rectangle in Figure 6 as an example.
enough to form a ring. Figure 8 shows another example of our ring-
The TSV which is located at the corner is connected a 3-to-1 MUX whose
based architecture for an 8 × 9 TSV block and 8 redundant TSVs evenly
inputs are its own signal, signal from the same ring and signal from the
distributed in the outermost ring. In this example, we also show how 8
outer ring. On the other hand, the TSV which is not located at the corner
clustered TSV faults are repaired. The repairing sequence is denoted as
is connected to a 4-to-1 MUX whose inputs are its own signal, the signal
those large blue arrows.
from the same ring, the signal from inner ring and the signal from outer
ring. As Figure 6 shows, the signal can be shifted to the neighboring TSVs As to the hardware overhead, our analysis is as follows. Let the size of
in two different directions. One is to reroute the signal to the neighboring TSV block be N ×M and the number of redundant TSVs in the outermost
ring be R. Our design needs 2 × (N + M − 2) − R 4-to-1 MUXes in the

850 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE)
 1.8%×39% = 0.702%. These defective patterns are nonrepairable because
the three routing directions of every signal inside the bounding box are
blocked. If the bounding box consisting of 4 faulty TSVs is larger than
2 × 2, we pessimistically assume that these defective patterns consist of
1 single TSV located at one corner and the other three TSVs located
at the diagonal corner whose bounding box is 2 × 2. Note that this is
a pessimistic assumption, because many of defective patterns consist of
loosely distributed faulty TSVs. Those loosely distributed faulty TSVs can
be repaired by our design. By this pessimistic assumption and the previous
deduction of 3 most compact faulty TSV, at most 25% of the most compact
cases of 3 faulty TSVs are nonrepairable in our ring-based design. Hence,
the probability of 4 nonrepairable faulty TSVs whose bounding box larger
than 2 × 2 is 1.8% × (100 − 39)% × 25% = 0.275%.
Finally, assume our ring-based design only use 4 redundant TSVs. Then,
Fig. 7. Example of our ring-based design the defective patterns with more than 4 faulty TSVs are all nonrepairable.
The probability of 5 or more than 5 faulty TSVs is 1.89%. In summary, the
upper bound of the overall failure rate is 0.356% + 0.702% + 0.275% +
1.89% = 3.223%. Moreover, this failure rate is pessimistic since we pick
the parameter α 0.5. This small α value results in high probability of large
number of faulty TSVs and more defective patterns of heavily clustered
multiple faulty TSVs. An analysis on tighter bound will be found in our
journal version.

Fig. 8. Example of our ring-based design with 8 redundant TSVs when the size of
TSV block is 8 × 9

outermost ring, 2 × ((N − 2) + (M − 2) − 2) − 4 4-to-1 MUXes in the ãrst

layer of the inner rings and (N − 2) × (M − 2) − (2 × ((N − 2) + (M −
2) − 2) − 4) 3-to-1 MUXes in the rest of inner rings. The redundant TSVs
in the outermost ring require 4 2-to-1 MUXes and R - 4 3-to-1 MUXes.
For example, let the size of TSV block be 8 × 8 and the number of
redundant TSV 4. In this case, the TSVs in the ãrst ring and in the second Fig. 9. All 4 combination of most compact cases of 3 faulty TSVs
ring except its 4 corners need 40 4-to-1 MUXes and the other TSVs need
20 3-to-1 MUXes. The redundant TSVs need 4 2-to-1 MUXes. C. Repairing Algorithm
After the fault map is derived from TSV testing, we need to analyze
B. Analysis of Nonrepairable Defect Patterns and Recovery Rate whether the TSV block is repairable, and generate the repair sequences if
In this section, we will show that our ring-based design can repair most possible. In [1], repairing problem was transformed into a maximum length
defective patterns. Assume the number of TSV faults follows Compound bounded äow problem and a diagonal-grouping heuristic was proposed to
Poisson Distribution and let the size of TSV block be 8 × 8, α 0.5 and derive their repair paths to meet length constraint. In our design, since the
the fault rate of TSV 1%. Then, the probabilities of 0 faulty TSV, 1 faulty signal can only be shifted to its neighboring TSVs, the problem is simpler
TSV, and 2 faulty TSVs are 66.23%, 18.59%, and 7.83%, respectively. than the previous work. We employ the Maximum Flow method [6] to ãnd
First, if the number of faulty TSVs is less than 3, the signals can be our solutions. Our problem formulation is as follows:
rerouted to their neighboring TSVs since there are at least 3 directions for Let the äow framework denoted as G(V,E), where node set V =
signal rerouting in our design. Therefore, our ring-based design guarantees {Source} ∪ {Signal} ∪ {T SV } ∪ {Sink} and edge set E = {IE} ∪
to repair all defective patterns with less than 3 faulty TSVs. Now for the {AE} ∪ {OE}. Node Source and Sink represent the source and sink node
case of 3 faulty TSVs, the probability is 3.66%. Let us only consider the of the äow network, respectively. Nodes in Signal represent the set of
most compact cases, i.e. the most difãcult cases for repairing as shown signals, and nodes in TSV includes two sets, STSV and RTSV where STSV
in Figure 9. If the bounding boxes of 2 × 2 consisting of 3 faulty TSVs and RTSV are the sets of regular signal TSVs and redundant TSVs. IE,
follow Pareto Distribution, the probability of the most compact cases is AE, and OE represent sets of incoming edges, assignment edge, outgoing
39%. Figure 9(a)-(d) shows all 4 cases. Among these cases with the most edges. Incoming edge are constructed from Source to Signal, and outgoing
compact faulty TSVs, cases demonstrated in Figure 9(a) (25%) can not be edge are constructed from TSV to node Sink.
repaired by our design because all three possible routing directions of a An assignment edge eij ∈ AE is constructed if a node vi ∈ S connects
signal are all blocked by faulty TSVs, while cases demonstrated in Figure a node vj ∈ ST SV ∪ RT SV that is not faulty. The capacity of incoming
9(b)-(d) are repairable (75%). Therefore, the probability of nonrepairable edges, assignment edges and outgoing edges are all set to 1. After the graph
defective patterns with 3 TSV faults and bounding box of 2×2 is 3.66%× is constructed, the max äow is computed. If the maximum äow equals to
39% × 25% = 0.356%. If the bounding boxes consisting of 3 faulty TSVs the number of signals, then this TSV block is repairable.
are larger than 2 × 2, our ring-based architecture guarantees to repair all Figure 10 shows an example where Figure 10(a) is a TSV block and
these defective patterns. It is because the three routing directions of a signal Figure 10(b) its äow graph. Let the size of TSV block be 4 × 4 with 4
will not be all blocked in these cases. redundant TSVs at 4 corners. In Figure 10(b), nodes s1 to s12 represent
Next, for the case of 4 faulty TSVs, its probability is 1.8%. Then, signals, nodes t1 to t12 regular signal TSVs, and nodes r1 to r4 redundant
the probability of most compact and nonrepairable 4 faulty TSVs is TSVs. Assume t1 and t2 are faulty TSVs as shown in Figure 10(a). The

2015 Design, Automation & Test in Europe Conference & Exhibition (DATE) 851
edges (s1,t1), (s1,t2), (s2,t1), (s2,t2), (s4,t1), (t1, Sink) and (t2, Sink) are area of 3-to-1 MUX and 4-to-1 MUX is set to 2.66 × 1.4 = 3.724μm2
all removed from G. Edges are only constructed between signals and and 3.99 × 1.4 = 5.586μm2 .
non-faulty TSVs. For example, s3 can use fault-free TSVs r1, t3, t4 and Table I shows the number of TSVs, the number and the area of
t7. Hence, four assignment edges, (s3,r1), (s3,t3), (s3,t4) and (s3,t7) are MUXes of the rounter-based redundant TSV architecture and our ring-
constructed. On the other hand, since t1 and t2 are faulty, signal s1 can based redundant TSV architecture. The column denoted as Router-based
pass through only fault-free TSVs t4 and r1. Hence, only edges from node [1] represents the results of router-based architecture. The columns denoted
s1 to nodes t4 and r1 are constructed. After performing Maximum Flow as Ring-4 and Ring-8 represent the results of our ring-based architectures.
algorithm, the edges which connect s1 and r1, s2 and r2 have äow 1. This The rows labeled # Signal TSV, # Redundant TSV, R/S ratio, 2-to-1 MUXes,
means that signal s1 is shifted to r1 and signal s2 is shifted to r2. Since 3-to-1 MUXes, 4-to-1 MUXes, Area of 2-to-1 MUXes, Area of 3-to-1
the total capacity in G equals to 12, this defective pattern is repairable. MUXes, Area of 4-to-1 MUXes, Total Area of MUXes and Total Area of
MUXes / # Signals are the number of regular signal TSVs, the number
TSV of redundant TSVs, the ratio of redundant TSVs to signal TSVs, the total
t1 number of 2-to-1 MUXes, the total number of 3-to-1 MUXes, the total
Signal
t2 number of 4-to-1 MUXes, total area of 2-to-1 MUXes, total area of 3-to-1
s1
r1 t1 t2 r2 t3 MUXes, total area of 4-to-1 MUXes, total area of all MUXes, and the
s1 s2 t4 ratio of total area of MUXes to the number of signals, respectively. In our

...
Source s2 Sink

...
t3 t4 t5 t6 experiments, a TSV block contains at most 64 signal TSVs. For router-
s3 t7
s3 s4 s5 s6 based architecture, the number of signal TSVs is set to 64. For our ring-
...
based architecture Ring-4 and Ring-8, the number of signal TSVs equals to
...

t7 t8 t9 t10 r1
s7 s8 s9 s10
s12 60 and 56, and the redundant TSVs are placed in 4 corners and borders of
r2
TSV block. Since the numbers of signal TSVs with different architecture
r3
r3 t11 t12 r4 are not the same, we compare the R/S Ratio (or named redundancy ratio)
s11 s12 r4
of different architectures. The R/S Ratio of router-based architecture is 25%
(a) (b) while R/S Ratio of Ring-4 and Ring-8 are 6.67% and 14.29%. This means
the number of required redundant TSVs in our ring-based design is much
Fig. 10. Flow Graph of the TSV Block less than the router-based design. Next, we will compare the number of
IV. E XPERIMENTAL R ESULTS multiplexer needed. There are 192 3-to-1 MUXes and no other types of
MUXes used in router-based architecture. In our ring-based architecture,
We compare our ring-based architecture and router-based redundant TSV Ring-4 uses 4 2-to-1 MUXes, 20 3-to-1 MUXes and 40 4-to-1 MUXes
architecture [1]. Assume there are 8×8 TSVs. Router-based redundant TSV while Ring-8 uses 4 2-to-1 MUXes, 24 3-to-1 MUXes and 36 4-to-1
structure uses 16 redundant TSVs located at the right column and bottom MUXes. It is clear that our designs signiãcantly reduce the usage of 3-to-1
row as shown in Figure 11(a). Redundant/Signal TSVs ratio (R/S ratio) MUXes with some usage of 2-to-1 MUXes and 4-to-1 MUXes. The total
of router-based structure is 1:4. In our design, we consider two kinds of area of MUXes used in router-based architecture is 715μm2 while the total
ring-based redundant TSV structures: Ring-4 and Ring-8. Ring-4 stands for area of MUXes used in Ring-4 and Ring-8 is 305.3μm2 and 297.9μm2 .
our ring-based redundant TSV architecture using 4 redundant TSVs at 4 The ratio of total area of MUXes to the number of signals in router-based
corners as shown in Figure 11(b). Ring-8 adopts the same basic structure architecture is 11.17 while that in Ring-4 and Ring-8 is 5.08 and 5.32,
of Ring-4 but replaces a signal TSV by redundant TSV at each row and which is only 45.2% compared to router-based architecture.
column as shown in Figure 11(c). The R/S ratio of Ring-4 and Ring-8 are
1:15 and 1:7. TABLE I
N UMBER OF TSV S AND N UMBER OF MUX ES OF ROUTER - BASED
A RCHITECTURE AND O UR R ING - BASED A RCHITECTURE
Router-based[1] Ring-4 Ring-8
# Signal TSV 64 60 56
# Redundant TSV 16 4 8
# R/S ratio 1:4 (25%) 1:15 (6.67%) 1:7 (14.29%)
# 2-to-1 MUXes 0 4 4
# 3-to-1 MUXes 192 20 24
# 4-to-1 MUXes 0 40 36
Area of 2-to-1 MUXes 0 7.4 7.4
Area of 3-to-1 MUXes 715 74.5 89.4
Area of 4-to-1 MUXes 0 223.4 201.1
Total Area of MUXes 715 305.3 297.9
Total Area of MUXes / # Signal 11.17 5.08 5.32

Fig. 11. Overview of TSV block B. Recovery Rate Analysis

The number of signal TSVs in router-based design is 64, while the In this Section, the relation between the number of TSVs in each TSV
number of signal TSVs in Ring-4 and Ring-8 are 60 and 56, respectively. block and recovery rate is analyzed based on the probabilistic models. We
The number of redundant TSVs is 16 in router-based architecture while ãrst deãne the fault rate of TSVs as the expected value of the faulty TSVs.
our ring-based architecture only uses 4 and 8 redundant TSVs, respectively. That is, if the fault rate of TSVs is 1% and the number of TSVs is 64, the
Note that it is äexible to set any number of redundant TSVs in our ring- expected value of the faulty TSVs will become 64 × 1% = 0.64. Then,
based design. We can simply put those redundant TSVs in any position of we make two assumptions:
the outermost ring of a TSV block.
1) The number of faulty TSVs follows Compound Poisson Distribution,
2) The bounding box consisting of N faulty TSVs follows Pareto
A. Comparison of Hardware Cost Distribution.
In our experiment, the technology parameters are based on Nangate Our experiment is developed on 3.0 GHz Linux environment with 64
45nm Open Cell Library [18]. The area of 2-to-1 MUX is 1.33 × 1.4 = GB memory. We simulated the proposed architecture using C++/STL
1.862μm2 in Nangate 45nm Open Cell Library. The 3-to-1 MUX and 4- programming language with LEDA library [13]. Two sets of experiments
to-1 MUX consist of 2 and 3 2-to-1 MUXes, respectively. Therefore, the are evaluated for router-based architecture and our ring-based architecture.

852 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE)
The parameter α of Compound Poisson Distribution is set to 1. The fault TABLE II
C OMPARISON R ESULTS OF T OTAL S HIFTING L ENGTH AND M AXIMUM S HIFTING
rate of TSVs is set to 1% and the parameter α of Perato Distribution is
L ENGTH
set to 1. The simulation äow is as follows :
First, 1,000,000 random cases were generated under Compound Poisson Max. shifting length
#Faults
Ring-4 and Ring-8 Router-based[1]
Distribution. After the number of faulty TSVs of a random case is decided,
2 1 1
we randomly generated the locations of those faulty TSVs whose bounding 3 1 2
box follows Pareto Distribution. For example, if the probability of 3 faulty 4 1 2
TSVs is 4.88%, there should be near 1000000 × 4.88% = 48800 random 5 1 2
cases with 3 faulty TSVs. Then, the bounding box of these faulty TSVs 6 1 3
7 1 3
follows Pareto Distribution (very likely to be 2 × 2). In the end, the
8 1 3
locations of these faulty TSVs are randomly generated within that bounding
box. After the faulty cases are prepared, they will be simulated by LEDA faulty TSVs are modeled as bounding boxes consisting of the faulty TSVs.
Maximum Flow function to test if they can be repaired or not. Assume that the size of these bounding boxes follows Pareto Distribution.
For router-based architecture, 8 × 8 singal TSVs and 16 redundant The probabilities of different defective patterns are derived. Based on the
TSVs are set. As for our ring-based architectures, Ring-4 and Ring-8, the defect model, our ring-based redundant TSV architecture only recovers the
numbers of signal TSVs are 60 and 56 while the numbers of redundant most likely defective patterns. Simulation results show that for a given
TSVs are 4 and 8. Figure 12 shows the yields for three different settings. number of TSVs (8 × 8), TSV failure rate (1%), careful selection of
The row denoted as Router-based [1] represents the results of router-based grouping ratios, our design achieves 54% area reduction of MUXes per
architecture and rows denoted as Ring-4 and Ring-8 represent the results signal, while the yield of our ring-based redundant TSV architectures can
of our ring-based architectures. The columns labeled 0 to 8 represent the still maintain 98.47% to 99.00%. The minimum shifting length of our
probabilities of different number of faulty TSVs. Figure 12 shows that the ring-based redundant TSV architecture is at most 1 which guarantees the
router-based architecture can repair almost all cases with faulty TSVs fewer minimum timing overhead of each signal.
than 5 and achieve overall yield rate 99.53%. On the other hand, our ring-
based architecture Ring-4 can repair at most 4 faulty TSVs. However, since
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architecture while it remains 1 in our ring-based architectures.

V. C ONCLUSION
In this paper, we design a ring-based redundant TSV architecture with
efãcient area cost to repair clustered faulty TSVs. The defective patterns of

2015 Design, Automation & Test in Europe Conference & Exhibition (DATE) 853