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21.07.

2023
22.07.2023

Mathematics-III for EE Engineering

Course Code BMATE 301 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:1:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination type (SEE) Theory
Course objectives:
 To acquaint the students with differential equations and their applications in electrical
engineering
 To find the association between attributes and the correlation between two variables
 Learn to use Fourier series to represent periodical physical phenomena in engineering
analysis and to enable the student to express non periodic functions to periodic function
using Fourier series and Fourier transforms.
 To learn the basic ideas of the theory of probability and random signals.

Teaching-Learning Process (General Instructions)

These are sample Strategies; which teachers can use to accelerate the attainment of the various course
outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative
effective teaching methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes
critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop
design thinking skills such as the ability to design, evaluate, generalize, and analyse
information rather than simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and
encourage the students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it
helps improve the students' understanding.
Module-1 :Ordinary Differential Equations of Higher Order (8 hours)
Importance of higher-order ordinary differential equations in Electrical & Electronics
Engineering applications.
Higher-order linear ODEs with constant coefficients - Inverse differential operator,
problems.Linear differential equations with variable Coefficients-Cauchy’s and Legendre’s
differential equations - Problems.
Applications:Application of linear differential equations to L-C circuit and L-C-R circuit.
Self-Study: Finding the solution by the method of undetermined coefficients and method of
variation of parameters.
(RBT Levels: L1, L2 and L3)

Module-2: Curve fitting, Correlation and regressions

Principles of least squares, Curve fitting by the method of least squares in the form
𝑦 = 𝑎 + 𝑏𝑥 , 𝑦 = 𝑎 + 𝑏𝑥 + 𝑐𝑥 2 , and 𝑦 = 𝑎𝑥 𝑏 . Correlation, Co-efficient of correlation, Lines
of regression, Angle between regression lines, standard error of estimate, rank correlation
Self-study: Fitting of curves in the form 𝑦 = 𝑎 𝑒 𝑏𝑥

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Module-3 Fourier series.

Periodic functions, Dirchlet’s condition, conditions for a Fourier series expansion, Fourier series
of functions with period 2𝜋 and with arbitrary period. Half rang Fourier series. Practical
harmonic analysis.
Application to variation of periodic current.
Self-study: Typical waveforms, complex form of Fourier series

Module-4 Fourier transforms and Z -transforms

Infinite Fourier transforms: Definition, Fourier sine, and cosine transform. Inverse Fourier
transforms Inverse Fourier cosine and sine transforms. Problems.
Z-transforms: Definition, Standard z-transforms, Damping, and shifting rules, Problems.
Inverse z-transform and applications to solve difference equations
Self-study: Convolution theorems of Fourier and z-transforms

Module-5 Probability distributions

Review of basic probability theory, Random variables-discrete and continuous Probability

distribution function, cumulative distribution function, Mathematical Expectation, mean and
variance, Binomial, Poisson,Exponential and Normal distribution (without proofs for mean and
SD) – Problems.
Sampling Theory: Introduction to sampling distributions, standard error, Type-I and Type-II
errors.Student’s t-distribution, Chi-square distribution as a test of goodness of fit.
Self-study: Test of hypothesis for means, single proportions only.

Course outcome (Course Skill Set)

At the end of the course, the student will be able to :
1. Understand that physical systems can be described by differential equations and solve
such equations
2. Make use of correlation and regression analysis to fit a suitable mathematical model for
statistical data
3. Demonstrate the Fourier series to study the behavior of periodic functions and their
applications in system communications, digital signal processing, and field theory.
4. To use Fourier transforms to analyze problems involving continuous-time signals and to
apply Z-Transform techniques to solve difference equations
5. Apply discrete and continuous probability distributions in analyzing the probability
models arising in the engineering field. Demonstrate the validity of testing the
hypothesis.

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Assessment Details (both CIE and SEE)

Continuous Internal Evaluation:

 There are 25 marks for the CIE's Assignment component and 25 for the Internal Assessment
Test component.
 Each test shall be conducted for 25 marks. The first test will be administered after 40-50% of
the coverage of the syllabus, and the second test will be administered after 85-90% of the
coverage of the syllabus. The average of the two tests shall be scaled down to 25 marks
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The schedule for assignments shall be
planned properly by the course teacher. The teacher should not conduct two assignments at the
end of the semester if two assignments are planned. Each assignment shall be conducted for 25
marks. (If two assignments are conducted then the sum of the two assignments shall be scaled
down to 25 marks)
 The final CIE marks of the course out of 50 will be the sum of the scale-down marks of tests and
assignment/s marks.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.

Suggested Learning Resources:

Books (Title of the Book/Name of the author/Name of the publisher/Edition and Year)
Text Books
1. B. S. Grewal: “Higher Engineering Mathematics”, Khanna Publishers, 44thEd., 2021.
2. E. Kreyszig: “Advanced Engineering Mathematics”, John Wiley & Sons, 10thEd., 2018.
Reference Books
1. V. Ramana: “Higher Engineering Mathematics” McGraw-Hill Education, 11th Ed., 2017
2. Srimanta Pal & Subodh C.Bhunia: “Engineering Mathematics” Oxford University Press,
3rdEd., 2016.
3. N.P Bali and Manish Goyal: “A Textbook of Engineering Mathematics” Laxmi
Publications, 10thEd., 2022.
4. C. Ray Wylie, Louis C. Barrett: “Advanced Engineering Mathematics” McGraw – Hill
Book Co., New York, 6th Ed., 2017.

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5. Gupta C.B, Sing S.R and Mukesh Kumar: “Engineering Mathematic for Semester I and
II”, Mc-Graw Hill Education(India) Pvt. Ltd 2015.
6. H.K. Dass and Er. Rajnish Verma: “Higher Engineering Mathematics” S.Chand
Publication, 3rd Ed.,2014.
7. James Stewart: “Calculus” Cengage Publications, 7thEd., 2019.

Web links and Video Lectures (e-Resources):

http://nptel.ac.in/courses.php?disciplineID=111
http://www.class-central.com/subject/math(MOOCs)
http://academicearth.org/
VTU e-Shikshana Program
VTU EDUSAT Program.
Activity Based Learning (Suggested Activities in Class)/ Practical Based Learning
Activity-Based Learning (Suggested Activities in Class)/Practical-Based Learning
 Quizzes
 Assignments
 Seminar

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18
Electric Circuit Analysis
IPCC Course Code 22EE302 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory +10 hrs (Lab) Total Marks 100
Credits 4 Credits Exam Hours 3 hrs
Course objectives:
 To familiarize the basic laws, source transformations, theorems and the methods of analyzing
electrical circuits.
 To explain the use of network theorems and the concept of resonance.
 To familiarize the analysis of three-phase circuits, two port networks and networks with non-
sinusoidal inputs.
 To explain the importance of initial conditions, their evaluation and transient analysis of R-L and R-C
circuits.
 To impart basic knowledge on network analysis using Laplace transforms.
Teaching-Learning Process (General Instructions)
These are sample Strategies; which teachers can use to accelerate the attainment of the various course outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative effective
teaching methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical
thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design
thinking skills such as the ability to design, evaluate, generalize, and analyse information rather
than simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world - and when that's possible, it helps
improve the students' understanding.

MODULE-1
Basic Concepts: Active and passive elements, Concept of ideal and practical
sources. star – delta transformation.
Analysis of networks by (i) Network reduction method including, (ii) Mesh and Node voltage methods
for ac and DC circuits with independent and dependent sources. Concept of Super-Mesh and Super node
analysis, Duality.
Teaching-Learning Process Chalk and Board, Problem based learning.
MODULE-2
Network Theorems: Super Position theorem, Thevenin’s theorem, Norton’s theorem, and
Maximum power transfer theorem. ( Problems with independent AC and DC sources only).
Teaching-Learning Process Chalk and Board, Problem based learning.
MODULE-3
Resonant Circuits: Analysis of simple series RLC and parallel RLC circuits under
resonances.
Problems on Resonant frequency, Bandwidth and Quality factor at resonance
Transient Analysis: Behavior of circuit elements under switching action, Evaluation of initial
conditions.
Transient analysis o f RL and RC circuits under DC excitations.
Teaching-Learning Process Chalk and Board, Problem based learning.

MODULE-4
Laplace Transformation: Laplace transformation (LT), Initial and Final value theorems. Solution of
electrical circuits using LT.
Teaching-Learning Process Chalk and Board, Problem based learning.
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19
MODULE 5

Unbalanced Three Phase Systems: Analysis of three phase systems ( 3-wire and 4 wire systems ),
calculation of real and reactive Powers.
Two Port networks: Definition, Open circuit impedance, Short circuit admittance and
Transmission parameters and their evaluation for simple circuits.

Teaching-Learning Process Chalk and Board, Problem based learning.

Practice (Laboratory) Part

Sl. Experiments
NO (to be carried out using discrete components)

1 Study of the effect of Open and Short circuits in simple circuits.

2 Determination of resonant frequency, bandwidth, and Q of a series circuit.
3 Determination of resonant frequency, bandwidth, and Q of a parallel circuit.
4 Verification of Thevenin’s theorem.
5 Verification of Norton’s theorem.
6 Verification of Superposition theorem.
7 Verification of maximum Power transfer theorem.
8 Power factor correction.
9 Measurement of time constant of an RC circuit.
10 Measurement of power in three phase Circuits using two watt meter method.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
1. Understand the basic concepts, basic laws and methods of analysis of DC and AC n e t w o r k s and
reduce the complexity of network using source shifting, source transformation a n d n e t w o r k
r e d u c ti o n u s i n g transformations.
2. Solve complex electric circuits using network theorems.
3. Discuss resonance in series and parallel circuits and also the importance of initial conditions
and their evaluation.
4. Synthesize typical waveforms using Laplace transformation.
5. Solve unbalanced three phase systems and also evaluate the performance of two port networks.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A
student shall be deemed to have satisfied the academic requirements and earned the credits allotted
to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
CIE for the theory component of IPCC
 IPCC means practical portion integrated with the theory of the course.
 CIE marks for the theory component are 25 marks and that for the practical component is 25
marks.
 25 marks for the theory component are split into 15 marks for two Internal Assessment Tests
(Two Tests, each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other
assessment methods mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the
syllabus and the second test after covering 85-90% of the syllabus.
 Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the
theory component of IPCC (that is for 25 marks).
 The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of IPCC
 15 marks for the conduction of the experiment and preparation of laboratory record, and 10
marks for the test to be conducted after the completion of all the laboratory sessions.
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20
 On completion of every experiment/program in the laboratory, the students shall be evaluated
including viva-voce and marks shall be awarded on the same day.
 The CIE marks awarded in the case of the Practical component shall be based on the continuous
evaluation of the laboratory report. Each experiment report can be evaluated for 10 marks. Marks
of all experiments’ write-ups are added and scaled down to 15 marks.
 The laboratory test (duration 02/03 hours) after completion of all the experiments shall be
conducted for 50 marks and scaled down to 10 marks.
 Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory
component of IPCC for 25 marks.
 The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the
IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion
will have a CIE component only. Questions mentioned in the SEE paper may include
questions from the practical component.

Suggested Learning Resources:

1. Engineering Circuit Analysis, William H Hayt et al, Mc Graw Hill,8th Edition,2014.
2. Network Analysis, M.E. Vanvalkenburg, Pearson, 3rd Edition,2014.
3. Fundamentals of Electric Circuits, Charles K Alexander Matthew N O Sadiku, Mc Graw Hill, 5th
Edition, 2013.

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

Activity Based Learning, Quizzes, Seminars.
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Analog Electronic Circuits

Course Code BEE303 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8-10 Lab slots Total Marks 100
Credits 04 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
 To provide the knowledge for the analysis of transistor biasing and thermal stability circuits.
 To develop skills to design the electronic circuits like amplifiers, power amplifiers and oscillators.
 To understand the importance of FET and MOSFET and FET/MOSFET amplifiers

Teaching-Learning Process (General Instructions)

MODULE-1
Diode Circuits: Diode clipping and clamping circuits.
Transistor Biasing and Stabilization:
The operating point, load line analysis, DC analysis and design of fixed bias circuit, emitter stabilized
bias circuit, collector to base bias circuit, voltage divider bias circuit, modified DC bias with voltage
feedback.
Bias stabilization and stability factors for fixed bias circuit, collector to base bias circuit and voltage
divider bias circuit, bias compensation, Transistor switching circuits.
MODULE-2
Transistor at Low Frequencies:
Hybrid model, h-parameters for CE, CC and CB modes, mid-band analysis of single stage amplifier,
simplified hybrid model, analysis for CE, CB and CC(emitter voltage follower circuit) modes, Millers
Theorem and its dual, analysis for collector to base bias circuit and CE with un bypassed emitter
resistance.
Transistor frequency response:
General frequency considerations, effect of various capacitors on frequency response, Miller effect
capacitance, high frequency response, hybrid - pi model, CE short circuit current gain using hybrid pi
model, multistage frequency effects.
MODULE-3
Multistage amplifiers:
Cascade connection , analysis for CE-CC mode, CE-CE mode, CASCODE stage-unbypassed and bypassed
emitter resistance modes, Darlington connection using h-parameter model.
Feedback Amplifiers:
Classification of feedback amplifiers, concept of feedback, general characteristics of negative feedback
amplifiers, Input and output resistance with feedback of various feedback amplifiers, analysis of
different practical feedback amplifier circuits.

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MODULE-4
Power Amplifiers:
Classification of power amplifiers, Analysis of class A, Class B, class C and Class AB amplifiers, Distortion
in power amplifiers, second harmonic distortion, harmonic distortion in Class B amplifiers, cross over
distortion and elimination of cross over distortion.
Oscillators:
Concept of positive feedback, frequency of oscillation for RC phase oscillator, Wien Bridge oscillator,
Tuned oscillator circuits, Hartley oscillator, Colpitt’s oscillator , crystal oscillator and its types.
MODULE-5
FETs:
Construction, working and characteristics of JFET and MOSFET( enhance and Depletion type)
Biasing of JFET and MOSFET. Fixed bias configuration, self bias configuration, voltage divider biasing.
Analysis and design of JFET (only common source configuration with fixed bias) and MOSFET
amplifiers.

PRACTICAL COMPONENT OF IPCC

Sl.NO Experiments
1 Experiments on series, shunt and double ended clippers and clampers.

2 Design, simulation and Testing of Full wave – centre tapped transformer type and Bridge type
rectifier circuits with and without Capacitor filter. Determination of ripple factor, regulation
and efficiency.
3
Static Transistor characteristics for CE, CB and CC modes and determination of h parameters.
4 Frequency response of single stage BJT and FET RC coupled amplifier and determination of
half power points, bandwidth, input and output impedances.
5
Design and testing of BJT -RC phase shift oscillator for given frequency of oscillation.
6 Design, simulation (MATLAB) and testing of Wien bridge oscillator for given frequency of
oscillation
7
Design and testing of Hartley and Colpitt’s oscillator for given frequency of oscillation
8 Determination of gain, input and output impedance of BJT Darlington emitter follower with
and without bootstrapping.
9 Design and testing of Class A and Class B power amplifier and to determine conversion
efficiency.
10 Design and simulation of Full wave – centre tapped transformer type and Bridge type rectifier
circuits with and without Capacitor filter using MATLAB. Determination of ripple factor,
regulation and efficiency.
Course outcomes (Course Skill Set):
At the end of the course, the student will be able to:
1. Utilize the characteristics of transistor for different applications.
2. Design and analyze biasing circuits for transistor.
3. Design, analyze and test transistor circuitry as amplifiers and oscillators
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the
SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be
deemed to have satisfied the academic requirements and earned the credits allotted to each subject/
course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE
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(Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.

CIE for the theory component of the IPCC (maximum marks 50)
 IPCC means practical portion integrated with the theory of the course.
 CIE marks for the theory component are 25 marks and that for the practical component is 25
marks.
 25 marks for the theory component are split into 15 marks for two Internal Assessment Tests (Two
Tests, each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other
assessment methods mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the
syllabus and the second test after covering 85-90% of the syllabus.
 Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the
theory component of IPCC (that is for 25 marks).
 The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC

 15 marks for the conduction of the experiment and preparation of laboratory record, and 10 marks
for the test to be conducted after the completion of all the laboratory sessions.
 On completion of every experiment/program in the laboratory, the students shall be evaluated
including viva-voce and marks shall be awarded on the same day.
 The CIE marks awarded in the case of the Practical component shall be based on the continuous
evaluation of the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of
all experiments’ write-ups are added and scaled down to 15 marks.
 The laboratory test (duration 02/03 hours) after completion of all the experiments shall be
conducted for 50 marks and scaled down to 10 marks.
 Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory
component of IPCC for 25 marks.
 The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the
IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scoredby the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will
have a CIE component only. Questions mentioned in the SEE paper may include questions from
the practical component.
Suggested Learning Resources:
Text Books
1. Electronic Devices and Circuit Theory, Robert L Boylestad Louis Nashelsky, Pearson, 11th Edition, 2015
2. Electronic Devices and Circuits, Millman and Halkias, Mc Graw Hill, 4 th Edition, 2015
3. Electronic Devices and Circuits, David A Bell, Oxford University Press, 5th Edition, 2008

Reference Books
1. Microelectronics CircuitsAnalysis and Design, Muhammad Rashid, Cengage Learning, 2nd Edition, 2014

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2. A Text Book of Electrical Technology, Electronic Devices and Circuits, B.L. Theraja, A.K. Theraja, S. Chand,
Reprint, 2013
3. Electronic Devices and Circuits, Anil K. Maini, ,VashaAgarval, Wiley, 1st Edition, 2009
4. Electronic Devices and Circuits, S. Salivahanan, Suresh, Mc Graw Hill, 3rd Edition, 2013
5. Fundamentals of Analog Circuits, Thomas L Floyd, Pearson, 2nd Edition, 2012
Web links and Video Lectures (e-Resources):
www.nptel.ac.in
https://www.ti.com/design-resources/design-tools-simulation/analog-circuits/overview.html
https://www.analog.com/en/education/education-library/tutorials/analog-electronics.html

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Transformers and Generators

Course Code BEE304 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
 To understand the construction, working and various tests of single phase Transformer.
 To understand the construction, working and parallel operation of three phase Transformer.
 To understand the construction, working and analysis of Synchronous Generator.
 To understand the construction, working of solar and wind power generators .

Teaching-Learning Process (General Instructions)

These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative effective teaching
methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design
thinking skills such as the ability to design, evaluate, generalize, and analyze information rather than
simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world-and when that's possible, it helps improve
the students' understanding.
Module-1
Single phase Transformers:
Necessity of transformer, principle of operation, Types and construction, EMF equation, equivalent
circuit, Operation of practical transformer under no-load and on-load with phasor diagrams. Losses
and methods of reducing losses, efficiency and condition for maximum efficiency. Polarity test,
Sumpner’s test.
Open circuit and Short circuit tests, calculation of equivalent circuit parameters. Predetermination
of efficiency, voltage regulation and its significance. Numerical.
Module-2
Three-phase Transformers: Introduction, Constructional features of three-phase transformers.
Transformer connection for three phase operation– star/star, delta/delta and star/delta,
comparative features. Labelling of three-phase transformer terminals.
Parallel Operation of Transformers: Necessity of Parallel operation, conditions for parallel
operation– Single phase and three phase. Load sharing in case of similar and dissimilar
transformers. Numerical.
Auto transformers and Tap changing transformers: Introduction to autotransformer-copper
economy, equivalent circuit, no load and on load tap changing transformers. Numerical.
Module-3
Synchronous Generators: Construction, working, Armature windings, winding factors, EMF
equation. Harmonics–causes, reduction and elimination. Armature reaction, Synchronous reactance,
Equivalent circuit.
Synchronous Generators Analysis: Open circuit and short circuit characteristics, Assessment of
reactance-short circuit ratio, Alternator on load. Voltage regulation. Voltage regulation by EMF and
MMF methods. Excitation control for constant terminal voltage. Numerical.
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Module-4
Synchronous Generators (Salient Pole): Effects of saliency, two-reaction theory, Parallel
operation of generators and load sharing. Methods of Synchronization, Synchronizing power.
Performance of Synchronous Generators: Power angle characteristic (salient and non salient
pole), power angle diagram, reluctance power, Capability curve for large turbo generators. Hunting
and damper windings. Numerical.
Module-5
Wind power Generator –Basic components of wind energy conversion system, types of wind
generators- Horizontal and vertical axis. Advantages and disadvantages of WECS.
Solar power generator - principle of solar cell, Basic Solar Photo voltaic, system for power
generation, Advantages and disadvantages.
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Explain the construction, working and various tests of single phase Transformer.
2. Explain the construction, working and parallel operation of three phase Transformer.
3. Explain the construction, working and analysis of Synchronous Generator.
4. Explain the construction, working of solar and wind power generators.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A
student shall be deemed to have satisfied the academic requirements and earned the credits allotted
to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.

Continuous Internal Evaluation:

 For the Assignment component of the CIE, there are 25 marks and for the Internal Assessment
Test component, there are 25 marks.
 The first test will be administered after 40-50% of the syllabus has been covered, and the
second test will be administered after 85-90% of the syllabus has been covered
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned.
 For the course, CIE marks will be based on a scaled-down sum of two tests and other methods of
assessment.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored sha ll be proportionally reduced to 50 marks.
Suggested Learning Resources:
Textbooks
1. Electric Machines, D. P. Kothari, et al, 4th Edition, 2011.
2. Electric Machines, Ashfaq Hussain, Dhanpat Rai & Co, 2nd Edition, 2013.
3. Non conventional Energy sources by G D Rai
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Reference Books
1. Electric Machines, Mulukuntla S. Sarma, at el, Cengage, 1st Edition, 2009.
2. Electrical Machines, Drives and Power systems, Theodore Wildi, Pearson, 6th Edition, 2014.
3. Principals of Electrical Machines, V.K Mehta, Rohit Mehta, S Chand, 2nd edition, 2009
Web links and Video Lectures (e-Resources):
 www.nptel.ac.in
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Template for Practical Course and if AEC is a practical Course
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Transformers and Generators Lab Semester III

Course Code BEEL305 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2 SEE Marks 50
Credits 01 Total Marks 100
Exam Hours 03
Examination nature (SEE) Practical
Course objectives:
 To conduct various tests on transformers and synchronous machines and evaluate their performance.
 To perform the parallel operation on two single phase transformers.
 To study and verify the performance of synchronous generator.
 To calculate the voltage regulation of an alternator using different methods for comparison.

Sl.NO Experiments
Open Circuit and Short circuit tests on single phase step up or step down transformer and
1
predetermination of (i) Efficiency and regulation (ii) Calculation of parameters for equivalent circuit.
Sumpner’s test on similar transformers and determination of combined and individual transformer
2
efficiency.
3 Parallel operation of two dissimilar single-phase transformers of different kVA and determination of load.
Polarity test and connection of 3 single-phase transformers in star – delta and determination of efficiency
4
and regulation under balanced resistive load.
Comparison of performance of 3 single-phase transformers in delta – delta and V – V (open delta)
5
connection under load.
6 Separation of hysteresis and eddy current losses in single phase transformer.
Investigate the voltage and current ratios of a multi-tapped transformer and verify the ideal transformer
7
ratio.
8 Voltage regulation of an alternator by EMF and MMF methods.

9 Power angle curve of synchronous generator or Direct load test on three phase synchronous generator to
determine efficiency and regulation.
10 Performance of synchronous generator connected to infinite bus, under constant power and variable
excitation & vice - versa.
11 Model transformer in Simscape for Automatic Voltage Regulation.
12 Simulate power angle curve of generator in MATLAB.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
1. Conduct various tests on transformers and synchronous machines and evaluate their performance.
2. Perform the parallel operation on two single phase transformers.
3. Verify the performance of synchronous generator.
4. Calculate the voltage regulation of an alternator using different methods for comparison.
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Template for Practical Course and if AEC is a practical Course
22.07.2023

Assessment Details (both CIE and SEE)

Continuous Internal Evaluation (CIE):

CIE marks for the practical course are50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment is to be evaluated for conduction with an observation sheet and record
write-up. Rubrics for the evaluation of the journal/write-up for hardware/software
experiments are designed by the faculty who is handling the laboratory session and are
made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment
write-up will be evaluated for 10 marks.
 Total marks scored by the students are scaled down to 30 marks (60% of maximum
marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct a test of 100 marks after the completion of all the experiments
listed in the syllabus.
 In a test, test write-up, conduction of experiment, acceptable result, and procedural
knowledge will carry a weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning
ability.
 The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the
total CIE marks scored by the student.
Semester End Evaluation (SEE):
 SEE marks for the practical course are 50 Marks.
 SEE shall be conducted jointly by the two examiners of the same institute, examiners are
appointed by the Head of the Institute.
 The examination schedule and names of examiners are informed to the university before
the conduction of the examination. These practical examinations are to be conducted
between the schedule mentioned in the academic calendar of the University.
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer
script to be strictly adhered to by the examiners. OR based on the course requirement
evaluation rubrics shall be decided jointly by examiners.
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Template for Practical Course and if AEC is a practical Course
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 Students can pick one question (experiment) from the questions lot prepared by the
examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted
jointly by examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure
and result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated
for 100 marks and scored marks shall be scaled down to 50 marks (however, based on
course type, rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part
are to be made zero.
The minimum duration of SEE is 02 hours
Suggested Learning Resources:

 www.nptel.ac.in
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DIGITAL LOGIC CIRCUITS Semester III

Course Code BEE 306A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8-10 Lab slots Total Marks 100
Credits 04 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
 To illustrate simplification of algebraic equations using Karnaugh Maps and Quine-McClusky methods
 To design decoders, encoders, digital multiplexer, adders, subtractors and binary comparators
 To explain latches and flip-flops , registers and counters
 To analyze Melay ad Moore Models
 To develop state diagrams synchronous sequential circuits
 To understand the applications of sequential circuits

Teaching-Learning Process (General Instructions)

These are sample Strategies; that teachers can use to accelerate the attainment of the various course outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative effective teaching
methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design thinking
skills such as the ability to design, evaluate, generalize, and analyze information rather than simply recall
it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world-and when that's possible, it helps improve
the students' understanding.
MODULE-1
Principles of Combinational Logic: Definition of combinational logic, canonical forms, Generation of
switching equations from truth tables, Karnaugh maps-3,4,5 variables, Incompletely specified functions
(Don‘t care terms) Simplifying Max term equations, Quine-McCluskey minimization technique, Quine-
McCluskey using don‘t care terms, Reduced prime implicants Tables.
MODULE-2
Analysis and Design of Combinational logic: General approach to combinational logic design,
Decoders, BCD decoders, Encoders, digital multiplexers, Using multiplexers as Boolean function
generators, Adders and subtractors, Cascading full adders, Look ahead carry, Binary comparators.
MODULE-3
Flip-Flops: Basic Bistable elements, Latches, Timing considerations, The master-slave flip-flops (pulse
triggered flip-flops): SR flip-flops, JK flip-flops, Edge triggered flip- flops, Characteristic equations.
MODULE-4
Flip-Flops Applications: Registers, binary ripple counters, synchronous binary counters, Counters
based on shift registers, Design of a synchronous counter, Design of a synchronous mod-n counter using
clocked T, JK, D and SR flip-flops.
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MODULE-5
Sequential Circuit Design: Mealy and Moore models, State machine notation, Synchronous Sequential
circuit analysis, Construction of state diagrams, counter design. Memories: Read only and Read/Write
Memories, Programmable ROM, EPROM, Flash memory.

PRACTICAL COMPONENT OF IPCC

Sl.NO Experiments
1 Simplification and realization of Boolean expressions using logic gates/Universal gates.
2
Realization of half/full adder and half/full subtractors using logic gates.
3 Realization of parallel adder/subtractors using 7483 chip- BCD to Excess-3 code conversion and
Vice - Versa.
4
Design and implementation of 1-bit and 2-bit comparators using basic gates
5
Design and implementation of half/full adder and half/full subtractors using IC 74153
6 To realize the following flip-flops using NAND gates
S-R flip-flop, D&T flip-flop
7 To realize the following flip-flops using IC7476
master-slave JK flip-flop
8 Realize the following shift registers using IC7495
a)Ring counter b)Johnson Counter
9 Realize the following shift registers using IC7495
a)SISO b)SIPO c)PISO d)PIPO
10 To design and implement:
a)mod-N synchronous UP counter and down counter using 7476 JK Flip-Flop
b)mod-N counter using IC 7490/7476
c)synchronous counter using IC 74192
Course outcomes (Course Skill Set):
At the end of the course, the student will be able to:
 Explain the concept of combinational and sequential logic circuits
 Analyse and design combinational circuits
 Describe and characterize flip flops and its applications
 Design the sequential circuits using SR, JK, D and T flip-flops and Melay and Moore applications
 Design applications of combinational and sequential circuits
 Employ the digital circuits for different applications
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the
SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be
deemed to have satisfied the academic requirements and earned the credits allotted to each subject/
course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE
(Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.
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 15 marks for the conduction of the experiment and preparation of laboratory record, and 10 marks
for the test to be conducted after the completion of all the laboratory sessions.
 On completion of every experiment/program in the laboratory, the students shall be evaluated
including viva-voce and marks shall be awarded on the same day.
 The CIE marks awarded in the case of the Practical component shall be based on the continuous
evaluation of the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of
all experiments’ write-ups are added and scaled down to 15 marks.
 The laboratory test (duration 02/03 hours) after completion of all the experiments shall be
conducted for 50 marks and scaled down to 10 marks.
 Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory
component of IPCC for 25 marks.
 The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the
IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scoredby the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will
have a CIE component only. Questions mentioned in the SEE paper may include questions from
the practical component.
Suggested Learning Resources:
Books
1) John M Yarbrough , Digital logic applications and design, Thomson Learning, 2001.
2)Donald D Givone, Digital Principles and design, MC Graw Hill 2002
3)Charles H Roth Jr, Larry L Kinney, Fundamentals of logic design , Cengage Learning, 7th Edition
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Reference books:
1)D.P.Kothari and J S Dhillon, -Digital circuits and design, Pearson, 2016
2)Morris Mano, Digital Design, PHI, 3rd edition
3)K.A. Navas, Electronics Lab Manual, Vol.1, PHI 5th edition, 2015.
Web links and Video Lectures (e-Resources):
 https://onlinecourses.nptel.ac.in/noc20_ee32/preview
 YouTube videos on digital electronics
 National Instruments: https://education.ni.com/teach/resources/1104/digital-electronics
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 To develop mini projects on digital electronics
 Simple applications like Smart Digital School Bell With Timetable Display, Stop and Go Queue Entry
Manager System, Digital Car Turning and Braking Indicator, Digital Nameplate with Visitor Sensing,
electronic watch dog etc
 Applications based on PLAs, FPGA, CPLD etc
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Electrical Measurements and Instrumentation Semester III

Course Code BEE306B CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
 To understand the significance and methods of Measurements, elements of generalised
measurement system and errors in measurements.
 To measure resistance, inductance, capacitance by use of different bridges.
 To study the construction, working and characteristics of various instrument transformers.
 To have the working knowledge of electronic instruments and display devices.

Teaching-Learning Process (General Instructions)

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characteristics of PT, reduction of errors in PT.
Magnetic measurements: Introduction, measurement of flux/ flux density, magnetising force and
leakage factor.
Module-4
Electronic and Digital Instruments: Introduction. Essentials of electronic instruments, Advantages of
electronic instruments. True RMS reading voltmeter. Electronic multimeters. Digital voltmeters (DVM) -
Ramp type DVM, Integrating type DVM and Successive - approximation DVM. Q meter. Principle of
working of electronic energy meter (with block diagram), extra features offered by present day meters and
their significance in billing.
Module-5
Display Devices: Introduction, character formats, segment displays, Dot matrix displays, Bar graph
displays. Cathode ray tubes, Light emitting diodes, Liquid crystal displays, Nixes, Incandescent,
Fluorescent, Liquid vapour and Visual displays.
Recording Devices: Introduction, Strip chart recorders, Galvanometer recorders, Null balance recorders,
Potentiometer type recorders, Bridge type recorders, LVDT type recorders, Circular chart and
xy recorders. Digital tape recording, Ultraviolet recorders. Electro Cardio Graph (ECG).
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Explain the significance and methods of Measurements, elements of generalised measurement
system and errors in measurements.
2. Measure resistance, inductance and capacitance by different methods.
3. Explain the construction, working and characteristics of various instrument transformers.
4. Explain the working of different electronic instruments and display devices.

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Assessment Details (both CIE and SEE)

Continuous Internal Evaluation:

Suggested Learning Resources:

Text Books
1. Electrical and Electronic Measurements and Instrumentation, A.K. Sawhney, Dhanpat Rai & Co,
10th Edition
2. A Course in Electronics and Electrical Measurements and Instrumentation, J. B. Gupta, Katson
Books, 2013

Reference Books
1. Electrical and Electronic Measurements and Instrumentation, R.K. Rajput, S Chand, 5th Edition,
2012
2. Electrical Measuring Instruments and Measurements, S.C. Bhargava, BS Publications, 2013
3. Modern Electronic Instrumentation and Measuring Techniques, Cooper D and A.D. Heifrick,
Pearson, First Edition, 2015
4. Electronic Instrumentation and Measurements, David A Bell, Oxford University, 3rd Edition,
2013
5. Electronic Instrumentation, H.S.Kalsi, Mc Graw Hill, 3rd Edition,2010

Web links and Video Lectures (e-Resources):

 www.nptel.ac.in
 https://www.eeweb.com/

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PHYSICS OF ELECTRONIC DEVICES Semester III22.07.2023

Course Code BEE306D CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Hours Theory Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
This course will enable students to
 Understand the basics of semiconductor physics and electronic devices
 Describe the mathematical models BGTs and FETs along with the constructional details
 Understand the construction and working principles of optoelectronic devices
 Understand the fabrication process of semiconductor devices and CMOS process integration

Teaching-Learning Process (General Instructions)

Module-4 22.07.2023
Field Effect Transistors:
Basic PN JFET operation, equivalent circuit and frequency limitation, MOSFET two terminal MOS
structure, energy band diagram, ideal capacitance voltage characteristics and frequency effects,
basic MOSFET operation, MOSFET structure, current-voltage characteristics
Text 2)9.1.1, 9.4, 9.6.1 - 9.6.2, 9.7.1-9.7.2, 9.8.1-9.8.2
Module-5
Fabrication of PN junction:
Thermal oxidation, diffusion, rapid thermal processing, Ion implantation, chemical vapour
deposition, photolithography, etching, metallization
(Text 1)5.1
Integrated Circuits:
Background, evolution of ICs, CMOS process integration, integration of other circuit elements
(Text 1)9.1-9.2, 9.3.1, 9.3.3.
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Understand the principles of semiconductor physics
2. Understand the principles and characteristics of different types of semiconductor devices
3. Understand the fabrication process of semiconductor devices
4. Utilize the mathematical models of MOS transistors for circuits and systems
5. Identify the mathematical models of MOS transistors for circuits and systems
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Assessment Details (both CIE and SEE) 22.07.2023

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A
student shall be deemed to have satisfied the academic requirements and earned the credits allotted
to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.
Continuous Internal Evaluation:
 For the Assignment component of the CIE, there are 25 marks and for the Internal Assessment
Test component, there are 25 marks.
 The first test will be administered after 40-50% of the syllabus has been covered, and the
second test will be administered after 85-90% of the syllabus has been covered
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based then
only one assignment for the course shall be planned. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned.
 For the course, CIE marks will be based on a scaled-down sum of two tests and other methods of
assessment.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s taxonomy
as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.

Suggested Learning Resources:

Text Books:
1)Ben. G. Streetman, Sanjay Kumar Banerjee, “Solid State Electronic Devices”, 7th Edition, Pearson
Education 2016, ISBN 978-93-325-5508-2
2)Donald A Neamen, Dhrubes Biswas, “Semiconductor physics and Devices”, 4th Edition, MC Graw
Hill Education 2012, ISBN 978-0-07-107010-2
Reference Books:
1)S.M. Sze, Kwok K Ng, “Physics of semiconductor devices”, 3rd edition, Wiley 2018.
2)Adir Bar-Lev, “Semiconductor and electronic devices”, 3rd Edition , PHI, 1993.
Web links and Video Lectures (e-Resources):
 NPTEL lecturers on semiconductor physics:
https://archive.nptel.ac.in/courses/108/108/108108122/
 Undergraduate course on semiconductor physics ;https://www.udemy.com/course/semiconductor-
device-physics-an-introduction/
 You tube videos on semiconductor physics
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Applications of optoelectronics devices
 Applications and basics of microelectronic fabrication
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Scilab / MATLAB for Transformers & Generators

Course Code BEEL358A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 02
Course objectives:
(1) Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience and repeat
any number of times to understand the concept.
(2) Provide unhindered access to perform whenever the students wish.
(3) Vary different parameters to study the behavior of the circuit without the risk of damaging equipment/device
or injuring themselves.
Sl. Experiments
NO
1 Open Circuit and Short circuit tests on single phase step up or step down transformer and
predetermination of (i) Efficiency and regulation (ii) Calculation of parameters of equivalent circuit.
2 Sumpner’s test on similar transformers and determination of combined and individual transformer
efficiency.
3 Parallel operation of two dissimilar single-phase transformers of different kVA and determination
of load sharing and analytical verification given the Short circuit test data.
4 Separation of hysteresis and eddy current losses in single phase transformer.
5 Voltage regulation of an alternator by EMF and MMF methods.
6 Voltage regulation of an alternator by ZPF method.
7 Power angle curve of synchronous generator.
8 Slip test – Measurement of direct and quadrature axis reactance and predetermination of regulation
of salient pole synchronous machines.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
 Analyse in an intelligent manner, think better, and perform better.
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Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall be deemed
to have satisfied the academic requirements and earned the credits allotted to each course. The student has to
secure not less than 35% (18 Marks out of 50) in the semester-end examination(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments designed by the faculty who is
handling the laboratory session and is made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
 Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week of the
semester and the second test shall be conducted after the 14th week of the semester.
 In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability. Rubrics
suggested in Annexure-II of Regulation book
 The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is the total
CIE marks scored by the student.

Semester End Evaluation (SEE):

 SEE marks for the practical course is 50 Marks.
 SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by
the University
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointly by examiners.
 Students can pick one question (experiment) from the questions lot prepared by the internal /external
examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by
examiners. General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction
procedure and result in - 60%, Viva-voce 20% of maximum marks. SEE for practical shall be
evaluated for 100 marks and scored marks shall be scaled down to 50 marks (however, based on course
type, rubrics shall be decided by the examiners)
 Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero. The duration of SEE is 03 hours.
 Rubrics suggested in Annexure-II of Regulation book.
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555 IC Laboratory
Course Code BEEL358B CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 02
Course objectives:
(1) Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience and repeat
any number of times to understand the concept.
(2) Provide unhindered access to perform whenever the students wish.
(3) Vary different parameters to study the behaviour of the circuit without the risk of damaging
equipment/device or injuring themselves.
Sl. Experiments
NO
1 Construct Astable Multivibrator circuit using IC-555 Timer.
2 Construct Mono-stable Multivibrator circuit using IC-555 Timer.
3 Construct and test Sequential timer using IC-555.
4 Generate Pulse Width Modulator (PWM) signal using IC-555 Timer.
5 Construct Burglar Alarm circuit using IC-555 Timer.
6 Construct and generate Frequency Shift Keying (FSK) signal using IC-555 Timer.
7 Construct and test Running LED circuit using IC-555 Timer.
8 Construct water level indicator using IC-555 Timer.
9 Construct continuity tester using IC-555 Timer.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
 Analyse in an intelligent manner, think better, and perform better.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall be deemed
to have satisfied the academic requirements and earned the credits allotted to each course. The student has to
secure not less than 35% (18 Marks out of 50) in the semester-end examination(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments designed by the faculty who is
handling the laboratory session and is made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
 Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week of the
semester and the second test shall be conducted after the 14th week of the semester.
 In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
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 The suitable rubrics can be designed to evaluate each student’s performance and learning ability. Rubrics
suggested in Annexure-II of Regulation book
 The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
 The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is
the totalCIE marks scored by the student.
 Semester End Evaluation (SEE):
 SEE marks for the practical course is 50 Marks.
 SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by
theUniversity
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointlyby examiners.
 Students can pick one question (experiment) from the questions lot prepared by the internal /external
examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result
in - 60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and
scored marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be
decided by theexaminers)
 Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero.The duration of SEE is 03 hours
 Rubrics suggested in Annexure-II of Regulation book.
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Circuit Laboratory using P-spice
Course Code BEEL358C CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 02
Course objectives:
(1) Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience and repeat
any number of times to understand the concept.
(2) Provide unhindered access to perform whenever the students wish.
(3) Vary different parameters to study the behaviour of the circuit without the risk of damaging equipment/ device
or injuring themselves.
Sl. Experiments
NO
1 Simulate Series RL & RC circuit and observe phase difference between waveforms of voltage and current.
2 Simulation and verification of Kirchhoff’s Current Law & Kirchhoff’s Voltage Law.
3 Simulation of Mesh analysis for a given circuit.
4 Simulation of Nodal analysis for a given circuit.
5 Determination of Z & Y parameters of a given two-port network.
6 Simulate and verify Super Positions theorem.
7 Simulation and verification Reciprocity theorem.
8 Simulation and verification Thevenin’s and Norton’s theorem.
9 Simulation and verification Maximum Power Transfer theorem.
10 Simulation and verification Millman’s theorem.
11 Simulation of Series and Parallel Resonance circuit.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
 Analyse in an intelligent manner, think better, and perform better.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall be deemed
to have satisfied the academic requirements and earned the credits allotted to each course. The student has to
secure not less than 35% (18 Marks out of 50) in the semester-end examination(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments designed by the faculty who is
handling the laboratory session and is made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
 Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week of the
semester and the second test shall be conducted after the 14th week of the semester.
 In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
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 The suitable rubrics can be designed to evaluate each student’s performance and learning ability. Rubrics
suggested in Annexure-II of Regulation book
 The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is the total
CIE marks scored by the student.

Semester End Evaluation (SEE):

 SEE marks for the practical course is 50 Marks.
 SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by
theUniversity
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointlyby examiners.
 Students can pick one question (experiment) from the questions lot prepared by the internal /external
examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result
in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and
scoredmarks shall be scaled down to 50 marks (however, based on course type, rubrics shall be
decided by theexaminers)
 Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero.The duration of SEE is 03 hours
 Rubrics suggested in Annexure-II of Regulation book.
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ELECTRIC MOTORS Semester IV

Course Code BEE401 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory

Course objectives:
1 To study the constructional features of Motors and select a suitable drive for specific
Application.
2 To study the constructional features of Three Phase and Single phase induction Motors.
3 To study different test to be conducted for the assessment of the performance
characteristics of motors.
4 To study the speed control of motor by a different methods.
5 Explain the construction and operation of Synchronous motor and special motors.

Teaching-Learning Process (General Instructions)

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Module-3
Performance of Three-Phase Induction Motor: Phasor diagram of induction motor on no-load
and on load, equivalent circuit, losses, efficiency, No-load and blocked rotor tests. Performance
of the motor from the equivalent circuit. Cogging and crawling. High torque rotors-double cage
and deep rotor bars. Induction motor working as induction generator, construction and working
of doubly fed induction generator. (numerical as applicable)
Module-4
Starting and Speed Control of Three-Phase Induction Motors: Necessity of starter. Direct on
line, Star-Delta, and autotransformer starting. Rotor resistance starting. Speed control by
frequency.
Single-Phase Induction Motor: Double revolving field theory and principle of operation.
Construction and operation of split-phase, capacitor start and capacitor run and shaded pole
motors. Comparison of single phase motors and applications. (numerical as applicable)
Module-5
Synchronous Motor: Principle of operation, phasor diagrams, torque and torque angle, effect of
change in load, effect of change in excitation. V and inverted V curves. Synchronous condenser,
Other Motors: Construction and operation of Universal motor, AC servomotor, Linear induction
motor, PMSM, SRM and BLDC.
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1 Understand the construction and operation, characteristics, Testing of DC Motors and
determine losses and efficiency.
2 Understand the construction and operation, classification and types of Three phase
Induction motors.
3 Describe the performance characteristics and applications of three phase Induction motors.
4 Demonstrate and explain Speed Control methods of three phase induction motor and types
of single phase induction motors.
5 Understand the construction and operation, V and inverted V curves of synchronous motors.
6 Construction and operation of Universal motor, AC servomotor, Linear induction motor,
PMSM, SRM and BLDC motors.

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Assessment Details (both CIE and SEE)

The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam
(SEE) is 50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks
out of 50) and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50
marks). A student shall be deemed to have satisfied the academic requirements and earned the
credits allotted to each subject/ course if the student secures a minimum of 40% (40 marks out of
100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End
Examination) taken together.
Continuous Internal Evaluation:
 For the Assignment component of the CIE, there are 25 marks and for the Internal
Assessment Test component, there are 25 marks.
 The first test will be administered after 40-50% of the syllabus has been covered, and the
second test will be administered after 85-90% of the syllabus has been covered
 Any two assignment methods mentioned in the 22OB2.4, if an assignment is project-based
then only one assignment for the course shall be planned. The teacher should not conduct two
assignments at the end of the semester if two assignments are planned.
 For the course, CIE marks will be based on a scaled-down sum of two tests and other methods
of assessment.
Internal Assessment Test question paper is designed to attain the different levels of Bloom’s
taxonomy as per the outcome defined for the course.
Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common
question papers for the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with
a maximum of 3 sub-questions), should have a mix of topics under that module.

Suggested Learning Resources:

Text Books
1. Electric Machines, D. P. Kothari, I. J. Nagrath, McGraw Hill, 4th edition, 2011.
2. Theory of Alternating Current Machines, Alexander Langsdorf, McGraw Hill, 2nd
Edition, 2001.
3. Electric Machines, AshfaqHussain, DhanpatRai& Co, 2nd Edition, 2013.

Reference Books
1. Electrical Machines, Drives and Power systems, Theodore Wildi, Pearson, 6th Edition,
2014
2. Electrical Machines, M.V. Deshpande, PHI Learning, 2013
3. Electric Machinery and Transformers, Bhag S. Guru at el, Oxford University Press, 3rd
Edition, 2012
4. Electric Machinery and Transformers, Irving Kosow, Pearson, 2nd Edition, 2012
5. Principles of Electric Machines and power Electronic, P.C.Sen, Wiley, 2nd Edition, 2013
6. Electrical Machines, R.K. Srivastava, Cengage Learning, 2nd Edition, 2013

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Web links and Video Lectures (e-Resources):

 https://nptel.ac.in
 http:// acl.digimat.in/nptel/courses/video/108105017/108105017.html

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

 Quizzes.
 Seminars.
 Cut sectional view of ac and dc motors
 Animated/NPTEL videos
 PPTs

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Transmission and Distribution Semester IV

Course Code BEE402 CIE Marks 50
Teaching Hours/Week (L: T:P: S) 4:0:0 SEE Marks 50
Total Hours of Pedagogy 50 Hours Total Marks 100
Credits 04 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
 To understand the structure of electrical power system, its components, advantages of high
voltage AC and DC transmission, various conductors used for transmission, sag and its
calculation.
 To understand various types of insulators, methods to improve string efficiency.
 To understand the various transmission line parameters, their effects on transmission of
electricity.
 To understand the various parameters that influences the performance of transmission line
and to calculate performance parameters of various transmission lines.
 To understand carona and its effects, underground cables, its construction, classification,
limitations and specifications.
 To understand and evaluate different types of distribution systems.

Teaching-Learning Process (General Instructions)

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Module-2
Line Parameters: Introduction to line parameters- resistance, inductance and capacitance. Calculation of
inductance of single phase and three phase lines with equilateral spacing, unsymmetrical spacing, double
circuit and transposed lines. Inductance of composite – conductors, geometric mean radius (GMR) and
geometric mean distance (GMD). Calculation of capacitance of single phase and three phase lines with
equilateral spacing, unsymmetrical spacing, double circuit and transposed lines. Capacitance of composite –
conductor, geometric mean radius (GMR) and geometric mean distance (GMD). Advantages of single circuit
and double circuit lines.
Module-3
Performance of Transmission Lines: Classification of lines – short, medium and long. Current and voltage
relations, line regulation and Ferranti effect in short length lines, medium length lines considering Nominal
T and nominal circuits, and long lines considering hyperbolic form equations. Equivalent circuit of a long
line. ABCD constants in all cases.
Module-4
Corona: Phenomena, disruptive and visual critical voltages, corona loss. Advantages and disadvantages of
corona. Methods of reducing corona.
Underground Cable: Types of cables, constructional features, insulation resistance, thermal rating, charging
current, grading of cables – capacitance and inter-sheath. Dielectric loss. Comparison between ac and DC
cables. Limitations of cables. Specification of power cables.
Module-5
Distribution: Primary AC distribution systems – Radial feeders, parallel feeders, loop feeders and
interconnected network system. Secondary AC distribution systems – Three phase 4 wire system and single
phase 2 wire distribution, AC distributors with concentrated loads. Effect of disconnection of neutral in a 3
phase four wire system.
Reliability and Quality of Distribution System: Introduction, definition of reliability, failure, probability
concepts, limitation of distribution systems, power quality, Reliability aids.

Course outcome (Course Skill Set)

At the end of the course, the student will be able to :
1. Explain the structure of electrical power system, its components, advantages of high voltage
AC and DC transmission, various conductors used for transmission, sag and its calculation.
2. Explain various types of insulators and methods to improve string efficiency.
3. Explain the various transmission line parameters, their effects on transmission of electricity.
4. Evaluate the parameters that influence the performance of transmission line and to
calculate performance parameters of various transmission lines.
5. Explain carona and its effects, underground cable and its construction, classification,
limitations and specifications.
6. Evaluate different types of distribution systems.

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Assessment Details (both CIE and SEE)

Continuous Internal Evaluation:

Suggested Learning Resources:

Text Books:
1. A Course in Electrical Power, Sony Gupta and Bhatnagar, Dhanpat Rai
2. Principles of Power System, V.K. Mehta, Rohit Mehta, S. Chand, 1st Edition 2013

Reference Books:
1. Power System Analysis and Design, J. Duncan Gloverat el, Cengage Learning, 4th Edition 2008
2. Electrical power Generation, Transmission and Distribution, S.N. Singh, PHI, 2nd Edition,2009
3. Electrical Power, S.L.Uppal, Khanna Publication
4. Electrical Power Systems, C. L. Wadhwa, New Age, 5th Edition, 2009
5. Electrical Power Systems, Ashfaq Hussain, CBS Publication
6. Electric Power Distribution, A.S. Pabla, McGraw-Hill, 6th Edition,2012
Web links and Video Lectures (e-Resources):
 www.nptel.ac.in

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Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Visit to Power Stations, Receiving Stations.
 Seminars

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Microcontrollers
Course Code BEE403 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:2:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Theory + 8-10 Lab slots Total Marks 100
Credits 04 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
At the end of the course the student will be able to:
1. To explain the internal organization and working of Computers, microcontrollers and embedded
processors.
2. Compare and contrast the various members of the 8051family.
3. To explain the registers of the 8051 microcontroller, manipulation of data using registers and MOV
instructions.
4. To explain in detail the execution of 8051 Assembly language instructions and data types
5. To explain loop, conditional and unconditional jump and call, handling and manipulation of I/O
instructions.
6. To explain different addressing modes of 8051, arithmetic, logic instructions, and programs.
7. To explain develop 8051C programs for time delay, I/O operations, I/O bit manipulation, logic.
8. To explain writing assembly language programs for data transfer, arithmetic, Boolean and logical
instructions.
9. To explain writing assembly language programs for code conversions.
10. To explain writing assembly language programs using subroutines for generation of delays, counters,
configuration of SFRs for serial communication and timers.
11. To perform interfacing of stepper motor and DC motor for controlling the speed.
12. To explain generation of different waveforms using DAC interface.

Teaching-Learning Process (General Instructions)

MODULE-2

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Assembly Programming and Instruction of 8051: Introduction to 8051 assembly programming,
Assembling and running an 8051 program, Data types and Assembler directives Arithmetic, logic
instructions and programs, Jump, loop and call instructions, IO port programming.

MODULE-3
8051 Programming in C: Data types and time delay in 8051C, IO programming in 8051C, Logic
operations in 8051 C, Data conversion program in 8051 C, Accessing code ROM space in 8051C, Data
serialization using 8051C.
8051 Timer Programming in Assembly and C: Programming 8051 timers, Counter programming,
Programming timers 0 and 1 in 8051 C.
MODULE-4
8051 Serial Port Programming in Assembly and C: Basics of serial communication, 8051 connection
to RS232, 8051 serial port programming in assembly, serial port programming in 8051 C.
8051 Interrupt Programming in Assembly and C: 8051 interrupts, Programming timer, external
hardware, serial communication interrupt, Interrupt priority in 8051/52, Interrupt programming in C.
MODULE-5
Interfacing: LCD interfacing, Keyboard interfacing.
ADC, DAC and Sensor Interfacing: ADC 0808 interfacing to 8051, Serial ADC Max1112 ADC interfacing
to 8051, DAC interfacing, Sensor interfacing and signal conditioning.
Motor Control: Relay, PWM, DC and Stepper Motor: Relays and opt isolators, stepper motor
interfacing, DC motor interfacing and PWM.
8051 Interfacing with 8255: Programming the 8255, 8255 interfacing, C programming for 8255.

PRACTICAL COMPONENT OF IPCC

Sl.NO Experiments
(to be carried out using discrete components)
Note: For the experiments 1 to 7, 8051 assembly programming is to be used.
1 Arithmetic instructions: Addition, subtraction, multiplication and division. Square using MATLAB/simulink.
2 Data transfer – Program for block data movement, sorting, exchanging, finding largest element in an array.
3 Up/Down BCD/ Binary Counters
4 Boolean and logical instructions (bit manipulation).
5 Code conversion programs – BCD to ASCII, ASCII to BCD, ASCII to decimal, Decimal to ASCII, Hexa.
6 Programs to generate delay, Programs using serial port and on-chip timer/counters.
Note: Single chip solution for interfacing 8051 is to be with C Programs for the following experiments.
7 Simulate and test a PWM controlled DC motor using Simscape.
8 Stepper motor interface for direction and speed control.
9 Alphanumerical LCD panel interface.
10 Generate different waveforms: Sine, Square, Triangular, Ramp using DAC interface.
Course outcomes (Course Skill Set):
At the end of the course, the student will be able to:
1. Outline the 8051 architecture, registers, internal memory organization, addressing modes.
2. Discuss 8051 addressing modes, instruction set of 8051, accessing data and I/O port programming.
3. Develop 8051C programs for time delay, I/O operations, I/O bit manipulation, logic and arithmetic
operations, data conversion and timer/counter programming.
4. Summarize the basics of serial communication and interrupts, also develop 8051 programs for serial data
communication and interrupt programming.
5. Program 8051to work with external devices for ADC, DAC, Stepper motor control, DC motor control
6. Develop various 8051 based projects.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.

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The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and for the
SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student shall be
deemed to have satisfied the academic requirements and earned the credits allotted to each subject/
course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of the CIE
(Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.

CIE for the theory component of the IPCC (maximum marks 50)
 IPCC means practical portion integrated with the theory of the course.
 CIE marks for the theory component are 25 marks and that for the practical component is 25 marks.
 25 marks for the theory component are split into 15 marks for two Internal Assessment Tests (Two
Tests, each of 15 Marks with 01-hour duration, are to be conducted) and 10 marks for other
assessment methods mentioned in 22OB4.2. The first test at the end of 40-50% coverage of the
syllabus and the second test after covering 85-90% of the syllabus.
 Scaled-down marks of the sum of two tests and other assessment methods will be CIE marks for the
theory component of IPCC (that is for 25 marks).
 The student has to secure 40% of 25 marks to qualify in the CIE of the theory component of IPCC.
CIE for the practical component of the IPCC

 15 marks for the conduction of the experiment and preparation of laboratory record, and 10 marks
for the test to be conducted after the completion of all the laboratory sessions.
 On completion of every experiment/program in the laboratory, the students shall be evaluated
including viva-voce and marks shall be awarded on the same day.
 The CIE marks awarded in the case of the Practical component shall be based on the continuous
evaluation of the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of
all experiments’ write-ups are added and scaled down to 15 marks.
 The laboratory test (duration 02/03 hours) after completion of all the experiments shall be
conducted for 50 marks and scaled down to 10 marks.
 Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory
component of IPCC for 25 marks.
 The student has to secure 40% of 25 marks to qualify in the CIE of the practical component of the
IPCC.
SEE for IPCC
Theory SEE will be conducted by University as per the scheduled timetable, with common question
papers for the course (duration 03 hours)
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a
maximum of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored by the student shall be proportionally scaled down to 50 Marks
The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will
have a CIE component only. Questions mentioned in the SEE paper may include questions from the
practical component.

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Suggested Learning Resources:
Books
1. The 8051 Microcontroller and Embedded Systems Using Assembly and C, Muhammad Ali Mazadi, Pearson, 2nd
Edition, 2008.
2. The 8051 Microcontroller, Kenneth Ayala, Cengage, 3rd Edition, 2005.
3. Microcontrollers: Architecture, Programming, Interfacing and System Design, Raj Kamal, Pearson, 1st Edition,
2012.
Web links and Video Lectures (e-Resources):
 NPTEL course on 8051 microcontrollers:https://nptel.ac.in/courses/108105102
 You tube videos on 8051 microccontrollers
 8051 programming online course: Complete 8051 Microcontroller Programming Course | Udemy

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

 Mini projects using 8051 microcontroller
 Seminars
 Quizzes
 Assignments

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Template for Practical Course and if AEC is a practical Course
22.07.2023

Electric Motors Lab Semester IV

Course Code BEEL404 CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2 SEE Marks 50
Credits 01 Total Marks 100
Exam Hours 03
Examination nature (SEE) Practical
Course objectives:
 To perform tests on DC Machines to determine their characteristics.
 To study the different control methods for DC Motors.
 To conduct test for pre-determination of the performance characteristics of DC Machines.
 To conduct load test on single-phase and three-phase Induction Motor.
 To conduct test on Induction Motor to determine performance characteristics.
 To conduct test on synchronous motor to draw performance curves.
Sl.NO Experiments

1 Load test on DC shunt motor to draw speed–torque and horse power–efficiency characteristics.

2 Field Test on DC series machines.

3 Speed control of DC shunt motor by armature and field control.

4 Swin burne's Test on DC motor.

5 Retardation test on DC shunt motor.

6 Regenerative test on DC shunt machines.

7 Load test on three phase induction motor.

No-load and Blocked rotor test on three phase induction motor to draw (i) equivalent circuit and (ii) circle
8
diagram. Determination of performance parameters at different load conditions.

9 Load test on induction generator.

Load test on single phase induction motor to draw output versus torque, current, power and efficiency
10
characteristics.
Conduct suitable tests to draw thee equivalent circuit of single phase induction motor and determine
11
performance parameters.
Conduct an experiment to draw V and Inverted V curves of synchronous motor at no load and load
12
conditions.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
1. Perform tests on DC Machines to determine their characteristics.
2. Control the DC Motors using different methods.
3. Pre-determination the performance characteristics of DC Machines.
4. Conduct load test on single-phase and three-phase Induction Motor and draw performance characteristics.
5. Conduct test on Induction Motor to determine performance characteristics.
6. Conduct test on synchronous motor to draw performance curves.
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Template for Practical Course and if AEC is a practical Course
22.07.2023

Assessment Details (both CIE and SEE)

Continuous Internal Evaluation (CIE):

 www.nptel.ac.in
21.07.2023
22.07.2023

Electrical Power Generation and Economics Semester IV

Course Code BEE405A CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
 To understand the basics of hydro electric power plant, merits and demerits of hydroelectric power
plants, site selection, arrangement and elements of hydro electric plant.
 To understand the working, site selection and arrangement of Steam, Diesel and Gas Power Plants.
 To understand the working, site selection and arrangement of Nuclear Power Plants.
 To understand importance of different equipments in substation, Interconnection of power stations and
different types of grounding.
 To understand the economics of power generation.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative effective teaching
methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design
thinking skills such as the ability to design, evaluate, generalize, and analyze information rather than
simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world-and when that's possible, it helps improve
the students' understanding.

Module-1
Hydroelectric Power Plants: Hydrology, run off and stream flow, hydrograph, flow duration
curve, Mass curve, reservoir capacity, dam storage. Hydrological cycle, merits and demerits of
hydroelectric power plants, Selection of site. General arrangement of hydel plant, elements of the
plant, Classification of the plants based on water flow regulation, water head and type of load the
plant has to supply. Water turbines – Pelton wheel, Francis, Kaplan and propeller turbines.
Characteristic of water turbines Governing of turbines, selection of water turbines.
Underground, small hydro and pumped storage plants. Choice of size and number of units, plant
layout and auxiliaries.
Module-2
Steam Power Plants: Introduction, Efficiency of steam plants, Merits and demerits of plants,
selection of site. Working of steam plant, Power plant equipment and layout, Steam turbines,
Fuels and fuel handling, Fuel combustion and combustion equipment, Coal burners, Fluidized bed
combustion, Combustion control, Ash handling, Dust collection, Draught systems, Feed water,
Steam power plant controls, plant auxiliaries.
Diesel Power Plant: Introduction, Merits and demerits, selection o f site, elements of diesel
power plant, applications.
Gas Turbine Power Plant: Introduction Merits and demerits, selection of site, Fuels for gas
turbines, Elements of simple gas turbine power plant, Methods of improving thermal efficiency
of a simple gas power plant, Closed cycle gas turbine power plants. Comparison of gas power plant
with steam and diesel power plants.
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Module-3
Nuclear Power Plants: Introduction, Economics of nuclear plants, Merits and demerits, selection
of site, Nuclear reaction, Nuclear fission process, Nuclear chain reaction, Nuclear energy, Nuclear
fuels, Nuclear plant and layout, Nuclear reactor and its control, Classification of reactors, power
reactors in use, Effects of nuclear plants, Disposal of nuclear waste and effluent, shielding.
Module-4
Substations: Introduction to Substation equipment; Transformers, High Voltage Fuses, High
Voltage Circuit Breakers and Protective Relaying, High Voltage Disconnect Switches, Lightning
Arresters, High Voltage Insulators and Conductors, Voltage Regulators, Storage Batteries, Reactors,
Capacitors, Measuring Instruments, and power line carrier communication equipment.
Classification of substations – indoor and outdoor, Selection of site for substation, Bus-bar
arrangement schemes and single line diagrams of substations.
Interconnection of power stations. Introduction to gas insulated substation, Advantages and
economics of Gas insulated substation.
Grounding: Introduction, Difference between grounded and ungrounded system. System
grounding – ungrounded, solid grounding, resistance grounding, reactance grounding, resonant
grounding. Earthing transformer. Neutral grounding and neutral grounding transformer.
Module-5
Economics: Introduction, Effect of variable load on power system, classification of costs, Cost
analysis. Interest and Depreciation, Methods of determination of depreciation, Economics of Power
generation, different terms considered for power plants and their significance, load sharing. Choice
of size and number of generating plants. Tariffs, objective, factors affecting the tariff, types. Types of
consumers and their tariff. Power factor, disadvantages, causes, methods of improving power
factor, Advantages of improved power factor, economics of power factor improvement and
comparison of methods of improving the power factor. Choice of equipment.
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Explain the basics of hydro electric power plant, merits and demerits of hydroelectric power plants,
site selection, arrangement and elements of hydro electric plant.
2. Explain the working, site selection and arrangement of Steam, Diesel and Gas Power Plants.
3. Explain the working, site selection and arrangement of Nuclear Power Plants.
4. Explain the importance of different equipments in substation, Interconnection of power stations and
different types of grounding.
5. Explain the economics of power generation.
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Assessment Details (both CIE and SEE)

Continuous Internal Evaluation:

Suggested Learning Resources:

Text Books
th
1. Power Plant Engineering, P.K. Nag, Mc Graw Hill, 4 Edition, 2014
2. Generation of Electrical Energy, B.R.Gupta, S. Chand, 2015
3. Electrical power Generation, Transmission and Distribution, S.N. Singh, PHI, 2nd Edition, 2009

Reference Books

1. A Course in Power Systems, J.B. Gupta, Katson, 2008

2. Electrical Power Distribution Systems, V. Kamaraju, McGrawHill, 1st Edition, 2009
3. A Text Book on Power SystemEngineering, A. Chakrabarti, et al, Dhanpath Rai, 2nd Edition, 2010
4. Electrical Distribution Engineering, Anthony J. Pansini, CRC Press, 3rd Edition, 2006
5. Electrical Distribution Systems, Dale R PatrickEt al, CRC Press, 2nd Edition, 2009

Web links and Video Lectures (e-Resources):

 www.nptel.ac.in
Activity Based Learning (Suggested Activities in Class)/ Practical Based learning
 Visit to power station.
 Walk through videos
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OPAMPS AND LIC Semester IV
Course Code BEE405B CIE Marks 50
Teaching Hours/Week (L: T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 hours Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
 To understand the basics of Linear ICs such as Op-amp, Regulator, Timer & PLL.
 To learn the designing of various circuits using linear ICs.
 To use these linear ICs for specific applications.
 To understand the concept and various types of converters.
 To use these ICs, in Hardware projects.
Teaching-Learning Process (General Instructions)
These are sample Strategies, which teachers can use to accelerate the attainment of the various course
outcomes.
1. Lecturer method (L) needs not to be only traditional lecture method, but alternative effective teaching
methods could be adopted to attain the outcomes.
2. Use of Video/Animation to explain functioning of various concepts.
3. Encourage collaborative (Group Learning) Learning in the class.
4. Ask at least three HOT (Higher order Thinking) questions in the class, which promotes critical thinking.
5. Adopt Problem Based Learning (PBL), which fosters students’ Analytical skills, develop design
thinking skills such as the ability to design, evaluate, generalize, and analyze information rather than
simply recall it.
6. Introduce Topics in manifold representations.
7. Show the different ways to solve the same problem with different circuits/logic and encourage the
students to come up with their own creative ways to solve them.
8. Discuss how every concept can be applied to the real world-and when that's possible, it helps improve
the students' understanding.
Module-1
Operational amplifiers: Introduction, Block diagram representation of a typical Op-amp,
schematicsymbol, characteristics of an Op-amp, ideal op-amp, equivalent circuit, ideal voltage
transfercurve,open loop configuration, differential amplifier, inverting & non –inverting amplifier,
Op-amp withnegative feedback ; voltage series feedback amplifier-gain, input resistance, output
resistance,voltage shunt feedback amplifier- gain, input resistance, output resistance.
General Linear Applications: D.C. & A.C amplifiers, peaking amplifier, summing, scaling &
averaging amplifier, inverting and non-inverting configuration, differential configuration,
instrumentation amplifier
Module-2
Active Filters: First & Second order high pass & low pass Butterworth filters, higher order filters,
Band pass filters, Band reject filters & all pass filters.
DC Voltage Regulators: voltage regulator basics, voltage follower regulator, adjustable output
regulator, LM317 & LM337 Integrated circuits regulators.
Module-3
Signal generators: Working and derivation of frequency of oscillation for Phase shift oscillator,
Wien bridge oscillator, square wave generator, sawtooth wave generator, triangular wave
generator, rectangular wave generator.
Comparators & Converters: Basic comparator, zero crossing detector, inverting & non-
invertingSchmitt trigger circuit, voltage to current converter with grounded load, current to
voltageconverterand basics of voltage to frequency and frequency to voltage converters.
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Module-4
Signal processing circuits: Precision half wave & full wave rectifiers limiting circuits, clamping
circuits, peak detectors, sample & hold circuits.
A/D & D/A Converters: Basics, R–2R D/A Converter, Integrated circuit 8-bit D/A, successive
approximation ADC, linear ramp ADC, dual slope ADC, digital ramp ADC
Module-5
Phase Locked Loop (PLL): Basic PLL, components, performance factors, applications of PLL IC
565. Timer: Internal architecture of 555 timer, Mono stable, Astable-multivibrators and
applications
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Explain the basics of linear ICs.
2. Design circuits using linear ICs.
3. Demonstrate the application of Linear ICs.
4. Use ICs in the electronic projects
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50)
and for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A
student shall be deemed to have satisfied the academic requirements and earned the credits allotted
to each subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum
total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken
together.

Continuous Internal Evaluation:

Semester-End Examination:
Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for
the course (duration 03 hours).
1. The question paper will have ten questions. Each question is set for 20 marks.
2. There will be 2 questions from each module. Each of the two questions under a module (with a maximum
of 3 sub-questions), should have a mix of topics under that module.
3. The students have to answer 5 full questions, selecting one full question from each module.
4. Marks scored shall be proportionally reduced to 50 marks.
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Suggested Learning Resources:
Books
1. Op-Amps and Linear Integrated Circuits, Ramakant A Gayakwad , Pearson, 4th Edition, 2015
2. Operational Amplifiers and Linear ICs, David A. Bell ,Oxford, 3rd Edition 2011
3. Linear Integrated Circuits , S. Salivahanan, et al, Wiley India , 2013
4. Op-Amps and Linear Integrated Circuits, Concept and Application, James M Fiore,
Cengage, 2009
Web links and Video Lectures (e-Resources):
 NPTEL course on opamps : https://nptel.ac.in/courses/108108114
 You tube videos on opamps and in Linear Integrated Circuits.

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

 To develop mini projects based on opamp
 To develop mini projects based on timer and PLL IC
 Seminars
 Quizzes
 Assignments
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Engineering Materials Semester IV

Course Code BEE405C CIE Marks 50
Teaching Hours/Week (L:T:P: S) 3:0:0:0 SEE Marks 50
Total Hours of Pedagogy 40 Total Marks 100
Credits 03 Exam Hours 03
Examination nature (SEE) Theory
Course objectives:
 To understand wave particle duality, tunnelling phenomenon, electron theory of metals.
 To understand the free electron theory of conduction in metals.
 To understand the polarization under static fields, behavior of dielectrics in alternating
fields, Inorganic materials, organic materials, ), resins and varnishes, liquid insulators.
 To understand the mechanism of conduction in semiconductors.
 To understand the magnetic materials, their classification and magneto materials.

Teaching-Learning Process (General Instructions)

INSULATING MATERIALS: Inorganic materials (mica, glass, porcelain, asbestos), organic

materials (paper, rubber, cotton silk fiber, wood, plastics and bakelite), resins and varnishes,
liquid insulators(transformer oil) gaseous insulators (air, SF6 and nitrogen) and ageing of
insulators.
Module-4
SEMICONDUCTORS
Mechanism of conduction in semiconductors, density of carriers in intrinsic semiconductors, the
energy gap, types of semiconductors. Hall effect, compound semiconductors, basic ideas of
amorphous and organic semiconductors.
Module-5
Magnetic materials
Magnetic materials: Classification of magnetic materials- origin of permanent magnetic dipoles,
ferromagnetism, Magnetic Domains: Domain structure, Domain Wall motion, Hysteresis loop, Eddy
current losses, Demagnetization, hard and soft magnetic materials, magneto materials used in
electrical machines, instruments and relays.
Course outcome (Course Skill Set)
At the end of the course, the student will be able to :
1. Explain wave particle duality, tunnelling phenomenon, electron theory of metals.
2. Explain the free electron theory of conduction in metals.
3. Explain the polarization under static fields, behavior of dielectrics in alternating fields,
Inorganic materials, organic materials, ), resins and varnishes, liquid insulators.
4. Explain the mechanism of conduction in semiconductors.
5. Explain the magnetic materials, their classification and magneto materials.

2
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Assessment Details (both CIE and SEE)

Continuous Internal Evaluation:

Suggested Learning Resources:

Books
1. Bhadra Prasad Pokharel and Nava Raj Karki,"Electrical Engineering Materials", Sigma offset Press,
Kamaladi, Kathmandu, Nepal,2004.
2. R.C. Jaeger, ”Introduction to Microelectronic Fabrication- Volume IV”, Addison Wesley publishing
Company,Inc., 1988.
3. Introduction to Electrical Engineering Materials 4th Edn. 2004 Edition by Indulkar C, S. Chand &
Company Ltd-New Delhi.
4. Electrical and Electronic Engineering Materials by SK Bhattacharya, Khanna Publishers, New Delhi.
Web links and Video Lectures (e-Resources):
 www.nptel.ac.in

Activity Based Learning (Suggested Activities in Class)/ Practical Based learning

 Seminars
 Quizzes

3
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BASICS OF –VHDL LAB Semester IV

Course Code BEE456A CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 03
Examination nature (SEE) Practical/Viva-Voce
Course objectives:

1. Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their
convenience and repeat any number of times to understand the concept.
2. Provide unhindered access to perform whenever the students wish.
3. Vary different parameters to study the behaviour of the circuit without the risk of
damaging equipment/device or injuring themselves.
Sl.NO Experiments

Note:
Programming can be done using any compiler. Download the programs on a FPGA/CPLD board and
performance testing may be done using 32 channel pattern generator and logic analyser, apart from
verification by simulation with tools such as Altera/Modelsim or equivalent

1 Write Verilog program for the following combinational design along with test bench to verify
the design:
a) 2 to 4 decoder realization using NAND gates only (structural model)
b) 8 to 3 encoder with priority encoder and without priority encoder (behavioral model)
c) 8 to 1 Multiplexer using case statement and if statement
d) 4 bit binary to gray code converter using 1 bit gray to binary converter 1 bit adder and
subtractor.

2 Model in Verilog for a full adder and add functionality to perform logical operations of XOR,
XNOR, AND and OR gates. Write test bench with appropriate input patterns to verify the
modelled behavior.
3 Verilog 32 bit ALU shown in figure below and verify the functionality of ALU by selecting
appropriate test patterns. The functionality of the ALU is shown in Table-1.
a) Write test bench to verify the functionality of the ALU considering all possible input
patterns
b) The enable signal will set the output to required functions if enabled, if disabled all the
outputs are set to tri-state.
c) The acknowledge signal is set high after every operation is complete.
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ALU Top Level Diagram

Table -1 ALU functions:

4 Write Verilog code for SR, D and JK and verify the flip flop

5 Write Verilog code for 4 bit BCD synchronous counter

6 Write Verilog code for counter with given input clock and check whether it works as clock
divider performing division of clock by 2, 4, 8 and 16 . Verify the functionality of the code.
PART B
Note;
Interfacing and Debugging:
(ED) WinXp, PSpice, MultiSim, Proteus, CircuitLab, or any other equivalent tool can
be used.

Demonstration Experiments ( For CIE )

7 Write a Verilog code to design a clock divider circuit that generates ½, 1/3rd, 1/4th ,clock from
given input clock . Port the design to FPGA and validate the functionality through CRO.
8 Interface a DC motor to FPGA and write Verilog code to change its speed and direction

9 Interface a stepper motor to FPGA and write Verilog code to control the stepper motor rotation
which in turn may control a Robatic arm. External switches to be used for different controls
like rotate the stepper motor:
a)+ N steps if the switch number 1 of a DIP switch is closed.
b)+N/2 steps if switch number 2 of a DIP switch is closed.
c)-N steps if switch number 3 of a DIP switch is closed etc.
10 Interface a DAC to FPGA and write Verilog code to generate a sine wave of frequency f KHz, ex f
= 100 KHz, or 200 KHz etc, . Modify the code to down sample the frequency to f/2 KHz.
Display the original and down sampled signals by connecting them to CRO.
11 Write Verilog code using FSM to simulate elevator operation.

12 Write Verilog code to convert an analog input signal of a sensor to digital form and to display
the same on a suitable display like simple set of LEDs , 7 segment display digits or LCD display
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Course outcomes (Course Skill Set):

At the end of the course the student will be able to:

1. Write the VHDL/Verilog programs to simulate combinational circuits in data flow, behavioral, gate
level abstractions.
2. Describe sequential circuits like flip-flops, counters, in behavioral descriptions and obtain simulated
waveforms.
3. Use FPGA/CPLD kits for downloading Verilog codes and check output.
4. Synthesize combinational and sequential circuits on programmable ICs and test the hardware
5. Interface the hardware programmable chips and obtain the required output.

Assessment Details (both CIE and SEE)

Continuous Internal Evaluation (CIE):

CIE marks for the practical course are50 Marks.

The split-up of CIE marks for record/ journal and test are in the ratio 60:40.

 Each experiment is to be evaluated for conduction with an observation sheet and record write-up.
Rubrics for the evaluation of the journal/write-up for hardware/software experiments are
designed by the faculty who is handling the laboratory session and are made known to students at
the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up
will be evaluated for 10 marks.
 Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct a test of 100 marks after the completion of all the experiments listed in
the syllabus.
 In a test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability.
 The marks scored shall be scaled down to 20 marks (40% of the maximum marks).
The Sum of scaled-down marks scored in the report write-up/journal and marks of a test is the total CIE
marks scored by the student.

Semester End Evaluation (SEE):

 SEE marks for the practical course are 50 Marks.

 SEE shall be conducted jointly by the two examiners of the same institute, examiners are
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appointed by the Head of the Institute.

 The examination schedule and names of examiners are informed to the university before
the conduction of the examination. These practical examinations are to be conducted
between the schedule mentioned in the academic calendar of the University.
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer
script to be strictly adhered to by the examiners. OR based on the course requirement
evaluation rubrics shall be decided jointly by examiners.
 Students can pick one question (experiment) from the questions lot prepared by the
examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted
jointly by examiners.
 General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure
and result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated
for 100 marks and scored marks shall be scaled down to 50 marks (however, based on
course type, rubrics shall be decided by the examiners)
Change of experiment is allowed only once and 15% of Marks allotted to the procedure part
are to be made zero.
The minimum duration of SEE is 02 hours

Suggested Learning Resources:

 HDL Programming fundamentals , VHDL and Verilog, N. Botros, Cengage Learning,

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Scilab / MATLAB for Electrical and Electronic Measurements

Course Code BEEL456B CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 02
Course objectives:
(1) Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience and repeat
any number of times to understand the concept.
(2) Provide unhindered access to perform whenever the students wish.
(3) Vary different parameters to study the behaviour of the circuit without the risk of damaging equipment/ device
or injuring themselves.
Sl. Experiments
NO
1 Design and Analysis of measurement of Resistance using Wheatstone and Kelvins double bridge.
2 Design and Analysis of measurement of Inductance using Schering and De-Sauty’s Bridges.
3 Design and Analysis of measurement of Inductance using Maxwells and Anderson Bridges.
4 Design and Analysis of measurement of Frequency in Single and Three Phase Circuits.
5 Design and Analysis of measurement of Real Power, Reactive and Power Factor in Three Phase Circuits.
6 Design and Analysis of measurement of Energy in Three Phase Circuits.
7 Design and Analysis of measurement of Flux and Flux density.
8 Testing and Analysis of Current Transformer using Silsbees Deflection Method.
9 Testing and Analysis of Voltage Transformer using Silsbees Deflection Method.
10 Design and Analysis of True RMS Reading Volt Meters.
11 Design and Analysis of Integrating and Successive approximation type Digital Volt Meters.
12 Design and Analysis of Q Meter.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
 Analyse in a systematic way, think better, and perform better.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall be deemed
to have satisfied the academic requirements and earned the credits allotted to each course. The student has to
secure not less than 35% (18 Marks out of 50) in the semester-end examination (SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments designed by the faculty who is
handling the laboratory session and is made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
 Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
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 Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week of the
semester and the second test shall be conducted after the 14th week of the semester.
 In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability. Rubrics
suggested in Annexure-II of Regulation book
 The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
 The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is the
totalCIE marks scored by the student.

Semester End Evaluation (SEE):

 SEE marks for the practical course is 50 Marks.
 SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by
theUniversity
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointlyby examiners.
 Students can pick one question (experiment) from the questions lot prepared by the internal /external
examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result
in - 60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and
scored marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be
decided by theexaminers)
 Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero.The duration of SEE is 03 hours
 Rubrics suggested in Annexure-II of Regulation book.
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Scilab / MATLAB for Electric Motors

Course Code BEEL456C CIE Marks 50
Teaching Hours/Week (L:T:P: S) 0:0:2:0 SEE Marks 50
Credits 01 Exam Hours 02
Course objectives:
(1) Along with prescribed hours of teaching –learning process, provide opportunity to perform the
experiments/programmes at their own time, at their own pace, at any place as per their convenience and repeat
any number of times to understand the concept.
(2) Provide unhindered access to perform whenever the students wish.
(3) Vary different parameters to study the behaviour of the circuit without the risk of damaging equipment/ device
or injuring themselves.
Sl. Experiments
NO
1 Load test on dc shunt motor to draw speed – torque and horse power – efficiency characteristics
2 Field Test on dc series machines.
3 Speed control of dc shunt motor by armature and field control.
4 4 Swinburne’s Test on dc motor.
5 Regenerative test on dc shunt machines.
6 No load and Blocked rotor test on three phase induction motor to draw (i) equivalent circuit and (ii) circle
diagram. Determination of performance parameters at different load conditions from (i) and (ii).
7 Load test on three phase induction motor.
8 Load test on single phase induction motor to draw output versus torque, current, power and efficiency
characteristics.
Course outcomes (Course Skill Set):
At the end of the course the student will be able to:
 Analyse in a systematic way, think better, and perform better.
Assessment Details (both CIE and SEE)
The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
The minimum passing mark for the CIE is 40% of the maximum marks (20 marks). A student shall be deemed
to have satisfied the academic requirements and earned the credits allotted to each course. The student has to
secure not less than 35% (18 Marks out of 50) in the semester-end examination(SEE).
Continuous Internal Evaluation (CIE):
CIE marks for the practical course is 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
 Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics for
the evaluation of the journal/write-up for hardware/software experiments designed by the faculty who is
handling the laboratory session and is made known to students at the beginning of the practical session.
 Record should contain all the specified experiments in the syllabus and each experiment write-up will be
evaluated for 10 marks.
 Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
 Weightage to be given for neatness and submission of record/write-up on time.
 Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week of the
semester and the second test shall be conducted after the 14th week of the semester.
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 In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will
carry a weightage of 60% and the rest 40% for viva-voce.
 The suitable rubrics can be designed to evaluate each student’s performance and learning ability. Rubrics
suggested in Annexure-II of Regulation book
 The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).
 The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is the
totalCIE marks scored by the student.
Semester End Evaluation (SEE):
 SEE marks for the practical course is 50 Marks.
 SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by
theUniversity
 All laboratory experiments are to be included for practical examination.
 (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be
strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be
decided jointlyby examiners.
 Students can pick one question (experiment) from the questions lot prepared by the internal /external
examiners jointly.
 Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result
in - 60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and
scored marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be
decided by theexaminers)
 Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made
zero.The duration of SEE is 03 hours
 Rubrics suggested in Annexure-II of Regulation book.

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