EEEN 103 Lab Manual 2
EEEN 103 Lab Manual 2
EXPERIMENT OBJECTIVES
In this experiment, you are supposed to design combinational logic circuits for given
purposes. You should do some pre-lab work and answer pre-lab questions. All of your
work will be evaluated for your lab grade and any kind of plagiarism will be
punished.
Mother Board
Cables
Multimeter
Board (y-0016 1-D)
PRE-LAB QUESTIONS
In this experiment we are going to design a system that detects prime numbers from 2
to 14 (including 14). The system that you design should have 4 inputs and one output.
The 4 input corresponds to binary representation of numbers from 0 to 15 and the
output should give 1 when the input is prime and 0 in other case.
PRE-LAB WORK
1- Write the truth table of the desired system.
2- Are there any don’t care conditions
3- Optimize this system by using any methods (Karnaugh map or Quine-
McCluskey tabulation method).
4- Check your optimized solution whether it satisfies the desired problem.
5- Represent this system by using basic logic gates (AND, OR, NOT).
6- Represent this system by using
a) only NOR gates,
b) only NAND gates.
EXPERIMENTAL WORK
1. Implement the optimized circuit obtained in Step 2 by using logic gates as a
combinational logic circuit.
2. Check your circuit whether it gives correct outputs or not.
EXPERIMENT 2.2 EVEN PARITY BIT GENERATOR
PRE-LAB WORK
1- Consider a system which has 4 bit inputs and a single bit output. The input
corresponds to a message and output corresponds to even parity bit.
2- Write the truth table of the desired system.
3- Optimize this system by using any methods (Karnaugh map or Quine-
McCluskey tabulation method).
4- Check your optimized solution whether it satisfies the desired problem or not.
5- Represent this system by using basic logic gates (AND, OR, NOT).
6- Represent this system by using
a) only NOR gates,
b) only NAND gates.
EXPERIMENTAL WORK
1. Implement the optimized circuit obtained in Step 2 by using logic gates as a
combinational logic circuit.
2. Check your circuit whether it gives correct outputs or not.
POST-LAB QUESTIONS
1. If you were supposed to design odd bit parity, what would you do? Can you
design it easily by modifying your even bit parity circuit?
2. Consider a system that gives the number of digits of a number varying from 0
to 100. If you have to design it by using combinational logic gates;
a) How many input and output do you need?
b) How can you optimize it?
c) Can we use don’t Care conditions? If yes, how many don’t care terms are
there? If not explain why?
d) If you have right to remove one number from desired system (for
instance you can remove zero and system will find the digits from 1 to 100
or you can remove 18 and system finds the digits of numbers between 0 to
100 except 18), which number will you remove for obtaining a less
complex circuit and why?