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DLD Lab Manual#3 Document

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23 views10 pages

DLD Lab Manual#3 Document

Uploaded by

abdullah1mughal.k
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Digital logic design

Lab manual#3

Submitted to: sir talal


Submitted by: Mirza saad-ul-hassan baig
Roll no: 23018065019
Course: BSSE
Section : A

Knowledge unit of science and technology, umt, Sialkot


Combinational circuits:
In Digital Logic Design (DLD), a combinational circuit is a type of digital circuit in which the output
depends solely on the current inputs, not on any previous input history (i.e., no memory elements like
flip-flops). These circuits perform logic operations and produce outputs instantaneously based on the
given input values.

HALF ADDER:(SOP)
A half adder is a basic combinational circuit in digital logic design that performs the addition of two
binary digits

1: truth table.

2: minterms.

3: equations.

4:circuit diagram.

A B
SUM CARR MINTERM Minterm
Y sum carry
0 0 0 0 A’+B’ A’+B’
0 1 1 0 A’+B A+B
1 0 1 0 A+B’ A+B
1 1 0 1 A+B A+B
Sum=A’.B+A.B’
SIMPLIFY:
A(+)B
Carry=A.B
CIRCUIT:

(POS):
A B SUM CARRY MAXTERM
0 0 0 0 A+B
0 1 1 0 A+B’
1 0 1 0 A’+B
1 1 0 1 A’+B’
Sum=(A+B).(A’+B’)
A.A’+A.B’+B.A’+B.B’
0+AB’+BA’+0
A(+)B
Carry=(A+B).(A+B’).(A’+B)
A.A+A.B’+B.A+B.B’.(A’+B)
A+AB’+AB.(A’+B)
A’.A+A’AB’+A’AB+BA+BAB’+BAB
0+0+0+AB+0+AB=AB+AB=AB
CIRCUIT:

Task# 2
FULL ADDER:(SOP)
A full adder is a combinational circuit in digital logic design that performs the addition of three binary
bits.

1: truth table.

2: minterms.

3: equations.

4:circuit diagram.
A B C SUM CARRY MINTERM
0 0 0 0 0 A’.B’.C’
0 0 1 1 0 A’.B’.C
0 1 0 1 0 A’.B.C’
0 1 1 0 1 A’.B.C
1 0 0 1 0 A.B’.C’
1 0 1 0 1 A.B’.C
1 1 0 0 1 A.B.C’
1 1 1 1 1 A.B.C
SUM=A’.B’.C+A’.B.C’+A.B’.C’+A.B.C
SIMPLIFY:
A’(B’.C+B.C’)+A(B’.C’+B.C)
A’(B(+)C)+A(B(+)C)’

CARRY=A’.B.C+A.B’.C+A.B.C’+A.B.C
SIMPLIFY:
C(A’.B+A.B’)+A.B(C’+C)
C(A(+)B)+AB(1)
C(A(+)B)+A.B
CIRCUIT:
(POS):
A B C SUM CARRY MAXTERM
0 0 0 0 0 A+B+C
0 0 1 1 0 A+B+C’
0 1 0 1 0 A+B’+C
0 1 1 0 1 A+B’+C’
1 0 0 1 0 A’+B+C
1 0 1 0 1 A’+B+C’
1 1 0 0 1 A’+B’+C
1 1 1 1 1 A’+B’+C’
Sum=(A+B+C).(A+B’+C’).(A’+B+C’).(A’+B’+C)
[A+(B+C).(B’+C’)].[A’+(B+C’).(B’+C)]
[A+B.B’+BC’+CB’+CC’].[A’+BB’+BC+C’B’+CC’]
[A+0+BC’+CB’+0].[A’+0+BC+B’C’+0]
[A+BC’+CB’].[A’+BC+B’C’]
[A.A’+(A.(B.C))+(A.(C’B’))+((BC’).A’)
BC’+CB’=B(+)C
Carry=(A+B+C).(A+B+C’).(A+B’+C).(A’+B+C)
(A+B+C)⋅(A+B+C′)

(A+B+C)⋅(A+B+C′)=A+B+(C⋅C′)=A+B
(A+B)⋅(A+B′+C)

(A+B)⋅(A+B′)⋅(A+C)

(A+B)⋅(A+B′)=A+(B⋅B′)=A

A⋅(A′+B+C)

A⋅A′+A⋅B+A⋅C

=A⋅B+A⋅C=A⋅(B+C)

task#3:
half subtractor:(sop)
A half subtractor is a combinational circuit in digital logic design that performs the subtraction of two
binary digits.

1: truth table.

2: minterms.

3: equations.

4:circuit diagram.

A B Diff Borro MINTERM


w
0 0 0 0 A’.B’
0 1 1 1 A’.B
1 0 1 0 A.B’
1 1 0 0 A.B

Diff=A’.B+A.B’
A(+)B
Borrow=A’.B
CIRCUIT:

POS:
A B Diff Borrow MAXTERM
0 0 0 0 A’+B’
0 1 1 1 A’+B
1 0 1 0 A+B’
1 1 0 0 A+B
DIFF=(A’+B’).(A+B)
AA’+A’B+AB’+BB’
A’B+AB’
A(+)B
BORROW=(A’+B’).(A+B’).(A+B)
(AA’+A’B’+AB’+B’).(A+B)
(A’B’+AB’+B’).(A+B)
AA’B’+AB’+AB’+A’BB’+ABB’+BB’
AB’+AB’=AB’

TASK#4: SOP
A Full Subtractor is a combinational circuit that performs the subtraction of three binary bits.

1: truth table.

2: minterms.

3: equations.

4:circuit diagram

A B C DIFF BORROW MINTERM


0 0 0 0 0 A’.B’.C’
0 0 1 1 1 A’.B’.C
0 1 0 1 1 A’.B.C’
0 1 1 0 1 A’.B.C
1 0 0 1 0 A.B’.C’
1 0 1 0 0 A.B’.C
1 1 0 0 0 A.B.C’
1 1 1 1 1 A.B.C
DIFF=A’B’C+A’BC’+AB’C’+ABC
A’(B’C+BC’)+A(B’C’+BC)
A’(B(+)C)+A(B(+)C)’
BORROW=A’B’C+A’BC’+A’BC+ABC
A’(B’C+BC’)+BC(A’+A)
A’(B(+)C)+BC

POS:
A B C DIFF BORROW MAXTERM
0 0 0 0 0 A+B+C
0 0 1 1 1 A+B+C’
0 1 0 1 1 A+B’+C
0 1 1 0 1 A+B’+C’
1 0 0 1 0 A’+B+C
1 0 1 0 0 A’+B+C’
1 1 0 0 0 A’+B’+C
1 1 1 1 1 A’+B’+C’
DIFF=(A+B+C).(A+B’+C’).(A’+B+C’).(A’+B’+C)
A.A+A.B’+AC’+AB+BB’+CC’
(A+AB’+AC’+AB).(A’+B+C’)
AA’+AA’B’+AA’B+AB+ABB’+ABC’+ABC’+ABB+AC’+AB’C’+AC’C’+ABC’
AB+ABC’+ABC+AB+AC’+AB’C’+AC’+ABC’
AB+ABC’+ABC’+AC’+AB’C’
AB+ABC’+AC’+AB’C’
AB(1+C’)+AC’(1+B’)
AB+AC’=A(B+C’).(A’+B’+C)
(AB+AC’).(A’+B’+C)
AA’B+AA’C’+ABB’+AB’C’+ABC+ACC’
AB’C’+ABC=A(B’C’+BC)=A(B(+)C)’
BORROW=(A+B+C).(A’+B+C).(A’+B+C’).(A’+B’+C)
AA’+AB+AC+BA’+BB+BC+A’C+BC+CC
0+AB+AC+A’B+B+BC+A’C+BC+C
AB+AC+A’B+B+A’C+BC+C
B(A+A’)+C(A+A’)+B(1+C)+C
B+C
(B+C).(A’+B+C’)
(BA’+BB+BC’)+(CA’+CB+CC’)
A’B+B+BC’+A’C+BC+C
B(A’+1)+B(1+C)+C(A’+1)=B+C
(B+C).(A’+B’+C)
BA’+BB’+BC+A’C+B’C+CC
A’B+BC+A’C+B’C+C
C(B+B’)+C(A’+1)+A’B=C+C+A’B=A’B+C
CIRCUIT:

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