168 Chapter 3 Semiconductors

Summary
� Today’s microelectronics technology is almost entirely opposite currents, ID and IS , flow across the junction,
based on the semiconductor material silicon. If a circuit and equilibrium is maintained by a built-in voltage V0
is to be fabricated as a monolithic integrated circuit (IC) that develops across the junction, with the n side positive
it is made using a single silicon crystal, no matter how relative to the p side. Note, however, that the voltage
large the circuit is (a recent chip contains 4.31 billion across an open junction is 0 V, since V0 is canceled
transistors). by potentials appearing at the metal-to-semiconductor
� In a crystal of intrinsic or pure silicon, the atoms are held in connection interfaces.
position by covalent bonds. At very low temperatures, all � The voltage V0 appears across the depletion region, which
the bonds are intact, and no charge carriers are available to extends on both sides of the junction.
conduct electrical current. Thus, at such low temperatures, � The diffusion current ID is carried by holes diffusing from
silicon behaves as an insulator. p to n and electrons diffusing from n to p. ID flows from
� At room temperature, thermal energy causes some of the p to n, which is the forward direction of the junction. Its
covalent bonds to break, thus generating free electrons value depends on V0 .
and holes that become available for current conduction. � The drift current IS is carried by thermally generated
� Current in semiconductors is carried by free electrons and minority electrons in the p material that are swept across
holes. Their numbers are equal and relatively small in the depletion layer into the n side, and by thermally
intrinsic silicon. generated minority holes in the n side that are swept across
� The conductivity of silicon can be increased dramatically the depletion region into the p side. IS flows from n to p,
by introducing small amounts of appropriate impurity in the reverse direction of the junction, and its value is a
materials into the silicon crystal in a process called doping. strong function of temperature but independent of V0 .
� Forward biasing the pn junction, that is, applying an
� There are two kinds of doped semiconductor: n-type, in
external voltage V that makes p more positive than n,
which electrons are abundant, and p-type, in which holes
reduces the barrier voltage to V0 − V and results in an
are abundant.
exponential increase in ID while IS remains unchanged.
� There are two mechanisms for the transport of charge The net result is a substantial current I = ID − IS
carriers in semiconductors: drift and diffusion. that flows across the junction and through the external
� Carrier drift results when an electric field E is applied circuit.
across a piece of silicon. The electric field accelerates the � Applying a negative V reverse biases the junction and
holes in the direction of E and the electrons in the direction increases the barrier voltage, with the result that ID is
opposite to E. These two current components add together reduced to almost zero and the net current across the
to produce a drift current in the direction of E. junction becomes the very small reverse current IS .
� Carrier diffusion occurs when the concentration of charge � If the reverse voltage is increased in magnitude to a value
carriers is made higher in one part of the silicon VZ specific to the particular junction, the junction breaks
crystal than in other parts. To establish a steady-state down, and a large reverse current flows. The value of the
diffusion current, a carrier concentration gradient must reverse current must be limited by the external circuit.
be maintained in the silicon crystal.
� Whenever the voltage across a pn junction is changed,
� A basic semiconductor structure is the pn junction. It is some time has to pass before steady state is reached. This
fabricated in a silicon crystal by creating a p region in is due to the charge-storage effects in the junction, which
close proximity to an n region. The pn junction is a diode are modeled by two capacitances: the junction capacitance
and plays a dominant role in the structure and operation Cj and the diffusion capacitance Cd .
of transistors.
� For future reference, we present in Table 3.1 a summary
� When the terminals of the pn junction are left open, of pertinent relationships and the values of physical
no current flows externally. However, two equal and constants.
 Summary 169

Table 3.1 Summary of Important Equations

Values of Constants and Parameters

Quantity Relationship (for Intrinsic Si at T = 300 K)

Carrier concentration in ni = BT 3/2 e−Eg /2kT B = 7.3 × 1015 cm−3 K−3/2

intrinsic silicon (cm−3 ) Eg = 1.12 eV
k = 8.62 × 10−5 eV/K
ni = 1.5 × 1010 /cm3

Diffusion current dp q = 1.60 × 10

−19
coulomb
Jp = −qDp
density (A/cm2 ) dx Dp = 12 cm2 /s
dn
Jn = qDn Dn = 34 cm2 /s
dx

� � 2
Drift current density Jdrift = q pμp + nμn E μp = 480 cm /V · s
(A/cm2 ) μn = 1350 cm2 /V · s

� � ��
Resistivity ( · cm) ρ = 1/ q pμp + nμn μp and μn decrease with the increase in
doping concentration

Dn Dp
Relationship between = = VT VT = kT /q ≃ 25.9 mV
μn μp
mobility and diffusivity

Carrier concentration in nn0 ≃ ND

n-type silicon (cm−3 ) pn0 = ni2 /ND

Carrier concentration in pp0 ≃ NA

−3
p-type silicon (cm ) np0 = ni2 /NA

Junction built-in � �
NA ND
voltage (V) V0 = VT ln
ni2

Width of depletion xn N
= A
region (cm) xp ND
W = xn + xp es = 11.7e0
� � � −14
2es 1 1 � � e0 = 8.854 × 10 F/cm
= + V0 + VR
q NA ND
170 Chapter 3 Semiconductors

Table 3.1 continued

Values of Constants and Parameters

Quantity Relationship (for Intrinsic Si at T = 300 K)

NA ND
Charge stored in depletion QJ = q AW
NA + ND
layer (coulomb)

I = Ip + In
Forward current (A) Dp � �
Ip = Aqni2 eV/VT − 1
Lp ND
Dn � V/VT �
In = Aqni2 e −1
Ln NA

� �
Saturation current (A) 2 Dp Dn
IS = Aqni +
Lp N D Ln N A

� �
I–V relationship I = IS eV/VT − 1

Minority-carrier τp = Lp2 /Dp τn = Ln2 /Dn Lp , Ln = 1 μm to 100 μm

lifetime (s) 4
τp , τn = 1 ns to 10 ns

Minority-carrier Qp = τp Ip Qn = τn In
charge storage Q = Qp + Qn = τT I
(coulomb)

�
� e q �� N N � 1
s A D
Depletion capacitance (F) Cj0 = A
2 NA + N D V0
�� �
V m
Cj = Cj0 1+ R 1 1
V0 m= to
3 2

� �
τT
Diffusion Cd = I
VT
capacitance (F)
 PROBLEMS

2
If in the following problems the need arises for the values of of 3 V is imposed. Let μn = 1350 cm /V · s and μp =
2
particular parameters or physical constants that are not stated, 480 cm /V · s·
please consult Table 3.1.
3.8 Find the current that flows in a silicon bar of 10-μm
length having a 5-μm × 4-μm cross-section and having
Section 3.1: Intrinsic Semiconductors 4 3 16
free-electron and hole densities of 10 /cm and 10 /cm ,
3

3.1 Find values of the intrinsic carrier concentration ni respectively, when a 1 V is applied end-to-end. Use μn =
2 2
for silicon at −55°C, 0°C, 20°C, 75°C, and 125°C. At 1200 cm /V · s and μp = 500 cm /V · s.
each temperature, what fraction of the atoms is ionized? 3.9 In a 10-μm-long bar of donor-doped silicon, what
22
Recall that a silicon crystal has approximately 5 × 10 donor concentration is needed to realize a current density
3
atoms/cm . 2
of 2 mA/μm in response to an applied voltage of 1 V?
3.2 Calculate the value of ni for gallium arsenide (GaAs) at (Note: Although the carrier mobilities change with doping
14
T = 300 K. The constant B = 3.56 × 10 cm K
−3 −3/2
and the concentration, as a first approximation you may assume μn
2
bandgap voltage Eg = 1.42 eV. to be constant and use 1350 cm /V · s, the value for intrinsic
silicon.)

Section 3.2: Doped Semiconductors 3.10 Holes are being steadily injected into a region of n-type
silicon (connected to other devices, the details of which
3.3 For a p-type silicon in which the dopant concentration are not important for this question). In the steady state, the
18 3
NA = 5 × 10 /cm , find the hole and electron concentrations excess-hole concentration profile shown in Fig. P3.10 is
at T = 300 K. established in the n-type silicon region. Here “excess” means
3.4 For a silicon crystal doped with phosphorus, what must over and above the thermal-equilibrium concentration (in the
16 3
ND be if at T = 300 K the hole concentration drops below the absence of hole injection), denoted pn0 . If ND = 10 /cm ,
10 3 2
8
intrinsic level by a factor of 10 ? ni = 1.5 × 10 /cm , Dp = 12 cm /s, and W = 50 nm, find the
density of the current that will flow in the x direction.
3.5 In a phosphorus-doped silicon layer with impurity
17 3
concentration of 10 /cm , find the hole and electron con-
centrations at 27°C and 125°C.

pn(x)
Section 3.3: Current Flow in Semiconductors 108 pn0
n region
3.6 A young designer, aiming to develop intuition concern-
ing conducting paths within an integrated circuit, examines
the end-to-end resistance of a connecting bar 10-μm long,
3-μm wide, and 1 μm thick, made of various materials. The
designer considers: pn0

(a) intrinsic silicon

16 3
(b) n-doped silicon with ND = 5 × 10 /cm 0 W x
18 3
(c) n-doped silicon with ND = 5 × 10 /cm Figure P3.10
16 3
(d) p-doped silicon with NA = 5 × 10 /cm
(e) aluminum with resistivity of 2.8 μ· cm

Find the resistance in each case. For intrinsic silicon, use the
3.11 Both the carrier mobility and the diffusivity decrease as
data in Table 3.1. For doped silicon, assume μn = 3μp =
2 the doping concentration of silicon is increased. Table P3.11
1200 cm /V · s. (Recall that R = ρL/A.)
provides a few data points for μn and μp versus doping
3.7 Contrast the electron and hole drift velocities through concentration. Use the Einstein relationship to obtain the
a 10-μm layer of intrinsic silicon across which a voltage corresponding values for Dn and Dp .

= Multisim/PSpice; * = difficult problem; ** = more difficult; *** = very challenging; D = design problem
 172 Chapter 3 Semiconductors

Table P3.11
PROBLEMS

Doping Concentration
3 2 2 2 2
(carriers/cm ) μn (cm /V · s) μp (cm /V · s) Dn (cm /s) Dp (cm /s)

Intrinsic 1350 480

16
10 1200 400
17
10 750 260
CHAPTER 3

18
10 380 160

Section 3.4: The pn Junction charge stored on either side of the junction, QJ , can be
expressed as
3.12 Calculate the built-in voltage of a junction in which the
16 3 �
p and n regions are doped equally with 5 × 10 atoms/cm .
10 3 VR
Assume ni = 1.5 × 10 /cm . With the terminals left open, W = W0 1 +
V0
what is the width of the depletion region, and how far does
it extend into the p and n regions? If the cross-sectional area �
2 VR
of the junction is 20 μm , find the magnitude of the charge QJ = QJ0 1 +
stored on either side of the junction. V0

3.13 If, for a particular junction, the acceptor concentration where W0 and QJ0 are the values in equilibrium.
17 3 16 3
is 10 /cm and the donor concentration is 10 /cm , find the
10 3
junction built-in voltage. Assume ni = 1.5 × 10 /cm . Also, 3.19 In a forward-biased pn junction show that the ratio
find the width of the depletion region (W) and its extent in of the current component due to hole injection across the
each of the p and n regions when the junction terminals are junction to the component due to electron injection is
left open. Calculate the magnitude of the charge stored on given by
either side of the junction. Assume that the junction area is
2 Ip Dp Ln NA
100 μm . =
In Dn Lp ND
3.14 Estimate the total charge stored in a 0.1-μm depletion
layer on one side of a 10-μm × 10-μm junction. The doping 18
Evaluate this ratio for the case NA = 10 /cm , ND =
3
18 3
concentration on that side of the junction is 10 /cm . 16 3 2
10 /cm , Lp = 5 μm, Ln = 10 μm, Dp = 10 cm /s, and
2
3.15 In a pn junction for which NA  ND , and the depletion Dn = 20 cm /s, and hence find Ip and In for the case
layer exists mostly on the shallowly doped side with W = in which the pn junction is conducting a forward current
16 3
0.2 μm, find V0 if ND = 10 /cm . Also calculate QJ for the I = 100 μA.
2
case A = 10 μm .
3.20 Calculate IS and the current I for V = 750 mV for
17 3 16 3
3.16 By how much does V0 change if NA or ND is increased a pn junction for which NA = 10 /cm , ND = 10 /cm ,
2 10 3
by a factor of 10? A = 100 μm , ni = 1.5 × 10 /cm , Lp = 5 μm, Ln = 10 μm,
2 2
Dp = 10 cm /s, and Dn = 18 cm /s.
Section 3.5: The pn Junction with an Applied
Voltage 3.21 Assuming that the temperature dependence of IS arises
2
mostly because IS is proportional to ni , use the expression for
3.17 If a 3-V reverse-bias voltage is applied across the 2
ni in Eq. (3.2) to determine the factor by which ni changes as T
junction specified in Problem 3.13, find W and QJ .
changes from 300 K to 305 K. This will be approximately the
3.18 Show that for a pn junction reverse-biased with same factor by which IS changes for a 5°C rise in temperature.
a voltage VR , the depletion-layer width W and the What is the factor?

= Multisim/PSpice; * = difficult problem; ** = more difficult; *** = very challenging; D = design problem
 Problems 173

+
3.22 A p n junction is one in which the doping concentration to have at I = 0.1 mA? What is the mean transit time for this

CHAPTER 3
in the p region is much greater than that in the n region. In such junction?
a junction, the forward current is mostly due to hole injection +
3.28 For the p n junction specified in Problem 3.22, find τp
across the junction. Show that
and calculate the excess minority-carrier charge and the value
2 Dp � V/VT �
of the diffusion capacitance at I = 0.1 mA.
I ≃ Ip = Aqni e −1
Lp ND
*3.29 A short-base diode is one where the widths of the p

PROBLEMS
17 3
For the specific case in which ND = 10 /cm , Dp = 10 cm /s,
2
and n regions are much smaller than Ln and Lp , respectively.
4 2
Lp = 10 μm, and A = 10 μm , find IS and the voltage V As a result, the excess minority-carrier distribution in each
obtained when I = 1 mA. Assume operation at 300 K where region is a straight line rather than the exponentials shown in
10
ni = 1.5 × 10 /cm .
3
Fig. 3.12.

3.23 A pn junction for which the breakdown voltage is 12 V (a) For the short-base diode, sketch a figure corresponding
has a rated (i.e., maximum allowable) power dissipation of to Fig. 3.12 and assume as in Fig. 3.12 that NA  ND .
0.25 W. What continuous current in the breakdown region (b) Following a derivation similar to that given in Section
will raise the dissipation to half the rated value? If breakdown 3.5.2, show that if the widths of the p and n regions are
occurs for only 10 ms in every 20 ms, what average breakdown denoted Wp and Wn then
current is allowed? � �
Dp Dn � �
2 V/V
I = Aqn i � � +� � e T −1
Section 3.6: Capacitive Effects in the pn Wn − xn ND Wp − xp NA
Junction
and
3.24 For the pn junction specified in Problem 3.13, find Cj0 � �2
and Cj at VR = 3 V. 1 Wn − xn
Qp = Ip
2 Dp
3.25 For a particular junction for which Cj0 = 0.4 pF, V0 =
2
0.75 V, and m = 1/3, find Cj at reverse-bias voltages of 1 V 1 Wn
≃ I , for Wn  xn
and 10 V. 2 Dp p

3.26 The junction capacitance Cj can be thought of as that

of a parallel-plate capacitor and thus given by (c) Also, assuming Q ≃ Qp , I ≃ Ip , show that

eA τT
Cj = Cd = I
W VT
Show that this approach leads to a formula identical to that where
obtained by combining Eqs. (3.43) and (3.45) [or equivalently, 2
by combining Eqs. (3.47) and (3.48)]. 1 Wn
τT =
2 Dp
3.27 A pn junction operating in the forward-bias region with
a current I of 1 mA is found to have a diffusion capacitance of (d) If a designer wishes to limit Cd to 8 pF at I = 1 mA, what
2
5 pF. What diffusion capacitance do you expect this junction should Wn be? Assume Dp = 10 cm /s.

= Multisim/PSpice; * = difficult problem; ** = more difficult; *** = very challenging; D = design problem