University of Computer Studies, Yangon

Computer Architecture and Organization I

Semester V

Faculty of Computer Systems and Technologies

 Basic Concepts, Computer System and Computer Evolution

• General functions and structure of a digital computer

• Overview of the evolution of computer technology from early digital computers to the latest
microprocessors
• Overview of the evolution of the x86 architecture
• Embedded systems

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Computer Architecture ~ Computer Organization

•Attributes of a system •Instruction set, number of

visible to the programmer bits used to represent
•Have a direct impact on various data types, I/O
the logical execution of a mechanisms, techniques
program for addressing memory

Computer Architectural
Architecture attributes include:

Organizational Computer
attributes include: Organization

•Hardware details •The operational units and

transparent to the their interconnections that
programmer, control realize the architectural
signals, interfaces specifications
between the computer
and peripherals, memory 3
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Structure and Function

• Hierarchical system
– Set of interrelated subsystems • Structure
– Hierarchical nature of complex – The way in which
systems is essential to both their components relate to
design and their description each other
• Function
– Designers need only deal with a – The operation of
particular level of the system at a individual components
time as part of the structure
– Concerned with structure and
function at each level

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Function

• There are four basic functions that a computer can perform:

– Data processing
• Data may take a wide variety of forms and the range of processing requirements is
broad
– Data storage
• Short-term
• Long-term
– Data movement
• Input-output (I/O) - when data are received from or delivered to a device
(peripheral) that is directly connected to the computer
• Data communications – when data are moved over longer distances, to or from a
remote device
– Control
• A control unit manages the computer’s resources and orchestrates the
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performance of its functional parts in response to instructions ㅡ
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Structure

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Four main structural components of the computer

▪ CPU – controls the operation of the computer and performs its data processing
functions
▪ Main Memory – stores data
▪ I/O – moves data between the computer and its external environment
▪ System Interconnection – some mechanism that provides for communication
among CPU, main
There memory, andstructural
are four main I/O components
of the computer:

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CPU Major structural components:

▪ Control Unit
▪ Controls the operation of the CPU and hence the computer

▪ Arithmetic and Logic Unit (ALU)

▪ Performs the computer’s data processing function

▪ Registers
▪ Provide storage internal to the CPU

▪ CPU Interconnection
▪ Some mechanism that provides for communication among the control unit, ALU, and
registers

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Multicore Computer Structure

• Central processing unit (CPU)

– Portion of the computer that fetches and executes instructions
– Consists of an ALU, a control unit, and registers
– Referred to as a processor in a system with a single processing unit
• Core
– An individual processing unit on a processor chip
– May be equivalent in functionality to a CPU on a single-CPU system
– Specialized processing units are also referred to as cores
• Processor
– A physical piece of silicon containing one or more cores
– Is the computer component that interprets and executes instructions
– Referred to as a multicore processor if it contains multiple cores

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Cache Memory

▪ Multiple layers of memory between the processor and main memory

▪ Is smaller and faster than main memory
▪ Used to speed up memory access by placing in the cache data from main memory that is
likely to be used in the near future
▪ A greater performance improvement may be obtained by using multiple levels of cache, with
level 1 (L1) closest to the core and additional levels (L2, L3, etc.) progressively farther from
the core

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 MOTHERBOARD
Main memory chips

Processor
I/O chips chip

PROCESSOR CHIP

Core Core Core Core

L3 cache L3 cache

Core Core Core Core

CORE
Arithmetic
Instruction and logic Load/
logic unit (ALU) store logic

L1 I-cache L1 data cache

L2 instruction L2 data
cache cache

Figure 1.2 Simplified View of Major Elements of a Multicore Computer 11

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IAS computer

• Vacuum tubes were used for digital logic elements and memory
• IAS computer
– Fundamental design approach was the stored program concept
• Attributed to the mathematician John von Neumann
• First publication of the idea was in 1945 for the EDVAC
– Design began at the Princeton Institute for Advanced Studies
– Completed in 1952
– Prototype of all subsequent general-purpose computers

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 Central processing unit (CPU)

Arithmetic-logic unit (CA)

AC MQ

Input- 0 1 39
Arithmetic-logic output
circuits
equipment
(I, O)

MBR
sign bit (a) Number word

Instructions
and data

left instruction (20 bits) right instruction (20 bits)

Instructions
and data
M(0)
M(1) 0 8 20 28 39
M(2)
M(3) PC IBR
M(4) AC: Accumulator register
MQ: multiply-quotient register
MBR: memory buffer register
IBR: instruction buffer register opcode (8 bits) address (12 bits) opcode (8 bits) address (12 bits)
MAR IR PC: program counter
MAR: memory address register
Main
memory
IR: insruction register (b) Instruction word
(M)
Control
Control
circuits
signals
M(4092)
M(4093) Figure 1.7 IAS Memory Formats
M(4095)
Program control unit (CC)

Addresses
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Figure 1.6 IAS Structure
Registers

Memory buffer register • Contains a word to be stored in memory or sent to the I/O unit
(MBR) • Or is used to receive a word from memory or from the I/O unit

Memory address register • Specifies the address in memory of the word to be written from or
(MAR) read into the MBR

Instruction register (IR) • Contains the 8-bit opcode instruction being executed

Instruction buffer register • Employed to temporarily hold the right-hand instruction from a
(IBR) word in memory

• Contains the address of the next instruction pair to be fetched from

Program counter (PC) memory

Accumulator (AC) and • Employed to temporarily hold operands and results of ALU
multiplier quotient (MQ) operations
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 The IAS Instruction Set
Symbolic
Start Instruction Type Opcode Representation Description
00001010 LOAD MQ Transfer contents of register MQ to the
accumulator AC
00001001 LOAD MQ,M(X) Transfer contents of memory location X to
MQ
Yes Is next No 00100001 STOR M(X) Transfer contents of accumulator to memory
instruction MAR PC location X
No memory Data transfer
in IBR?
Fetch access 00000001 LOAD M(X) Transfer M(X) to the accumulator
cycle required 00000010 LOAD –M(X) Transfer –M(X) to the accumulator
MBR M(MAR)
00000011 LOAD |M(X)| Transfer absolute value of M(X) to the
accumulator
00000100 LOAD –|M(X)| Transfer –|M(X)| to the accumulator
Left
IR IBR (0:7) IR MBR (20:27) No instruction Yes IBR MBR (20:39) Unconditional 00001101 JUMP M(X,0:19) Take next instruction from left half of M(X)
IR MBR (0:7) branch 00001110 JUMP M(X,20:39) Take next instruction from right half of M(X)
MAR IBR (8:19) MAR MBR (28:39) required?
MAR MBR (8:19) 00001111 JUMP+ M(X,0:19) If number in the accumulator is nonnegative,
take next instruction from left half of M(X)
0 JU If number in the
0 MP accumulator is nonnegative,
Conditional branch 0 + take next instruction from
PC PC + 1
1 M(X right half of M(X)
Decode instruction in IR 0 ,20:
0 39)
AC M(X) Go to M(X, 0:19) If AC > 0 then AC AC + M(X) 0
go to M(X, 0:19) 0
Execution Yes 00000101 ADD M(X) Add M(X) to AC; put the result in AC
Is AC > 0? 00000111 ADD |M(X)| Add |M(X)| to AC; put the result in AC
cycle
00000110 SUB M(X) Subtract M(X) from AC; put the result in AC
MBR M(MAR) PC MAR No MBR M(MAR) 00001000 SUB |M(X)| Subtract |M(X)| from AC; put the remainder
in AC
00001011 MUL M(X) Multiply M(X) by MQ; put most significant
bits of result in AC, put least significant bits
AC MBR AC AC + MBR Arithmetic
in MQ
00001100 DIV M(X) Divide AC by M(X); put the quotient in MQ
and the remainder in AC
00010100 LSH Multiply accumulator by 2; i.e., shift left one
M(X) = contents of memory location whose addr ess is X bit position
(i:j) = bits i through j 00010101 RSH Divide accumulator by 2; i.e., shift right one
position 15
Figure 1.8 Partial Flowchart of IAS Operation 00010010 STOR M(X,8:19) Replace left address field at M(X) by 12 ㅡ
rightmost bits of AC 31
Address modify
00010011 STOR M(X,28:39) Replace right address field at M(X) by 12
rightmost bits of AC
Gates and Memory Cells

• A gate is a device that implements a simple Boolean or logical function. For example, an
AND gate with inputs A and B and output C implements the expression IF A AND B ARE
TRUE THEN C IS TRUE.
▪ Such devices are called gates because they control data flow in much the same way that
canal gates control the flow of water.
memory cell is a device that can store one bit of data; that is, the device can be in one of
two stable states at any time.
❖ Data storage: Provided by memory cells.
❖ Data processing: Provided by gates.
❖ Data movement: The paths among components are used to move data from
memory to memory and from memory through gates to memory.
❖ Control: The paths among components can carry control signals.

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▪ Transistors
▪ Microelectronic Chips
▪ Multichip Module
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The Evolution of the Intel x86 Architecture

• Two processor families are the Intel x86 and the ARM architectures
• Current x86 offerings represent the results of decades of design effort on complex instruction
set computers (CISCs)
• An alternative approach to processor design is the reduced instruction set computer (RISC)
• ARM architecture is used in a wide variety of embedded systems and is one of the most
powerful and best-designed RISC-based systems on the market

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Highlights of the Evolution of the Intel Product Line:

8080 8086 80286 80386 80486

• World’s first • A more powerful • Extension of the • Intel’s first 32-bit • Introduced the
general-purpose 16-bit machine 8086 enabling machine use of much
microprocessor • Has an addressing a 16- • First Intel more
• 8-bit machine, instruction MB memory processor to sophisticated
8-bit data path cache, or queue, instead of just support and powerful
to memory that prefetches 1MB multitasking cache
• Was used in the a few technology and
first personal instructions sophisticated
computer before they are instruction
(Altair) executed pipelining
• The first • Also offered a
appearance of built-in math
the x86 coprocessor
architecture
• The 8088 was a
variant of this
processor and
used in IBM’s
first personal
computer
(securing the
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success of Intel ㅡ
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Highlights of the Evolution of the Intel Product Line:
Pentium
• Intel introduced the use of superscalar techniques, which allow multiple instructions to execute in parallel

Pentium Pro
• Continued the move into superscalar organization with aggressive use of register renaming, branch prediction, data flow
analysis, and speculative execution

Pentium II
• Incorporated Intel MMX technology, which is designed specifically to process video, audio, and graphics data efficiently

Pentium III
•Incorporated additional floating-point instructions
•Streaming SIMD Extensions (SSE)

Pentium 4
• Includes additional floating-point and other enhancements for multimedia

Core
• First Intel x86 micro-core

Core 2
• Extends the Core architecture to 64 bits
• Core 2 Quad provides four cores on a single chip
• More recent Core offerings have up to 10 cores per chip 20
• An important addition to the architecture was the Advanced Vector Extensions instruction set ㅡ
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Embedded Systems

• The use of electronics and software within a product

• Billions of computer systems are produced each year that are
embedded within larger devices
• Today many devices that use electric power have an embedded
computing system
• Often embedded systems are tightly coupled to their environment
– This can give rise to real-time constraints imposed by the need
to interact with the environment
• Constraints such as required speeds of motion, required
precision of measurement, and required time durations,
dictate the timing of software operations
– If multiple activities must be managed simultaneously this
imposes more complex real-time constraints
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 Custom
logic

Processor Memory

Human Diagnostic
interface port

A/D D/A
conversion Conversion

Actuators/
Sensors
indicators

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Figure 1.14 Possible Organization of an Embedded System 31
 The Internet of Things (IoT)
▪ Term that refers to the expanding interconnection of smart devices, ranging from appliances to tiny sensors
▪ Is primarily driven by deeply embedded devices
▪ Generations of deployment culminating in the IoT:
▪ Information technology (IT)
▪ PCs, servers, routers, firewalls, and so on, bought as IT devices by enterprise IT people and primarily
using wired connectivity
▪ Operational technology (OT)
▪ Machines/appliances with embedded IT built by non-IT companies, such as medical machinery,
SCADA, process control, and kiosks, bought as appliances by enterprise OT people and primarily using
wired connectivity
▪ Personal technology
▪ Smartphones, tablets, and eBook readers bought as IT devices by consumers exclusively using
wireless connectivity and often multiple forms of wireless connectivity
▪ Sensor/actuator technology
▪ Single-purpose devices bought by consumers, IT, and OT people exclusively using wireless
connectivity, generally of a single form, as part of larger systems

▪ It is the fourth generation that is usually thought of as the IoT and it is marked by the use of billions of 23
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embedded devices
Embedded Systems

▪ Embedded Operating Systems

▪ Application Processors versus Dedicated Processors
▪ Microprocessors versus Microcontrollers
▪ Embedded versus Deeply Embedded Systems

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 Embedded

Operating Application Processors Dedicated Processors

Systems

• There are two general • Defined by the processor’s • Is dedicated to one or a small
approaches to developing an ability to execute complex number of specific tasks
embedded operating system operating systems required by the host device
(OS): • General-purpose in nature • Because such an embedded
• Take an existing OS and adapt • An example is the smartphone – system is dedicated to a specific
it for the embedded application the embedded system is task or tasks, the processor and
• Design and implement an OS designed to support numerous associated components can be
intended solely for embedded apps and perform a wide variety engineered to reduce size and
use of functions cost

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ARM

Refers to a processor architecture that has evolved from RISC design

principles and is used in embedded systems

Family of RISC-based microprocessors and microcontrollers designed by

ARM Holdings, Cambridge, England

Chips are high-speed processors that are known for their small die size
and low power requirements

Probably the most widely used embedded processor architecture and

indeed the most widely used processor architecture of any kind in the
world

Acorn RISC Machine/Advanced RISC Machine

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ARM Products

Cortex-M
• Cortex-M0
Cortex-R • Cortex-M0+
• Cortex-M3
Cortex- • Cortex-M4
A/Cortex-A50

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 Security Analog Interfaces Timers &Triggers Parallel I/O Ports Serial Interfaces
Periph Timer/
bus int counter Pin
Hard- reset USART USB
ware A/D D/A Low Real
AES con- con- energy time ctr
General External Low-
verter verter energy
Pulse Watch- purpose Inter- UART
counter dog tmr I/O rupts UART

Peripheral bus
32-bit bus

Voltage Voltage High fre- High freq Flash SRAM Debug DMA
regula- compar- quency RC crystal memory memory inter- control-
tor ator oscillator oscillator 64 kB 64 kB face ler

Brown- Low fre- Low freq Memory

Power- protec-
out de- quency RC crystal Cortex-M3 processor
on reset tion unit
tector oscillator oscillator
Energy management Clock management Core and memory

Microcontroller Chip
ICode SRAM &
interface peripheral I/F
Bus matrix

Debug logic

Memory
DAP protection unit

ARM
NVIC core ETM
Cortex-M3 Core
NVIC ETM Cortex-M3
interface interface
Processor
32-bit ALU
Hardware 32-bit
divider multiplier

Control Thumb
logic decode
Instruction Data 28
interface interface
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Figure 1.16 Typical Microcontroller Chip Based on Cortex-M3
Lecture Summary

• Organization and architecture • Embedded systems

• Structure and function – The Internet of things
• The IAS Computer – Embedded operating
– The evolution of the Intel systems
x86 architecture – Application processors
• Gates, Memory Cells, Chips, versus dedicated
and Multichip Modules processors
– Gates and Memory Cells – Microprocessors versus
– Transistors microcontrollers
– Microelectronic Chips – Embedded versus
deeply embedded
– Multichip Module systems
• ARM architecture
– ARM evolution
– Instruction set architecture 29
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– ARM products 31
Core Learning Outcomes:

▪ Identify some contributors to computer architecture and organization and relate their
achievements to the knowledge area.
▪ Articulate differences between computer organization and computer architecture.
▪ Sketch a block diagram showing the main components of a simple computer.
▪ Explain the reasons and strategies for different computer architectures and indicate some
strengths and weaknesses inherent in each.
▪ Identify some modern techniques for high-performance computing, such as multi/many-core
and distributed architectures.

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 References

• “Computer Architecture and Organization” by John P. 3rd edition.

© 1998 by The' McGraw-Hill Companies, Inc.
• “Structured Computer Organization” by ANDREW S. TANENBAUM & TODD AUSTIN 6th
Edition, © 2013 Pearson Education, Inc.,
• “Computer Organization and Architecture”, 11th Edition by William Stallings, © Pearson
Education Limited 2022
• Computer Architecture and Organization by S. P. Wang, © Higher Education Press 2021
• Modern Computer Architecture and Organization, 2nd Edition by Jim Ledin, © 2022 Packt
Publishing
• Digital Design and Computer Architecture RISC-V Edition by Sarah Harris, David Harris

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