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Expt 4 - 2-Bit & 4-Bit Comparators - Final

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29 views5 pages

Expt 4 - 2-Bit & 4-Bit Comparators - Final

Jntuh
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© © All Rights Reserved
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DEPARTMENT OF ECE ACE ENGINEERING COLLEGE

EXPERIMENT-4A
Designing a 2 – bit Comparator using AND, OR and NOT gates

Aim : Designing a 2 – bit Comparator using AND, OR and NOT gates.

Apparatus : IC 7408 (AND), IC 7432 (OR), IC 7404 (NOT), IC 7486 (EX-OR), CDS Board
and Connecting Wires

Theory :

A comparator is a combinational circuit used to compare two binary numbers. 2-bit


comparator is a combinational circuit used to compare two binary numbers consisting of
two bits each. When two binary numbers A & B are compared, the output can be any of
these three cases i.e. A > B, A = B and A < B.

Truth Table :
DEPARTMENT OF ECE ACE ENGINEERING COLLEGE

The boolean equations for A>B, A=B and A<B can be obtained by using K-Map as

𝐹𝑜𝑟 𝐴 > 𝐵, 𝐺 = 𝐴1 𝐵1′ + 𝐴0 𝐵1′ 𝐵0′ + 𝐴1 𝐴0 𝐵0′

𝐹𝑜𝑟 𝐴 = 𝐵, 𝐸 = (𝐴′1 𝐵1′ + 𝐴1 𝐵1 )(𝐴′0 𝐵0′ + 𝐴0 𝐵0 )


= (𝐴1 ʘ 𝐵1 )(𝐴0 ʘ 𝐵0 )

𝐹𝑜𝑟 𝐴 < 𝐵, 𝐿 = 𝐴′1 𝐵1 + 𝐴′0 𝐵1 𝐵0 + 𝐴′1 𝐴′0 𝐵0

Logic Circuits :

The logic circuit for A > B is :

The logic circuit for A = B is :


DEPARTMENT OF ECE ACE ENGINEERING COLLEGE

The logic circuit for A < B is :

Procedure :

1. Place the required ICs on CDS Bread board.


2. Connect the logic circuit as shown above for A>B
3. Connect Vcc and Ground to all the ICs.
4. Apply the inputs as per the truth table shown above and verify the outputs.
5. Repeat the same procedure for A=B and A<B.

Result : 2-bit Comparator using Logic gates is implemented and its truth table is verified.
DEPARTMENT OF ECE ACE ENGINEERING COLLEGE

EXPERIMENT-4B
Realize 4 – bit Comparator using 2 – bit Comparators

Aim : Realize 4 – bit Comparator using 2 – bit Comparators.

Apparatus : IC 7408 (AND), IC 7432 (OR), IC 7404 (NOT), IC 7486 (EX-OR), CDS Board
and Connecting Wires

Truth Table :

A 4-bit comparator uses 4-bits in input A (a3a2a1a0) and 4-bits in input B (b3b2 b1b0).
Therefore, the truth table of the 4-bit comparator is as follows :

From the table above, the Boolean equations for each output are obtained by using K-Map as :

G = a3b3′ + (a3⨀b3) a2b2′ + (a3⨀b3) (a2⨀b2) a1b1′ + (a3⨀b3) (a2⨀a2) (a1⨀b1) a0b0′

E = (a3⨀b3) (a2⨀a2) (a1⨀b1) (a0⨀b0)

L = a3ʹ b3 + (a3⨀b3) a2ʹ b2 + (a3⨀b3) (a2⨀b2) a1ʹ b1 + (a3⨀b3) (a2⨀a2) (a1⨀b1) a0ʹ b0
DEPARTMENT OF ECE ACE ENGINEERING COLLEGE

Logic Circuit :

Procedure :

1. Place the required ICs on CDS Bread board.


2. Connect the logic circuit as shown above.
3. Connect Vcc and Ground to all the ICs.
4. Apply the inputs as per the truth table shown above and verify the outputs.

Result : 4 – bit Comparator using 2 – bit Comparators is realized and its truth table is verified.

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