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16 views

vlsimodule4

Uploaded by

ash678g
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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1.

Explain tasks and void functions with examples

3.2 Tasks, Functions, and Void Functions

Verilog makes a clear differentiation between tasks and functions. The most important difference is
that:

• A task can consume time, whereas a function cannot.

• A function:

o Cannot have a delay, such as #100.

o Cannot include blocking statements, such as @(posedge clock) or wait(ready).

o Cannot call a task.

o Must return a value, and the value must be used (e.g., in an assignment statement).

Void Functions in SystemVerilog

• If you have a SystemVerilog task that does not consume time, you should make it a void
function, which is a function that does not return a value.

• Benefits:

o It can be called from any task or function.

o Debug routines are better implemented as void functions for maximum flexibility.

Example: Void Function for Debug

function void print_state(...);

$display("@%0t: state = %s", $time, cur_state.name());

endfunction

Ignoring a Function’s Return Value

• In SystemVerilog, if you want to call a function and ignore its return value, cast the result to
void.

• Example:

• void'($fscanf(file, "%d", i));

• Some simulators, such as VCS, allow you to ignore the return value without using the void
syntax.
2.Explain with examples the various system verilog assertions

This excerpt introduces SystemVerilog Assertions (SVA), a powerful feature in SystemVerilog for
specifying and verifying design behavior. Below is a summary and key points covered in this text:

Overview of SystemVerilog Assertions

• Purpose: Assertions are used to verify that design signals meet specific conditions during
simulation.

• Types:

o Immediate Assertions: Embedded in procedural code, they check conditions at


specific moments.

o Concurrent Assertions: Operate continuously throughout the simulation, monitoring


temporal relationships between signals.

Immediate Assertions

1. Usage:

o Immediate assertions are compact and succinct compared to procedural code (if
statements).

o Example of checking conditions with if:

o if (bus.cb.grant != 2'b01)

o $display("Error, grant != 1");

o Equivalent using an assertion:

o assert (bus.cb.grant == 2'b01);

If the condition fails, a simulator error message is generated.

2. Custom Error Messages:

o Assertions allow adding custom error messages for clarity:

o assert (bus.cb.grant == 2'b01)

o else $error("Grant not asserted");

3. Optional Actions:

o Successful assertions can trigger additional actions:

o assert (bus.cb.grant == 2'b01)

o grants_received++;

o else
o $error("Grant not asserted");

4. SystemVerilog Message Functions:

o $info: Informational messages.

o $warning: Non-critical warnings.

o $error: Errors indicating incorrect behavior.

o $fatal: Fatal errors that terminate the simulation.

Concurrent Assertions

1. Purpose:

o They continuously monitor temporal behavior over the entire simulation.

2. Specification:

o Require a sampling clock.

o Can define properties to specify temporal conditions.

o Example:

o property request_2state;

o @(posedge clk) disable iff (rst)

o $isunknown(request) == 0; // Ensure no X/Z

o endproperty

o assert property (request_2state);

3. Highlights:

o Concurrent assertions check for relationships that span across multiple clock cycles.

o They are declarative, making them simpler than equivalent procedural code.

Explain the 1. Returning of array from a function 2. Passing an array to a function in system Verilog

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3.5.2 Returning an Array from a Function


In Verilog, routines could only return a simple value such as a bit, integer, or vector. If you
wanted to compute and return an array, there was no simple way. In SystemVerilog, a
function can return an array using several techniques.

One technique is to define a type for the array and use that in the function declaration. The
example below uses the array type from Sample 2.35 and creates a function to initialize the
array.

Sample 3.20: Returning an Array from a Function with a typedef

typedef int fixed_array5[5];


fixed_array5 f5;

function fixed_array5 init(int start);


foreach (init[i])
init[i] = i + start;
endfunction

initial begin
f5 = init(5);
foreach (f5[i])
$display("f5[%0d] = %0d", i, f5[i]);
end

One issue with the preceding code is that the function init creates an array, which is copied
into the array f5. If the array is large, this could result in significant performance problems.

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Passing an Array to a Function by Reference


An alternative to returning an array from a function is to pass the array by reference. The
easiest way to achieve this is by passing the array into the function as a ref argument, as
shown below:
Sample 3.21: Passing an Array to a Function as a ref Argument
function void init(ref int f[5], input int start);
foreach (f[i])
f[i] = i + start;
endfunction

int fa[5];

initial begin
init(fa, 5);
foreach (fa[i])
$display("fa[%0d] = %0d", i, fa[i]);
end
By using a ref argument, the function modifies the array directly, avoiding the need to copy
large arrays and improving performance.

Let me know if you'd like further explanation or additional examples!


Here’s a simpler explanation of the points:
1. Loop Variable Scope:
When you declare a variable inside a for loop, it only exists within that loop. This
keeps things neat and prevents mistakes where the variable might accidentally be used
elsewhere.
2. ++ and -- Operators:
These operators let you quickly increase (++) or decrease (--) a variable by 1. You can
use them before or after the variable, depending on when you want the change to
happen.
3. Shortcut Assignments:
Operators like += and -= let you do math and assign the result in one step. For
example, instead of writing x = x + 5, you can just write x += 5. It’s shorter and easier
to read.
4. Labels for Blocks:
You can give a name (label) to a block of code like begin and end. This helps you
quickly see where a block starts and ends, especially in long or complicated code.
5. Labels for Other Parts of Code:
You can also use labels for other parts of your code, like endmodule or endtask. This
makes it easier to understand and organize your work.
Let me know if you need more examples!

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