Microcontroller

Group-14

2003131 – Nahid Hasan

2003132 – Fariha Fairuz

2003133 – Ridwanul Islam Pavel

2003134 – Tasreful Islam

2003135 – Md. Shifat Alam

2003136 – Naveed Bin Hannan

2003137 - MD Naiem Islam Nahid

2003138 – K. M. Tahomid Ahasan

2003139 – Prothom Antor Banik

2003140 - Md. Afjol Hossain Joy Bhuiyan

 Chapter - 1 - Microcontroller history and features

Chapter – 2 – Microcontroller Architecture and Assembly Language Programming

Table Of Chapter - 2.1 General purpose registers in AVR

Content Chapter – 2.2 - Microcontroller data memory

Chapter – 2.4 - Microcontroller status register

Chapter – 2.5 - Microcontroller data format and directives

Chapter – 2.6 - Microcontroller assembly Programming

Chapter – 2.8 - Program counter and program ROM space in microcontroller

Chapter – 3.1 - Branch instructions and looping

Chapter – 3.2 - Call instructions and stack

Chapter – 3.3 - Time delay

Chapter – 5.1 - Arithmetic instructions,

Chapter – 5.3 - Logic and compare instructions

Chapter - 5.4 - Rotate and shift instructions

THE AVR MICROCONTROLLER
(HISTORY AND FEATURES)
Chapter 01
 THE AVR MICROCONTROLLER (HISTORY AND FEATURES)

Microcontroller History Of The Features of Architecture of

& Common AVR AVR AVR
Types Microcontroller Microcontroller Microcontroller
What is Microcontroller?

A microcontroller is a VLSI
Integrated Circuit housing a CPU,
memory , I/O ports, and other
components, designed for specific
task control within electronic
systems.
Note : VLSI(Very Large-Scale
Integration)
 Common Types of Microcontroller

PIC (Peripheral ARM (Advanced RISC 8051: AVR (Alf and Vegard's MSP (Mixed Signal
Interface Controller): Machine): RISC Processor): Processor):

Microchip's PIC excels ARM microcontrollers, Intel's 8051, an 8-bit AVR microcontrollers, Part of Texas
with separate code and balancing cost powerhouse since 1981, with a modified Instruments, MSP
data storage, sensitivity and high features a versatile 40- Harvard architecture, microcontrollers
enhancing efficiency in performance, dominate pin DIP form factor, distinguish themselves feature a 16-bit CPU
diverse electronic the digital embedded 4KB ROM, and 128 by storing program designed for low cost
systems. system landscape in bytes of RAM, making and data separately, and power-efficient
applications like it suitable for a range offering flexibility embedded systems,
industrial control and of applications. across diverse streamlining
wireless networking. applications. programming for
efficient performance.
Microcontroller vs
Microprocessor

Microprocessor: Microprocessor refers

to general-purpose processors like
Intel's x86 family (8086, 80286, 80386,
80486, and the Pentium).
Microprocessors do not include RAM,
ROM, or I/O ports within the chip
itself.
Microcontroller: A microcontroller has
a CPU (a microprocessor) and it also
has a fixed amount of RAM, ROM,
I/O ports, and a timer all on a single
chip. Essentially, the processor, RAM,
ROM, I/O ports, and timer are all
integrated on a single chip which
prevents the designer from
incorporating external memory, I/O, or
a timer to it.
 History & Introduction of AVR Controller :

The basic architecture of AVR was designed by Alf-Egil Bogen and Vegard Wollan, students of Norwegian
Institute of Technology (NTH). Later in 1996, Atmel acquired and further enhanced this architecture.

According to Atmel, AVR is simply a product name; however, some suggest it could represent
"Advanced Virtual RISC" or potentially it could be named using their acronym "Alf and Vegard
RISC.”

Note: CISC - Complex Instruction Set Computer (CISC architecture has a lot of complex instruction
set built-in into the CPU to handle various tasks)

RISC - Reduced Instruction Set Computer (RISC architecture has simpler instruction set built-in into
the CPU to improve efficiency and speed)
 AVR features

1. The AVR is an 8-bit RISC single-

chip microcontroller
2. It has on-chip program ROM, data
RAM, data EEPROM, timers and
I/O ports which follows Harvard
architecture.
3. It also has additional features like
ADC, PWM, and different kinds of
serial interface such as USART, SPI,
I2C (TWI), CAN, USB, and so on.
 Microcontroller Program ROM :
Components of The ROM, referred to as program or code ROM, stores the
microcontroller programs. While AVR offers 8MB of program ROM
AVR space, the actual installed ROM size varies from 1K to 256K among
family members.
Microcontroller
Microcontroller Data RAM and EEPROM:
Data is stored in RAM, with the AVR boasting a maximum of 64K bytes
of data RAM space. The data RAM space comprises general-purpose
registers, I/O memory, and internal SRAM, with the number of registers
and SRAM size varying across AVR chips.

Microcontroller I/O Pins:

AVR I/O pins range from 3 to 86, dependent on the package's pin
count. The number of I/O pins is specific to the package size of the
microcontroller.

Microcontroller Peripherals:
AVRs typically feature special functions like ADC (analog-to-digital
converter), timers, and USART (Universal Synchronous Asynchronous
Receiver Transmitter) as standard peripherals. These enhance the
microcontroller's capabilities for diverse applications.
General Architecture of a
AVR microcontroller:
 Chapter 2 -
AVR ARCHITECTURE AND ASSEMBLY LANGUAGE PROGRAMMING

General Purpose
Microcontroller Microcontroller
Registers in
Data Memory Status Register
Microcontroller

Microcontroller Microcontroller Program Counter

Data Format and Assembly and Program
Directives Programming ROM Space
The General-Purpose
Register in the AVR
Chapter – 2.1
 In CPUs, registers are used to store
information.

1. Byte of data to 2.An address

be processed pointing to the
data to be fetched
Most of the registers in AVR are 8-bit
registers.
The 8 bits of a register are shown
in the diagram below:

MSB LSB
 GPRs

There are 32 general purpose registers in the AVR.

They are R0-R31; located in the lowest location of the
memory address.
AVR General Purpose
Registers and ALU
Two simple instructions: LDI and
ADD are shown to understand the
use of general-purpose registers.
 LDI Instruction (Load Immediate)

This operation copies 8-bit data into the general-purpose register.

Structure:
LDI Rd, K ; load Rd(destination) with Immediate value of K

The LDI loads the right operand to the left operand. Hence the destination
comes first, then comes the source.

Example:
LDI Rd20,0x27 ; load Rd20 with 0x27 (Rd20 = 0x27)
 LDI Instruction (Load Immediate)

1. d must be between 16 and 31. We cannot load values into registers R0 - R15 using the LDI
instruction. It would display "invalid instruction".

2. K is an 8-bit value that can be 0-255 in decimal or 0-FF in hex.

To present a number in hex, a dollar sign ($) or a 0x can be put in front of it.

3. If values 0 to F are moved into an 8-bit register, the rest of the bits are assumed to be all
zeros.

4. Moving a value larger than 255 (FF in hex) into the GPRs will cause an error.
 ADD Instruction

This operation is used to add the values from two registers.

Structure:
ADD Rd, Rr ; ADD Rr to Rd and store the result in Rd
This instruction tells the CPU to add the value of Rr to Rd and put the result back into the Rd register. To add 0x25
and 0x34, following instruction can be used:
LDI Rd16, 0x25 ; load Rd16 with 0x25
LDI Rd17, 0x34 ; load Rd17 with 0x34
ADD R16, R17 ;add value R17 to R16 (R16 = R16 + R17)
The above lines results in R16 = 0x59 (0x25 + 0x34 = 0x59)
 Review Questions

1. Write instruction to move the value 0x34 into the R29 register.
Answer: LDI R29, 0x34
2. Write instructions to add the values 0x16 and 0xCD. Place the result in
the R19 register.
Answer: LDI R20, 0x16
LDI R19, 0xCD
LDI R19, R20
Microcontroller Data
Memory
Chapter – 2.2
 Microcontroller Data Memory

In AVR microcontrollers, there are two The data memory is again composed of
kinds of memory space: three parts-
Code Memory Space: Saves the code GPRs (General Purpose Registers)
I/O memory (Special Function
Data Memory Space: Stores the data Registers , SFRs)
Internal data SRAM
 GPRs:The GPRs use 32 bytes of data memory space. They always take the address location $00–$1F in the
data memory space, regardless of the AVR chip number.

Data Memory Parts

SFRs: The AVR I/O memory is also a 8-bit register. This are dedicated to specific functions such as status
register, serial communication, I/O ports, ADC(Analog to Digital Converter), and so on. The function of
each I/O memory location is fixed by the CPU designer. The number of I/O memory depends on the pin
numbers and peripheral functions supported by that chip and the number varies from chip to chip.
However, all of the AVRs have at least 64 bytes of I/O memory locations. This 64-byte section is called
standard I/O memory.

SRAMs: Internal data SRAM is widely used for storing data and parameters by AVR programmers. Each
location is 8 bits wide. Generally, this is called scratch pad. Again, the size of SRAM can vary from chip to
chip.
Memory Space

EEPROM SRAM
SRAM is a volatile memory
The AVR has an
used for temporary data
EEPROM memory that is
storage
used for storing data. SRAM loses its data when
EEPROM does not lose its
power is off.
data when power is off. The EEPROM is used for
The EEPROM is used for
storing data that should
storing data that should
frequently be changed.
rarely be changed.
Some AVR CHIPS
 Recap

The I/O registers are used as an interface to the I/O devices and peripherals on board the
microcontroller.

2. The GPRs together with I/O registers and SRAM are called Data Memory.

3. The I/O registers in AVR are 8-bit.

4. The data memory space in AVR can be a maximum of 64k bytes.

5. The standard I/O memory space in AVR is 64 bytes.

 Introduction to Instructions-LDS

LDS instruction(Load direct from data Space)

The LDS instruction tells the CPU to load(copy) one byte from an address in the
data memory to GPR.
Format:
LDS Rd, k ;load Rd with the contents of location K(0<=d<=31)
;K is an address between $0000 to $FFFF
Example:
LDS R5,0x200 ;load R% with the contents of location $200
 Introduction to Instructions-STS

STS instruction(Store direct to data Space)

The STS instruction tells the CPU to store (copy) the contents of the GPR to an
address location in the data memory space.
Format:
STS K, Rr ;store register into location K
;K is an address between $0000 to $FFFF
Example:
STS 0x230, R25 ;store R25 to data space location 0x230
 Introduction to Instructions-IN

IN instruction (IN from I/O location)

The IN instruction tells the CPU to load one byte from an I/O register to the GPR.
Each location in the data memory has a unique address called the data memory address.
Each I/O register has a relative address in comparison to the beginning of the I/O
memory; this address is called the I/O address.
Format:
IN Rd, A ;load an I/O location to the GPR (0≤d≤31), (0≤A≤63)
Example:
IN R19, 0x10 ;load R19 with location $10
 Introduction to Instructions-OUT

OUT instruction (OUT to I/O location)

The OUT instruction tells the CPU to store the GPR to the I/O register.
Format:
OUT A, Rr ;store register to I/O location (0 ≤ r ≤ 31),(0 ≤A ≤ 63)
Example:
LDI R20,0xE6 ;load R20 with 0xE6
OUT SPL, R20 ;out R20 to SPL
 Introduction to Instructions-MOV

MOV instruction
The MOV instruction is used to copy data among the GPR registers of R0–R31.
Format:
MOV Rd, Rr ;Rd = Rr (copy Rr to Rd)
;Rd and Rr can be any of the GPRs
Example:
MOV R10, R20 ;R10 = R20
Instructions USING GPR
AVR Status Register

Chapter – 2.4
 AVR Status Register

The AVR microcontroller architecture, developed by Atmel (now Microchip Technology),

includes a specialized register known as the "Status Register."
This register provides essential information about the result of the most recently executed
arithmetic/logical instruction.

Importance :
Efficient Programming: Flags aid in optimizing code by providing feedback.
Interrupt Control: The Global Interrupt Flag is pivotal for managing interrupt-driven tasks.
Debugging: By monitoring these flags, developers can better understand the outcome of operations.
 Components of AVR Register

1. Carry Flag(C): 2. Zero Flag(Z): 3. Negative Flag(N): 4. Overflow Flag(V):

Indicates carry-out or borrow Z = 1; Result was zero. N = 1: Result was negative. Indicates overflow in signed
in arithmetic operations. Z = O; Result was not zero. N = 0: Result wasn't negative. arithmetic operations.

5. Sign Flag(S): 6. Half carry Flag(H): 7. Bit copy Storage (T): 8. Global Interrupt Flag (I):
S = N ⊕V; Indicates if the Indicates a carry between bit 3 Temporary storage for bit I= 1; Global interrupts
result is negative based on two's and bit 4 during arithmetic manipulations. enabled.
compliment operations. I = 0; Global interrupts
disabled.
ADD Instruction and Status
Register- Example1

Show the status of the Z flag during the

execution of the following program:
LDL R20,4 ;R20 = 4
DEC R20 ;R20 = R20 - 1
DEC R20 ;R20 = R20 - 1
DEC R20 ;R20 = R20 - 1
DEC R20 ;R20 = R20 - 1
Microcontroller Data format
and Assembly programming
Chapter – 2.5, 2.6, 2.7
Microcontroller Data Types
Data Format and The AVR microcontroller has only one data
type. It is 8 bits, and the size of each register
Directives is also 8 bits.

Data format representation

There are four ways to represent a byte of
data.
Hex: $1A or 0x1A
Binary: 0b10011001
Decimal: 2, 18, 139
ASCII characters: '2' which is equal to 32 in
hex
 Assembler directives Instructions tell the CPU what to do
Directives (also called pseudo-instructions) give
directions to the assembler

.EQU (equate) .SET .INCLUDE .ORG (origin)

Used to define a constant Used to define a Tells the AVR assembler Used to indicate the
value or a fixed address. constant value or a fixed to add the contents of a beginning of an address
Example: address. file to our program (like
.EQU COUNT = 0x25 Example: the #include directive in C
LDI R21, COUNT .SET COUNT = 0x25 language).
LDI R21, COUNT Example:
.INCLUDE “M32DEF.INC”

.SET vs .EQU: The only difference is that the value assigned by the .SET directive may be reassigned later.
 Rules For Labels

Each Label must be unique

Consists of alphanumeric characters and special characters
“?”, “.”, “@”, “_” and “$”
First character must be alphabetic
Reserved keywords such as “ADD”, “LDI” cannot be used as labels
 Structure of Assembly Language

The label field allows the program to refer to a line of code by name
Mnemonic (instruction) and operand(s) fields together performs a task
The comment field begins with a semicolon and is ignored by the assembler
** Brackets indicate that a field is optional
 Structure of
Assembly Language

A sample program
would look like that.
Assembling a
program
Use a text editor to type in a program
which can produce an ASCII file (such
as AVRStudio IDE, Notepad) and save
the source file with “asm” extension.
Feed the “asm” extension source file to
an AVR Assembler and it will produce
an object file, a hex file, an eeprom file,
a list file and a map file.
The hex file is burned into the AVR’s
program rom.
 Assembling a program

“lst” and “map” files

The map file shows the labels defined in the program together with their
values. Whereas the list (lst) file is optional, and it shows the binary and
source code. It can be used to know:
Which instructions are used
The amount of memory the program uses
Assembling a
program

Sample map file

and list file:
Program Counter and Program
ROM Space in Microcontroller
Chapter – 2.8
 What is program counter?
The program counter is a register that manages the memory address of the
instructions to be executed next. As the CPU fetches the opcode from the
program ROM, the program counter is incremented automatically to point
to the next instruction.
 Example

ATmega32 has a 14-bit program counter. The ATmega64 has a 15-bit program
That means it can access a maximum counter, so it has 32K locations (2^15 =
of2^14 = 16K of program memory 32K). As each location containing 2
locations. In AVR microcontrollers each bytes of memory the maximum capacity
memory location is 2 bytes wide. So the is 64K bytes. The addresses range from
memory can hold maximum 32K bytes $0000 to $7FFF.
of code. The addresses range from $0000
to $3FFF.
 Program
Counter
The program counter in the AVR
family can be up to 22 bits wide.
This means that the AVR family can
access program addresses $000000 to
$3FFFFF, a total of 4M
locations. Because each location is 2
bytes wide, the AVR can have a
maximum of 8M bytes of code.
AVR On-Chip Program
ROM Address Range
 When the AVR is powered up, the PC (program
counter) has the value of 00000 in it.
Let’s see a code and examine the PC: .
ORG 0
LDI R16, 0x25
LDI R17, 0x34
The machine code for LDI R16, 0x25 is “E205” where E is the opcode and 205 is the operands. Similarly, the machine code
for LDI R17, 0x34 is “E314”. E205 is 2 bytes in length. So, it occupies only one memory address from the ROM space. As it’s
the first instruction the code E205 is stored in location $00000 and code E314 is stored in $00001.
When the AVR is powered up, the PC (program counter) has 00000 and starts to fetch the first instruction from location
00000 of the program ROM. In the case of the above program the first code is E205, which is the code for moving operand
0x25 to R16. Upon executing the code, the CPU places the value of 25 in R16. Now one instruction is finished. Then the
program counter is incremented to point to 00001 (PC = 00001), which contains code E314, the machine code for the
instruction “LDI R17,0x34”.
Program ROM Width for the
AVR
Branch instructions and looping,
call instructions and stack
Chapter- 3.1, 3.2
 Importance of Loops in Programming:
Branch Loops are fundamental structures in programming.
Enable the repetition of a sequence of instructions or operations.

Instructions Essential for automating repetitive tasks and implementing efficient

algorithms.

and Looping Role of Branch Instructions:

Branch instructions guide the flow of a program.
Facilitate the creation and execution of loops.
Essential for implementing decision-making processes and controlling
program flow.

Significance in Code Structure:

Understanding and utilizing loops enhance code organization.
Promote code reusability, readability, and maintainability.
Key to writing efficient and structured programs.

Overview of the Presentation:

The presentation will delve into branch instructions and looping in AVR
programming.
Explore examples, types of jumps, and the role of the stack in program
execution.
 Loop

Repeating a sequence of instructions

or an operation a certain number of
times is called a loop.
Example:

LDI R21, 0
LDI R20, 10
Again: ADD R21, R20
DEC R20
BRNE Again
 Question: What is the maximum number
Nested Loop of times the loop in the Example can be
repeated?
Location R20 is an 8-bit register, it can hold
maximum of 0xFF (255 in decimal). Therefore,
the loop can be repeated a maximum of 255
times.
LDI R16, 0x55
LDI R22, 10
LOP_2: LDI R21, 100
LOP_1: COM R16 Question: What if I want the loop to run
DEC R21 more than 255 times?
BRNE LOP_1
DEC R22 Loop inside a loop. To do that, we use a loop
BRNE LOP_2 inside a loop, which is called a nested loop. Two
This loop will run total 10*100 = 1000 times.
registers give us a maximum value of 255 × 255
= 65,025 so a nested 2 loop can run more than
65k times. We can use three registers to go more
than 16 million (255 x 255 x 255) iterations
 Conditional Jump

A jump is a programming instruction that

causes the execution sequence to deviate
from its normal sequential order.

It must be noted that all conditional jumps

are short jumps, meaning that the address of
the target must be within 64 bytes of the
program counter

Target address = relative address + PC

Conditional
Jump
Unconditional JMP(long jump)
JMP is an unconditional jump that can go to any memory location in the 4M
byte address space.
Jump It is a 4-byte (32-bit) instruction in which 10 bits are used for the opcode, and
the other 22 bits represent the 22-bit address of the target location.
The 22-bit target address allows a jump to 4M of memory locations from
000000 to $3FFFFF

RJMP (relative jump)

It is a 2-byte (16-bit) instruction.
The relative address range of $000 – $FFF is divided into forward and
backward jumps within −2048 to +2047 words of memory relative to the
address of the current PC.
If the jump is forward, then the relative address is positive. If the jump is
backward, then the relative address is negative.

IJMP (indirect jump)

JMP is a 2-byte instruction.
When the instruction executes, the PC is loaded with the contents of the Z
register, so it jumps to the address pointed by the Z register. Z is a 2- byte
register
IJMP can jump within the lowest 64K words of the program memory
 Call instructions:
Call Instructions and Stack
Call instructions are used to call
subroutines in assembly language. They
allow the program to jump to a
subroutine, execute it, and then return to
Subroutine the original point in the program.
Structured programming involves breaking down
tasks into modular subroutines.
Subroutines are special instruction set which Types of Call Instructions:
performed often. This makes a program more
structured and in addition saves memory.
Subroutines are essential for organized and CALL (Long call)
efficient programming.
Subroutines improve code readability, reusability,
RCALL (Relative call)
and maintenance. ICALL (Indirect call to Z)
EICALL (Extended indirect call to Z)
Call and Recall Call Recall

CALL is a 4-byte (32-bit) instruction. Recall is a 2-byte instruction.

10 bits for opcode, 22 bits for the target Only 12 bits of the 2 bytes are used for the
subroutine address. address.

The target address of the subroutine must

Used to call subroutines within the 4M
be within −2048 to +2047 words of
address space of $000000– $3FFFFF.
memory relative to the address of the
current PC.

The main difference between CALL and

AVR knows where to come back to after RCALL is the range of the target address.
execution of the called subroutine, the While CALL can target any address within
microcontroller automatically saves on the whole 4MB address space of the AVR
the stack the address of the instruction program ROM, RCALL can only target
immediately below the CALL.
addresses within a 4K range.
 ICALL EICALL

ICALL vs The ICALL (Indirect Call to Z) is a 2-byte instruction.

The EICALL (Extended Indirect Call to Z) instruction is
used with more than 64K words of program memory.

EICALL When the ICALL instruction is executed, the program

counter is loaded with the contents of the Z register,
In the EICALL instruction, both the Z register and the
EIND register play important roles.
causing a jump to the address pointed by the Z
register.

Because the Z register is 16 bits wide, the ICALL The Z register is loaded into the lower 16 bits of the
instruction can call subroutines that are within the Program Counter (PC), and the EIND register is
lowest 64K words of the program memory. loaded into the upper 6 bits of the PC.

The Z register plays a crucial role in the ICALL Similar to ICALL, it jumps to the address pointed by
instruction. It specifies the target address of the the Z register. However, it also takes into account the
EIND register for extended memory. This allows the
subroutine to be called. EICALL instruction to access a larger memory space
compared to the ICALL instruction.
 The stack is a section of RAM used by the CPU to store
Stack information temporarily. This information could be data or
an address. The CPU needs this storage area because there
are only a limited number of registers.

Enables temporary storage during subroutine calls, allowing

the CPU to manage multiple tasks.

Crucial for maintaining the program state during function

calls and interrupts.

The stack is crucial in CPU operations as it provides a

temporary storage area for the CPU, which is necessary due
to the limited number of registers.
The SP register is designed to accommodate the varying
sizes of memory in different AVR models. Accessing Stack
In AVRs with more than 256 bytes of memory, the SP
register is composed of two 8-bit registers: SPL (Stack
Pointer Low) and SPH (Stack Pointer High). This allows
the SP to address all the RAM, providing a larger stack. The stack in AVR is accessed using the
Stack Pointer (SP) register.
In AVRs with less than 256 bytes of memory, the SP The SP register is a special register
register is made of only SPL, as an 8-bit register can
address 256 bytes of memory. that points to the uppermost position in
the stack, which is the location of the
most recently pushed item.
Both SPL and SPH are located in the I/O memory space, When an item is pushed onto the stack,
which is a section of memory reserved for I/O operations.
the SP is decremented. Conversely,
when an item is popped from the stack,
the SP is incremented.
The SP register is often initialized with the end of RAM
address, marking the start of the stack.
PUSH and POP PUSH

Pushing onto the stack is a fundamental operation

POP

Popping from the stack is the operation that

in stack management. complements pushing.

When data is pushed onto the stack, it gets stored at When data is popped from the stack, the Stack
the location pointed by the Stack Pointer (SP). Pointer (SP) is first incremented to point to the
most recently pushed item.

After the data is stored, the SP is then decreased by

Then, the content from the topmost position of the
one to prepare for the next push operation. This is
stack is copied back into a register, effectively
because the stack in AVR grows downwards,
removing it from the stack.
meaning that as more items are added, the SP
points to lower addresses.

The PUSH instruction is used to push data onto the The POP instruction is used to pop data from the
stack. stack.

For example, PUSH R10 stores the contents of For instance, POP R16 increments the SP and then
register R10 onto the stack and decrements the SP. loads the top of the stack into register R16. This
This means that the value in R10 is saved onto the means that the most recently pushed value is
stack for later use, and the SP now points to the removed from the stack and stored in R16 for use in
next available location on the stack. the program.
Time Delay

Chapter – 3.3
 Instruction cycle time for the AVR

The CPU requires a specific duration to carry out an instruction, which is

known as machine cycles. Due to the 1-word (2-byte) or 2-word (4-byte)
structure of instructions 2205 Assignment v2.0 28 within AVR, the majority
of instructions take only one or two machine cycles for execution. In the
AVR family, the duration of a machine cycle is depends on the frequency of
the oscillator linked to the AVR system.
 Example:

The following shows the frequency for four different AVR-based systems.
Find the period of the instruction cycle in each case -
(a) 8 MHz
(b) 16 MHz
(c) 10 MHz
(d) 1 MHz
 Solution:

(a) instruction cycle is 1/8 MHz = 0.125 μs (microsecond) = 125

ns(nanosecond)
(b) instruction cycle = 1/16 MHz = 0.0625 μs = 62.5 ns (nanosecond)
(c) instruction cycle = 1/10 MHz = 0.1 μs = 100 ns
(d) instruction cycle = 1/1 MHz = 1 μs
 Calculation of delay: Example

For an AVR system of 1 MHz, find how long it takes to execute each of the
following instructions:
(a) LDI (b) DEC (c) LD
(d) ADD (e) JMP (f) CALL
(g) BRNE (h) .DEF
 Solution

The machine cycle for a system of 1 MHz is 1 μs. Therefore, we have:

Instruction Instruction cycles Time
(a) LDI 1 1 x 1 μs
(b) DEC 1 1 x 1 μs
(c) OUT 1 1 x 1 μs
(d) ADD 1 1 x 1 μs
(e) JMP 3 3 x 1 μs
(f) CALL 4 4 x 1 μs
 Solution:

Instruction Instruction cycles Time

(g) BRNE 2/1 2/1 x 1 μs (2 μs taken, 1 μs if it falls
through)
(h) .DEF 0 0 x 1 μs (directives don’t produce
machine instructions)

Here, LDI, DEC, LD, ADD are 1 byte instruction so it takes only one cycle to execute
this instructions. Whereas, JMP, CALL are 3 and 4 byte instructions so they take 3 and
4 clock cycles respectively. BRNE is a branch instruction if the condition is meet and
it need to branch then it takes 2 clock cycle otherwise 1. .DEF is a directive so it has
no machine code so the cpu does not need to execute it.
 Example:

If the time take by a single cycle is 1μs the calculate the time delay for the
program below:
Solution:
Arithmetic , Logic and
compare Instructions
Chapter – 5.1, 5.2
 Overview

Number types: Operations: Flag Effect

1. Signed Addition C , Z, H, N, S Flags
2. Unsigned Subtraction
Multiplication
 Addition of Unsigned Number

ADD ADC (ADD with Carry)

ADD destination, Source ADC works same as ADD instruction
The instruction adds source to destination except that it also adds the carry with the
and stores the result in destination. result.
It could change any of the Z, C, N, V, H or The ADC instruction is used in adding 16-
S bits of the status register, depending on bit numbers. This is called multibyte
the operands involved. addition.
 Flags effect

Flag Definition Affected during Addition Example

Indicates if there was a carry-out from Set to 1 if there is a carry- In the addition of 0xF5 and 0x0B, if
Carry Flag (C)
the most significant bit. out; 0 otherwise. there's a carry from the MSB, C is set to 1.

Indicates whether the result of the Set to 1 if the result is zero; 0 If the result of adding 0xF5 and 0x0B is
Zero Flag (Z)
addition is zero. otherwise. 0x00, Z is set to 1.

Half Carry Indicates if there's a carry-out from Set to 1 if there's a carry-out If there's a carry from the 4th bit in the
Flag (H) bit 3 to bit 4 (for 8-bit addition). from D3 to D4; 0 otherwise. addition, H is set to 1.
Indicates whether the result is
Negative Flag Set to 1 if the result is If the MSB of the result is 1, N is set to 1,
negative (interpreted as a signed
(N) negative; 0 otherwise. indicating a negative result.
number).
Similar to the Negative Flag, indicates If the MSB of the result is 1, S is set to 1,
Sign Flag (S) Set to the MSB of the result.
the sign of the result. indicating a negative result.
 Subtraction of unsigned number

Instructio Flag Effects(N, C, Z, H, S,

Operation Description Example
n V)
SUB SUB Rd, Rr Subtract Rr from Rd SUB R16, R18 1, 0, 0, 0, 1

SBC SBC Rd, Rr Subtract Rr and Carry from Rd SBC R16, R18 1, 1, 0, 0, 1

SUBI SUBI Rd, K Subtract immediate K from Rd SUBI R16, 20 1, 0, 0, 0, 1

Subtract immediate K and Carry

SBCI SBCI Rd, K SBCI R16, 25 1, 1, 0, 0, 1
from Rd

SBIW Subtract K from 16-bit pair SBIW

SBIW 1, 0, 0, 1, 1
Rd+1:Rd, K Rd+1:Rd R25:R24, 50
 Addition and Subtraction of Signed Numbers

Signed byte operands are a type of data in assembly language where the most
significant bit (D7) represents the sign (positive or negative) and the
remaining bits (D0 to D6) represent the magnitude of the number.

Addition and subtraction of signed numbers in assembly language are

performed using the ADD and SUB instructions respectively.

Negative numbers are represented using 2’s complement method.

 Example of SUB and ADD

Addition Subtraction
LDI R20, 0X60 ; LDI R20, 0x80 ;
R20 = 0110 0000 (+70) R20 = 1000 0000 (-128)
LDI R21, 0x46 ; LDI R21, 0xFE ;
R21 = 1111 1110 (-2)
R21 = 0100 0110 (+96) SUB R20, R21 ;
ADD R20, R21 ; R20 = (-128) - (-2) = 1000 0000 + 0000 0010 = 1000
R20 = 0110 0000 + 0100 0110 = 1010 0110 0010
 Overflow Problem in Signed Number
Addition and Subtraction
An overflow error occurs when the result of an addition or Example:
subtraction operation exceeds the maximum value that can Consider the operation of adding +70 and +96. The
be stored in a byte (255 for unsigned numbers, 127 for correct result should be +166. However, because this
signed numbers).
result cannot be represented with a signed byte, an
overflow error occurs.
In the context of signed numbers, an overflow error can
lead to incorrect results because the sign bit (the most
significant bit) can be inadvertently changed. The microcontroller incorrectly gives the result as -90
(represented by the two’s complement of +166 in an 8-
The AVR microcontroller sets the V flag (Overflow flag) to bit register) and sets the V flag to 1 to indicate the
1 to indicate an overflow error. overflow error.
 Multiplication of Signed and Unsigned
numbers
Unsigned Number Signed Number
MUL instruction: MUL is a byte-by-byte multiply MULS instruction: MULS is a signed number multiplication instruction.
instruction. After multiplication, the 16-bit unsigned After multiplication, the 16-bit signed product is placed in R1 (high byte)
product is placed in R1 (high byte) and R0 (low byte). and R0 (low byte).
Example: Example:
LDI R23, 0x25
LDI R23, 0x25
LDI R24, 0x65
LDI R24, 0x65
MUL R23, R24 ;
MULS R23, R24 ;
25H * 65H = E99 where ;R1 = 0EH and R0 = 99H
25H * 65H = E99 where ;R1 = 0EH and R0 = 99H
Instruction Operation Example Result
Various Logic
AND Bitwise AND AND R3, R5 R3 = R3 & R5
Operators
OR Bitwise OR OR R6, R2 R6 = R6

Negate (two's Logic instructions are

NEG NEG R4 R4 = -R4
complement) some of the most widely
COM Bitwise NOT COM R7 R7 = ~R7 used instructions. Every
EOR instruction is bitwise
(Exclusive Bitwise XOR EOR R1, R2 R1 = R1 ^ R2
OR) instruction.
Sets status flags
CP Compare two
CP R8, R9 based on
(Compare) registers
comparison
Shift and Rotate
Instructions
Chapter – 5.4
Why we need shift and rotation instruction?

Rotation and shift instructions in AVR microcontrollers are crucial for

efficient bit manipulation, enabling tasks such as circular buffer
management, bitwise operations, and optimization of binary arithmetic.
These instructions contribute to streamlined code, enhancing the overall
performance and versatility of AVR-based applications.
 Rotate and Shit Instructions

Rotate: Shift:
ROR LSL
ROL LSR
 Rotate Instructions-ROR

ROR Rd ;rotate Rd right through carry

In ROR, as bits are rotated from left to right, the carry flag enters the Most Significant Bit
(MSB), and the Least Significant Bit (LSB) exits to the carry flag.
Example
CLC ;make C = 0
LDI R20, 0x26 ;R20 = 0010 0110
ROR R20 ;R20 = 0001 0011, C=0
ROR R20 ;R20 = 0000 1001, C=1
ROR R20 ;R20 = 1000 0100, C=1
 Rotate Instructions-ROL

ROL Rd; rotate Rd left through carry

In ROL, as bits are shifted from right to left, the carry flag enters the LSB, and
the MSB exits to the carry flag.
Example
CLC ;make C = 0
LDI R20, 0x26 ;R20 = 0010 0110
ROL R20 ;R20 = 0100 1100, C=0
ROL R20 ;R20 = 1001 1000, C=0
ROL R20 ;R20 = 0011 0000, C=1
 Shift Instructions -LSL

LSL Rd ;logical shift left

In LSL, as bits are shifted from right to left, 0 enters the
LSB, and the MSB exits to the carry flag.
Left shift multiplies the value by 2 each time.
Example:
LDI R20, 0x26 ; R20 = 0010 0110
LSL R20 ;R20 = 0100 1100, C = 0
LSL R20 ;R20 = 1001 1000, C = 0
LSL R20 ;R20 = 0011 0000, C = 1
 Shift Instructions -LSR

LSR Rd ;logical shift right

In LSR, as bits are shifted from left to right, 0 enters the MSB, and the LSB exits to the
carry flag.
LSR divides unsigned number by 2 but cannot be used to divide signed numbers.
Example: LDI R20,0x26 ;R20 = 0010 0110
LSR R20 ;R20=00010011, C=0
LSR R20 ;R20=00001001, C=1
LSR R20 ;R20=00000100, C=1
 ASR Instruction

ASR means arithmetic shift right.

The ASR instruction can divide signed numbers by two.
In ASR, as bits are shifted from left to right, the MSB is held constant and the LSB
exits to the carry flag.
Example: LDI R20, 0D60 ;R20 = 1101 0000(-48) c = 0
LSR R20 ;R20 = 1110 1000(-24) C = 0
LSR R20 ;R20 = 1111 0100(-12) C = 0
LSR R20 ;R20 = 1111 1010(-6) C = 0
LSR R20 ;R20 = 1111 1101(-3) C = 0
LSR R20 ;R20 = 1111 1110(-1) C = 1
Thank You