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EPC Question Papers
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EPC Question Papers
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caes Sonali usn [a |e [a [> a BEC303 Third Semester B.E./B.Tech- Destee Examination, June/July 2024 Electronic uated oe and Circuits Max. Marks: 100 ull question from each module, Time: 3 hrs. Note: 1. Answer any iy 7 M[L[ C Wika neat cuit diagram, explain the voltage divider biasing cifeuit and | 10 | 13 | COT _| also derive the expres as ‘What is the collector-emitter voltage tm Fig.QI(b) 10| £3 | Cor Mee stpy ¢ Vina ; é ( Date ( tha Q2 With diagram explain the two transistors model. Also derive Z( ase). 10] 13 | Cot 8 Explainethe base biased amplifier uit. Also expla ‘AC equivalent | 10 | L3 | CO1 Loire, — Module -2 fy QS | a] With diagram explain the-enhancement model MOSFET. ‘Drew Deavend [HOE] \co2 | Transconductance curve. 7 ° \ B. | Derive an expression of ip Vos relationship ofS iransistor.> 10 | £3 | COz OR A”. J a. | Derive an expression of DC bias porn afd alge gaicof sill signal [10 [13 ] CO2 operation of MOSFET. g b, | With a neat diagram explain the MOS! Timah 10] 13 | Coz Co ‘Module - 3 % [@S a. | With diag fagrarh explain the R-2R ADC converter derive Vou 10 | L3 | CO3 b.[Derive Ver and f of comparators with non“zero reference to Tinear| 10) 13 | CO3 Amplifier. | a7 r OR Q6 Ja. With neat Giagrani explain the opera amplifier base wein bridge | 10] L3 | CO3 oscillator circuit. b. | Explain the pein of RC phase shift bsllator 10 | £3 | CO3 Modiile - 4 [Q7 Ta. Brietly explo four types of hegative feedback. 10] 13 | Cos b. | With diagram explain the ICVS amplifier circuit. 10[ 13 | Cot JOR @& La. | With diagram explain the passband and stopband attenuation. 10] 13 | COs b. | Explain with circuit diagram of VCVS High pass filter. 10 | 13 | Cod AY Module~ 5: [Q.9 [a. | With neat diagram explain the DC and AC two lond line of VDB amplifier. | 10| L3 | COS b. Derive an fasion of Ay of Class A power amplifier. 10| £3 | COS a 5 OR. (Q407 a. | With circuit and waveform explain the 1- RC triggering circuit. 10] 13 | Cos b.| With néat diagram explain the Triae ~ Diae based bidirectional phase | 10 | L3 | COS entrOlcireuit using SCR. a eeBEC303 / Model Question Paper-I with effect from 2023-24 (CBCSs Scheme) USN Third Semester B.E. Degree Examination Electronic Principles and circuits TIME: 03 Hours Max. Marks: 100 Note: 01. Answer any FIVE full questions, choosing at least ONE question from each MODULE. QNo Question Marks | 100m MODULE-1 p Develop an expression forthe operating point Ie and Vcr for the vollage [10] 13 divider bias cireuit using approximate analysis. Also Calculate the operation point forthe VDB circuit given Vee=10V, RI=10KQ, R2= 2.2KQ. Re= 3.6KQ, RE= 1KQ. By For the circuit shown in Fig 1b, determine the voltage gain and ac_|10 | T3, load voltage if B= 150 Fisv Gat 2 sign the voltage divider bi 1 |i GS Vee=10V, Vest midpoint, stiff voltge divider, collector current ImA, Q bde= 70-200 ®. |For the circuit shown below in Fig 2b, the ac generator has an 1 ([o internal resistance of 6000. for a voltage divider circuit. Determine the output voltage if B = 300 den Fig2b MODULE2 3 [a With neat circuit diagrams, explain biasing of MOSFET by fixing the [10 [13 Page 03 of 02_ BR Te [gate voltage age gain, | 10 Ls ®. With neat circuit diagram, develop an expression for vo eee ier. input impedance and output impedance for common ge ol —T [10 |is @. Develop an expression for drain to sauce voriage for a MOSFI ‘amplifier using drain to gate feedback resistor. : 7 a b. Develop an expression for transconductance in terms of drain current and overdrive voltage. ut 6 L3 ©. With neat circuit diagram, develop an expression for voltage gain, ; ut impedance and output impedance for common source amplifier withot source resistance. MODULE-3 2. With neat circuit diagram, explain the operation of R-2R DAC - = 2 b. For the circuit shown in Fig 5b, the input voltage is a sine wave with pea value of 10V. Determine the trip point. Also plot the input output waveform ay Fig sb c._ With neat circuit diagram, explain the operation of Schmitt trigger. | 6 L2 OR @. With neat circuit diagram, internal diagram of 555 timer and 10 13 waveforms explain the operation of astable multivibrator. b. With neat circuit diagram, explain the operation of wein bridge 10 03 oscillator MODULE-4 a. Classify negative feedback amplifiers and explain each with neat 10] 13 block diagram. b. Calculate the feedback fraction, ideal closed loop gain, percentage error | 5 3 and exact closed loop voltage gain. Use AOL = 100,000 for 741C suv oe | sae ea ‘¢. With neat circuit diagram and expressions, explain current 3 i amplifiers. OR ‘a. Classify the filers and explain the ideal response for each ofthe [10 [L3 Page 02 of 02 KE ey ‘ay BEC303 filters. b. With neat circuit diagrams, explain the operation of first order low pass | 10 3 filter and high pass filter MODULE-5 9 | a. With neat circuit diagram and waveform explain SCR phase control 10] L3 using RC circuit 'b. With neat circuit diagram, explain the operation of UJT andhence [10 | L3 explain how it is used as relaxation oscillator. OR 10 | Make use of break over characteristics to explain the operation of 4 [10 | 13 layer diode Write short notes on IGBT 3 | Explain bi-directional thyristors in brief. 53 Page 03 of 02G3GS SCHEME TEL Bled &e &] ‘ BEC303 Third Semester B.E./B.Tech. Degree Examination, Dec.2023/Jam:2024 | Electronic Principles and) Circuits { * } Time: 3 hrs, cN ote Ie Answer any FIVE ful questions, chogsing ONE il question from each meal ier man's tee, C: Conrieputcomen. Max. Marks: 100 Module =1" oF analysis of voltage divider bias circuit of a] 8 | L1 | COL QT Gad] Explain the simp! transistor. Also list the steps in analy: De | Analyze a VDB Amplifier eirauit with respect to DC cirouil,. AC - model, | 7 ]'L3 | COL AC-T model. ae 5 [13 | cor vt 4 ul Q2 Oru the importance of Coupling capacitor{yexplain the Base ~ Biased | 10) L3 0 ‘amplifier circuit, Support your answer with base current , collector current COI and colléctor. voltage. Also draw its voltage waveforms. D. | Explain the basie idea of Comifion 5 Collector (CC) amplifier. Give the] 6 12 / Cot mathematical relation of AC. Emitter resistance (F_) »:Voltage Gain (Ay) . Input impedance of the base (Zitax) and Input finpetance of the stage rasa at ee) © lance for the credit elow, given Vog=I3V-. | 4 |12| COT eo 420 cl J 75 SModute—2 = OS [a | Biasing by fixing Voss Hot a good approach to bias a MOSFET. Why? | 8 | 12 | CO2 © ~|.Explain biasing by fixing’Vo and connecting’ resistance in the source for “| MOSFET. ‘By B. | Design a fixed Yo and resistance inthe source biasing eireut, to establish | 5 [ L3 | CO drain current Ig 0.5mA , Vi= 1M K, WK = ImA/V? , = 0. Use power supply Voo = 15V. ¢. | Obtain the transfer angdrain, ‘characteristics of n — channel MOSFET and | 7 | L2 | CO2 calculate Drain resistanée” (rs) , Mutual conductance (gm) and (>| | Ampiitication factor (4). (o™%) On Qs 2 [Missa devefopment of Fulani mode Tr the MOSFET. ©] 12] Coz $ Tors tab-hh-s4qri7 =X MAP 6Q - lo 64 ICON I) — SY}~ fo BE Crm, 8 | L2 [coy for par equivarent model explain the small signal ‘equiv’ at oO Bra out sauce saan ar w= — cx ge = WHAT «| 6 | C02 aaa, wen Be =] For a Common Gate (CG) amplifier craft a A Regn 15KO, Ry, = 15KA , Rae = 500» Ro $i Avand Gy. ; ao % Me “as Tantfon ws @] 5 | BE COB \ @ | Explain how an Op ~ amp Jammer eircuit be eonfign fin subtractor. > . ‘CO3 ftibe R DAC| 8 | 12 bof How does The design and-configuration of an Op - rhe ar ‘Contribute to its accuracy and’ performance in converting cHB! igt analog signals? A > 7 [12 | Co3 || Design and draw Wie frequency response of Gorimon source TFET 7 MOSFET amplifiers, z OR as = Cos ar [Deseribe the working oF inverting Schmittrigger circuit. How is Schmit 8 [2 | | trigger'diftérent from regular comparator circuit? Explain with the help o} om Hysteresif curve. ok iN ‘ ©) _ & \$ D. | Explain the working of Colpitis Oscillator with CE.gonsection. 6 | 12 | CO3 “| Explain the Monostab efation of 355 timers, ~ | 6 | 2] C03 = Module=4_ 4 Re - | Explain the four types of Negative feedbaék Amplifier. 8 [Li] co4 Explain the VCVS amplifier. Obtdinaits exact closed — loop voltage gain | 8 | L2 | CO4 and Ideal, Cldsed ~ Loop Voltage gain. loop inpitsimpedance and Clesed loop output. amplifiers Cy [Calculate the Toad poweh, [oad current forthe given VCIS amplifier circu, [4 [2 | COS yee “ +85 Fig. 1) | ‘ a rs z ‘OR ; Explain the Ideal Fesponse of fiers 8] Lt | Coa ¢ 20f3BEC303 'b. | Determine the pole frequency , Q , Cutoff frequency and 34B frequency, | 5 | L2 [ CO4 for the filter eireuit given below : 5 22 Vouk Fig. 86) Vin Sef u Given Ko= 0.99 , Ke= 1.38 , Ks= 18d. 7 «. | Design a Halfwave and Fullwave precision rectifier using Op ~ amp. 7 | 13 | cos < Module-5 = Q9 Ja. ] Explain class A amplifier , inteins of its power gain, Output power , Power] 8 | Li | COS dissipation and efficiency, A C b in clas B push pl miter lane ampli Flow can the erosover 8 | Li | Cos distortion be eliminated? C a © Cafefate The maximum vasistor poweh dsipation and maximum output| 4 | L2 | COS power fot the given circuit. &ky
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