AIR UNIVERSITY

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING

EXPERIMENT NO 13

Lab Title: Experiment No.13

Group Members:
Roshaan Jamil (230702)
Muhammad Ghazanfar Ali (230731)
Husnain Ali (230715)
Daniyal Khan (231489)
Objective:

LAB ASSESSMENT:

Excellent Good Average Satisfactory Unsatisfactory

Attributes (5) (4) (3) (2) (1)

Ability to Conduct
Experiment
Ability to assimilate the
results
Effective use of lab
equipment and
follows the lab safety
rules

Total Marks: Obtained Marks:

LAB REPORT ASSESSMENT:

Excellent Good Average Satisfactory Unsatisfactory

Attributes
(5) (4) (3) (2) (1)

Data presentation

Experimental results

Conclusion

Total Marks: Obtained Marks:

Date: Signature:

EXPERIMENT 13
Counters

Objectives:
 To understand state diagram and state tables.
 To understand synchronous counters and their design.
 To understand Asynchronous counters and their design.  To understand UP, down and UP/Down
counters.
Equipment required:
 ICs as required
 Digital Electronics Trainer

Background Knowledge:
A counter is a device which stores and displays the number of times a particular event or process has
occurred, often in relationship to a clock signal. Counters are used in digital electronics for counting
purpose, they can count specific event happening in the circuit. For example, in UP counter a counter
increases count for every rising edge of clock. Not only counting, a counter can follow the certain
sequence based on our design like any random sequence 0,1,3,2…They can also be designed with the
help of flip flops. They are used as frequency dividers where the frequency of given pulse waveform
is divided. Counters are broadly divided into two categories

1. Asynchronous counter.
2. Synchronous counter.

1. Asynchronous Counter
In asynchronous counter only first flip flop is driven by main clock and the clock input of rest of the
following flip flop is driven by output of previous flip flops. We can understand it by following
diagram. It is evident from timing diagram that Q0 is changing as soon as the rising edge of clock
pulse is encountered, Q1 is changing when rising edge of Q0 is encountered (because Q0 is like clock
pulse for second flip flop) and so on. In this way ripples are generated through Q0, Q1, Q2, Q3 hence
it is also called RIPPLE counter and serial counter. A ripple counter is a cascaded arrangement of flip
flops where the output of one flip flop drives the clock input of the following flip flop.
 2. Synchronous Counter
Unlike the asynchronous counter, synchronous counter has one global clock which drives each flip
flop so output changes in parallel. The one advantage of synchronous counter over asynchronous
counter is, it can operate on higher frequency than asynchronous counter as it does not have
cumulative delay because of same clock is given to each flip flop. It is also called as parallel counter.

Classification of counters

Depending on the way in which the counting progresses, the synchronous or asynchronous counters
are classified as follows.

• Up counters.
• Down counters.
• Up/Down counters.
Up counter:
An “up” counter may be made by connecting the clock inputs of positive-edge triggered J-K flipflops
to the Q' outputs of the preceding flip-flops. Another way is to use negative edge triggered flip-flops,
connecting the clock inputs to the Q outputs of the preceding flip-flops.
Down counter:
The Up counter starts counting from low to high whereas, the down counter starts counting from high
to low.
Up/Down counter:
Bidirectional counters, also known as Up/Down counters, are capable of counting in either direction
through any given count sequence and they can be reversed at any point within their count sequence
by using an additional control input.
In this lab we will use 74xx76, which is JK flip flop. However, any flipflop can be utilized for counter.
The pin configuration is given below:

74xx76

Task 1:
Use JK flip flop from IC 74xx76 to design a circuit that implements 2-bit Asynchronous Up counter.
Steps:
1. Provide the number of flips flops to be used for 2-bit counter along with the state diagram.
2. Draw diagram of your sequential circuit.
3. Present the truth table.

State diagram:
 diagram:

Logic
 diagram:

Hardware Implementation:

Truth Table:

Counter output

Clock Decimal count

𝑸𝑨 𝑸𝑩
 diagram:

1st 0 0 1

2nd 1 1 2

3rd 1 0 3

4th 0 1 0
Task 2:
Use JK flip flop from IC 74xx76 to design a circuit that implements 2-bit Asynchronous down counter.
Steps:
1. Provide the number of flips flops to be used for 2-bit counter along with the state diagram.
2. Draw diagram of your sequential circuit.
3. Present the truth table.

Hardware Implementation:
 diagram:

Logic Diagram:

Truth Table:

Counter output

Clock Decimal count

 diagram:

𝑸𝑨 𝑸𝑩

1st 0 1 1

2nd 1 0 2

3rd 1 1 3

4th 0 0 0
Task 3:
Use JK flip flop from IC 74xx76 to design a circuit that implements 2-bit synchronous down counter.

Steps:
• Provide the number of flips flops to be used for the required counter.
• Present the truth table and excitation table for counter and using these table derive logical expression.
• From the obtained logical expressions draw sequential diagram of the counter.

Truth Table:

Counter output

Clock Decimal count

𝑸𝑨 𝑸𝑩

1st 0 1 1

2nd 1 0 2

3rd 1 1 3

4th 0 0 4
 diagram:

Hardware Implementation:

Logic diagram:
 diagram:

Excitation Table:

Present state Next state A B

𝑄𝐴 𝑄𝐵 𝑄𝐴+𝟏 𝑄𝐵+𝟏 𝐽𝐴 𝐾𝐴 𝐽𝐵 𝐾𝐵
×
0 0 1 1 1 × 1

0 1 0 0 0 × × 1

1 0 0 1 × 1 1 ×

1 1 1 0 × 0 × 1
 Logic equations:
J1=K1=Q0
J0=K0=1J0 = K0 = 1J0=K0=1

Task 4:
Use JK flip flop from IC 74xx76 to design a circuit that implements 2-bit synchronous Up counter.

Steps:
• Provide the number of flips flops to be used for the required counter.
• Present the truth table and excitation table for counter and using these table derive logical expression.
• From the obtained logical expressions draw sequential diagram of the counter.

Truth Table:

Counter output

Clock Decimal count

𝑸𝑨 𝑸𝑩

1st 0 0 0

2nd 0 1 1

3rd 1 0 2

4th 1 1 3
Hardware Implementation:

Logic diagram:
Excitation Table:

Present state Next state A B

𝑄𝐴 𝑄𝐵 𝑄𝐴+𝟏 𝑄𝐵+𝟏 𝐽𝐴 𝐾𝐴 𝐽𝐵 𝐾𝐵
×
0 0 0 1 0 × 1
1
0 1 1 0 1 × ×
×
1 0 1 1 × 0 1
1
1 1 0 0 × 1 ×

Conclusion:
 Counters are fundamental components in digital electronics, used for counting events or dividing
frequency. Asynchronous counters, also known as ripple counters, have sequential flip-flop clocking,
leading to propagation delays, while synchronous counters use a common clock, enabling faster
operation. Counters can be categorized into up, down, and up/down types based on counting
direction. JK flip-flops, such as IC 74xx76, are versatile and often used to design counters. The
design process involves creating state diagrams, truth tables, excitation tables, and logic equations.
These counters are essential for applications requiring counting, timing, and sequencing operations in
digital circuits.