btech-cse-9-sem-microprocessor-and-microcontroller-2012
btech-cse-9-sem-microprocessor-and-microcontroller-2012
com
Name : ……………………………………………………………
Roll No. : …………………………………………………………
Invigilator's Signature : ………………………………………..
CS/B.TECH (CSE/IT/PWE/EEE)/SEM-5/EI-502/2011-12
2011
MICROPROCESSOR & MICROCONTROLLER
GROUP – A
( Multiple Choice Type Questions )
1. Choose the correct alternatives for any ten of the following :
10 × 1 = 10
i) In 8085 the addressable memory is
a) 64 kB b) 1 MB
c) 4 KB d) 16 KB.
ii) The addressing mode of the instruction LDA address is
a) Combined b) Implied
c) Register d) Direct.
iii) The instruction XCHG exchanges the contents of
a) ACC and HL pair
b) BC pair and HL pair
c) DE pair and HL pair
d) HL pair and memory location.
5001 2
CS/B.TECH (CSE/IT/PWE/EEE)/SEM-5/EI-502/2011-12
GROUP – B
( Short Answer Type Questions )
Answer any three of the following. 3 × 5 = 15
2. State the uses of any three special purpose registers
available in 8085 microprocessor.
3. Draw the timing waveform of op-code fetch machine cycle of
8085 microprocessor.
4. Write a subroutine for 1 sec delay using 8085 assembly level
instructions.
5. a) What are the functions of ALE, HOLD and READY
signals ? 3
b) Define machine cycle and instruction cycle. 2
6. a) Give the bit configuration of 8085 flag register. 2
b) Write down the mode-0 control word of 8255 A for the
following : 3
PORT A = input, PORT B not used,
PORT C ( upper ) = input, PORT C ( lower ) = output.
GROUP – C
( Long Answer Type Questions )
Answer any three of the following. 3 × 15 = 45
7. a)What are different interrupts in 8085 ? Give their
locations. Distinguish between maskable and
unmaskable interrupts. 2+2+2
b) After the execution of RIM instruction, the accumulator
contains 49 H. Explain the accumulator contents. 5
c) Which interrupts are marked after the execution of the
following instructions ?
MVI A, 1 DH, SIM. 4
8. a) Discuss the advantages and disadvantages of memory
mapped I/O and I/O mapped I/O scheme. Which
scheme is supported by the 8085 microprocessor and
how ? 3+2
b) Give the hardware and software to interface, one seven-
segment display with 8085 µp whose address is FC 23
H. 6
c) Which addressing mode is used in the above scheme ?
What change is required if address of the display is FCH
? 4
9. a) Describe the different addressiing modes of 8086
microprocessor. 6
b) What are the main functions performed by BIU and EU
unit of 8086 microprocessor ? 5
c) How is pipeline achieved in 8086 microprocessor ? 4
10. Discuss the hardware and software of any microprocessor-
based industrial application.
11. Write notes on any three of the following : 3×5
a) Synchronous mode of data transfer
b) Interrupt Service Subroutine
c) BSR mode of 8255 PPI
d) Designing I/O ports
e) Serial mode of operation using 8085 microprocessor.
5001 4