www.covenantuniversity.edu.

ng

Raising a new Generation of Leaders

CEN 522:Microprocessor Systems

and Interfacing
Module 05: Programming Model in Protected Mode – Part 1 – Addressing

BY CHUKWU, E.C.
 Real-Mode Addressing Review
Logical Address: segment offset

x10H +
While in Real-Mode, the
memory-segments are
all 64-kilobytes in size
(and readable/writable)

Physical Address: Operand’s effective address

Source: www.cs.usfca.edu/~cruse/cs630f06/lesson05.ppt
 Protected-Mode
Mode Addressing
Logical Address: segment-selector segment-offset

Segment Descriptor Table

descriptor
Validity is
Segment Base--address
descriptor + checked
(also Segment-Limit
Segment by CPU
descriptor and Access Rights)
descriptor

Physical Address: Operand’s effective address

Source: www.cs.usfca.edu/~cruse/cs630f06/lesson05.ppt
 Protected Mode vs Real Mode Addressing
• Real mode accesses only the first 1MB
• Protected mode accesses the first 1MB and more
• Real mode: segment register contains segment address
• Protected mode: segment register contains selector

4
 Protected Mode Addressing
• Selector selects a descriptor from a descriptor table
• The descriptor describes the memory segment’s location,
length and access rights
• Selector = 1 key to multiple information

5
 Selectors and Descriptors
• The selector, located in the segment register, selects one of 8192
descriptors from one of two tables of descriptors. The descriptor
describes the location, length, and access rights of the segment of
memory.
• Indirectly, the segment register still selects a memory segment, but
not directly as in the real mode. For example, in the real mode, if
CS = 0008H, the code segment begins at location 00080H. In the
protected mode, this segment number can address any memory
location in the entire system for the code segment, as explained
shortly.

6
 Protected Mode Addressing
• Despite the difference in the way the segment register is interpreted,
protected mode instructions are identical to real mode instructions.
• Most programs written for real mode are compatible with protected
mode.
• Why? Because both use offset address and segment register to access
memory.
• The only difference is the way the microprocessor interprets the content
of the segment register.
• Another difference (80386 and above): the offset register can be 32-bits
32
in the protected mode – meaning the segment lengths can be up to 4GB

7
 Descriptor Tables
• There are two descriptor tables used with the segment registers: one
contains global descriptors and the other contains local descriptors. The
global descriptors contain segment definitions that apply to all
programs, whereas the local descriptors are usually unique to an
application.
• Each descriptor table contains 8192 descriptors, so a total of
16,384 total descriptors are available to an application at any time.
• Since the descriptor describes a memory segment, this allows up to
16,384 memory segments for each application. A memory segment
can be up to 4G bytes in length, this means that an application
could have access to 4G x 16,384 bytes of memory or 64T bytes.

8
 Descriptor Format (80386 – P4)
• As shown below, each descriptor is 8 bytes in length, so the global and
local descriptor tables are each a maximum of 64K bytes in length. The
base address portion of the descriptor indicates the starting location of
the memory segment. The 80386 – P4 use a 32-bit base address that
allows segments to begin at any location in its 4G bytes of memory. The
80286 uses 24-bit
bit and its descriptor format is slightly different.

9
 Descriptor Format (80386 – P4)
• The segment limit contains the last offset address found in a segment.
For example, if a segment begins at memory location F00000H and ends
at location F000FFH, the base address is 00F00000H and the limit is
000FFH.

10
 Descriptor Format (80386 – P4)
• The G bit, or granularity bit: If G = 0, segments can be 1 byte to 1MB in
length (i.e. 00000H to FFFFFH). If G = 1, the value of the limit is
multiplied by 4K bytes, segments can be 4KB to 4GB in length. The limit
is then 00000FFFFH to FFFFFFFFH, if G = 1. This allows a segment length
of 4K to 4G bytes in steps of 4K bytes.

11
 Selector Format
• In the protected mode, the segment register contents (selectors) are
used to select a descriptor from the descriptor table. The segment
register contains a 13-bit
bit selector field, a table selector bit, and a 2-bit
2
requested privilege level field. The TI bit selects either the global
descriptor table (TI = 0 ) or the local descriptor table (TI = 1). Then the
13-bit selector chooses one of the 8192 descriptors from the selected
descriptor table.

12
 Selector Format
• The requested privilege level (RPL) requests the access privilege level of
a memory segment. The highest privilege level is 00 and the lowest is
11. If the requested privilege level matches or is higher in priority than
the privilege level set by the access rights byte, access is granted. For
example, if the requested privilege level is 10 and the access rights byte
sets the segment privilege level at 11, access is granted because 10 is
higher in priority than privilege level 11. Privilege levels are used in
multiuser environments.

13
 Protected Mode Addressing Example
In this illustration, DS contains 0008H, which
accesses the descriptor number 1 from the
global descriptor table using a requested
privilege level of 00. Descriptor number 1
contains a descriptor that defines the base
address as 00100000H with a segment limit of
000FFH.
This means that a value of 0008H loaded into
DS causes the microprocessor to use memory
locations 00100000H–001000FFH for the data
segment with this example descriptor table.

Note that descriptor zero is called the null

descriptor, must contain all zeros, and may not
be used for accessing memory.

14
 Review Questions
1) If the DS register contains 0020H in a protected mode system, which
global descriptor table entry is accessed?
2) If DS = 0103H, in a protected mode system, the requested privilege
level is _________.
3) If DS = 0105H, in a protected mode system, which entry, table, and
requested privilege level are selected?

15
 Sources and Further Reading
• The Intel Microprocessor, Architecture, Programming and
Interfacing, 6th Ed., by Barr B Brey.
Brey

16