S Module: BASIC SURVEYING PROJECT PLANNING

Code:
Competency: CARRY OUT BASIC SURVEYING PROJECT PLANNING
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Competence

RQF Level: 4 Learning Hours

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Credits: ……

Sector: CONSTRUCTION AND BUILDING SERVICES

Trade: LAND SURVEYING

Module Type: SPECIFIC

Curriculum: …………………………….

Copyright: © ………………………..

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Purpose statement …………………………………………………………………………………………..
Learning assumed to …………………………………………………………………………………………..
be in place
Delivery modality Training delivery 100% Assessment Total 100%
Theoretical content 30% 30%
Practical work:
 Group work 30% Formative
and 50%
70% assessment 70%
presentation
 Individual 40%
work
Summative Assessment 50%

Elements of Competency and Performance Criteria

Elements of competency Performance criteria

1.Develop risks 1.1: Risks associated to a surveying project are clearly analyzed inline with the
management plan project scope.
1.2: Risk response plans are properly developed based on the analysis done.

1.3: Risks are properly monitored and checked to ensure a continuous risk
management.
2.Create a Project 2.1: Work structure is efficiently broken down into small work packages in line with
scheduling plan the scope of the project.
2.2: Tasks relationship is appropriately identified according to their types.

2.3. Duration is accurately estimate for each work activities with reference to their
scope.
2.4. Resources are appropriately assigned for each work activity according to their
requirements.
2.5. The Gantt chart is accurately elaborated according the scheduled activities.

3.Elaborate Cost 3.3. Project Resource plan is appropriately elaborated with reference to the work
management plan breakdown structure.

3.3. Cost estimation is accurately calculated in line with the estimation techniques
 used.

3.3. Project budget is accurately estimated with reference to the project resources.
3.3. Cost control plan is suitably established according to the project schedule and
budget.

3.4. Cost control plan is suitably established according to the project schedule and
budget.
4. Elaborate monitoring and 4.1. Monitoring tools are appropriately developed according to the project
Evaluation plan scheduling plan

4.2. Monitoring plan is properly developed in line with time, cost, risks and scope
of the project

4.3. Evaluation tools are appropriately developed according to the project

scheduling plan

4.4. Evaluation plan is properly developed in line with time, cost, risks and scope of
the project

Course content

Learning outcomes At the end of the module the learner will be able to:

1.Develop risks management plan

2. Elaborate Cost management plan
3. Elaborate monitoring and Evaluation plan
4. Create a Project scheduling plan

Learning outcome 1: Develop risks Learning hours: …

management plan

Indicative content

 Analyse risks associated to a surveying project

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Resources required for the learning outcome

Equipment 
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Materials 
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Tools 
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Facilitation techniques 
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Formative assessment 
methods /(CAT)
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Learning outcomes At the end of the module the learner will be able to:

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Learning outcome 1:
…………………… Learning hours: …
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Indicative content

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Resources required for the learning outcome

Equipment 
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Materials 
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Tools 

Facilitation techniques 
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Formative assessment 
methods /(CAT)
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Learning outcomes At the end of the module the learner will be able to:

……………………………………………………………………………
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Learning outcome 1:
…………………… Learning hours: …
……………………………………………………………………
..

Indicative content

 …………………………………………………………………………………………..
 …………………………………………………………………………………………..
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Resources required for the learning outcome

Equipment 
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Materials 
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Tools 

Facilitation techniques 

Formative assessment 
methods /(CAT)



Integrated/Summative assessment

Integrated situation

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Resources
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Equipment 
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Materials/ Consumables 
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Assessment criteria Marks

Observation
Assessable outcomes (Based on performance allocation
Indicator
criteria) Yes No
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1. …

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2. ………………… ………………… ………………… ………………

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Total marks …..
Percentage Weightage 100%
Minimum Passing line % (Aggregate): 70%
List of abbreviations

1. BIOS: Basic input and output system

2. CAT: Common Admission Test

3. HDD: Hard Disc Drive

4. ISO: (independent system operator) International Organization for Standardization

5. MIS: Management Information System

6. MSI: Medium Scale Integration

7. OS: Operating System

8. PPEs: Personal Protective Equipment

9. RJ: Registered Jack

10. SSD: Solid State Drive

11. UEFI: Unified extensible firmware interface

12. UPS: Uninterruptible Power Supply

13. USB 2.0 : Universal serial bus version 2

References
1. Peterson, J. L. and Silber Schantz, A. (1985), Operating System Concepts. Addison-
Wesley, Reading, MA. Silberschatz, A., P.
2. Galvin, and G. Gagne (2003), Applied Operating System Concepts, 1st ed., John Wiley &
Sons, Inc., Danvers, MA.
3. Silberschatz, A., P. Galvin, and G. Gagne (2003), Applied Operating System Concepts, 1st
ed., John Wiley & Sons, Inc., Danvers, MA.
4. Hayhoe, S. (2012) Using an iPad as an assistive device to improve technical literacy:Trial
usage with an Emirati student. E-Learning in Action, HCT Educational Technology Series
1, HCT Press, pp. 197-205, ISBN 978-9948-16-864-5
5. Linda Null; Julia Lobur (2006). The essentials of computer organization and architecture
(2nd ed.).Jones & Bartlett Learning. pp. 33,179–181. ISBN 978-0-7637-3769-6.
6. C. Gordon Bell; R. Cady; H. McFarland; B. Delagi; J. O'Laughlin; R. Noonan; W. Wulf
(1970). "A New Architecture for Mini-Computers—The DEC PDP-11"(PDF). Spring Joint
Computer Conference: 657– 675.
Glossary

its operational functionality and

. performance.
Activity: Activities include releases, events,
Artifact: A deployable item such as a file,
and deployment plans that you develop,
image, database, configuration material, or
start, and complete with the product.
anything else that is associated with a
API: An interface that allows an application
software project. By default, artifacts are
program that is written in a high-level
stored in Code Station repository.
language to use specific data or functions of
the operating system or another program. ASIC: Application Specific Integrated Circuit.
Application environment: A user-defined A chip that is designed to fulfill a specific
collection of resources that hosts an task in a computer system.
application. These application environments
refer to environments that are created to Cache: Small, fast memory close to the CPU

be in the product. that can hold a part of the data or

Application process: A process that is instructions to be processed. The primary or

associated with an application. Unlike a level 1 cache are virtually always located on

component or generic process, an the same chip as the CPU and are divided in

application process is created from a cache for instructions and one for data. A

application-level steps. secondary or level 2 cache is mostly located

Application: One or more computer off-chip and holds both data and

programs or software components that instructions. Caches are put into the system

provide a function in direct support of a to hide the large latency that occurs when

specific business process or processes. See data have to be fetched from memory. By

also application server. loading data and or instructions into the

caches that are likely to be needed, this
Architecture: The internal structure of a latency can be significantly reduced.
computer system or a chip that determines
Capability computing: A type of large-scale Component process: A process defined for
computing in which one wants to the deployment of components.
accommodate very large and time Component: A representation of
consuming computing tasks. This requires deployable items and the user-defined
that parallel machines or clusters are processes that operate on them, usually by
managed with the highest priority for this deploying them.
type of computing possibly with the
Control processor: The processor in a
consequence that the computing resources
processor array machine that issues the
in the system are not always used with the
instructions to be executed by all the
greatest efficiency.
processors in the processor array.
Capacity computing: A type of large-scale Alternatively, the control processor may
computing in which one wants to use the perform tasks in which the processors in the
system (cluster) with the highest possible array are not involved, e.g., I/O operations
throughput capacity using the machine or serial operations.
resources as efficient as possible. This may
Deployment: The activities used to deliver a
have adverse effects on the performance of
software project to a deployment target.
individual computing tasks while optimising
Typically, you run deployments for each
the overall usage of the system.
stage of your release lifecycle, ending with
Clock cycle: Fundamental time unit of a the production stage when the software
computer. Every operation executed by the becomes generally available.
computer takes at least one and possibly Duration: The time a task takes to run.
multiple cycles. Typically, the clock cycle is Duration is measured from the time a task
now in the order of one to a few starts until it is resolved. When you create
nanoseconds. some task types, you can estimate its
expected duration. Duration is reported in
Clock frequency: Reciproke of the clock
minutes.
cycle: the number of cycles per second
Environment: A collection of resources that
expressed in Hertz (Hz). Typical clock
identify the components that can be
frequencies nowadays are 400 MHz--1 GHz.
deployed by the parent application and the Initative: An action to take for the change
agents that do the work. occurred.
Insights: A set of related features such as
EPIC: Explicitly Parallel Instruction
metric data dashboards, reports, and the
Computing. This term is coined by Intel for
application portfolio.
its IA-64 chips and the Instruction Set that is
defined for them. EPIC can be seen as Very Instruction Set Architecture: The set of
Large Instruction Word computing with a instructions that a CPU is designed to
few enhancements. The gist of it is that no execute. The Instruction Set Architecture
dynamic instruction scheduling is (ISA) represents the repertoire of
performed as is done in RISC processors but instructions that the designers determined
rather that instruction scheduling and to be adequate for a certain CPU. Note that
speculative execution of code is determined CPUs of different making may have the
beforehand in the compilation stage of a same ISA. For instance the AMD processors
program. This simplifies the chip design (purposely) implement the Intel IA-32 ISA
while potentially many instructions can be on a processor with a different structure.
executed in parallel.
Integration: Regular communication
Events: Release-related activities that are between IBM UrbanCode Velocity and
applied to releases and tracked with a external products and services.
calendar. You can use events to organize Communication with integrated products
your releases and other time-dependent can be bidirectional.
activities, such as holidays and blackouts. Lifecycle: The phases in a release. A
lifecycle is a template for the stages of work
Functional unit: Unit in a CPU that is
in a release.
responsible for the execution of a
predefined function, e.g., the loading of Multithreading: A capability of a processor
data in the primary cache or executing a core to switch to another processing
floating-point addition. thread, i.e., a set of logically connected
instructions that make up a (part of) a
process. This capability is used when a
process thread stalls, for instance because RISC: Reduced Instruction Set Computer. A
necessary data are not yet available. CPU with its instruction set that is simpler in
Switching to another thread that has comparison with the earlier Complex
instructions that can be executed will yield Instruction Set Computers (CISCs) ne cycle.
a better processing utilization.
Role: A job function that identifies the tasks
PCI bus: Bus on PC node, typically used for that a user can perform and the resources
I/O, but also to connect nodes with a to which a user has access. A user can be
communication network. The bandwidth assigned one or more roles.
varies with the type from 110-480 MB/s. Segment: A period of time in a deployment
Newer upgraded versions PCI-X and PCI plan. Deployment plans can group tasks
Express are (becoming) available presently. into segments to specify when tasks are run
relative to each other.
Plugin: A separately installable software
module that adds function to an existing Shared Memory (SM): Memory
program, application, or interface. configuration of a computer in which all
processors have direct access to all the
Register file: The set of registers in a CPU
memory in the system. Because of
that are independent targets for the code
technological limitations on shared
to be executed possibly complemented
bandwidth generally not more than about
with registers that hold constants like 0/1,
16 processors share a common memory.
registers for renaming intermediary results,
and in some cases a separate register stack Task: Represents a business-meaningful
to hold function arguments and routine activity that has starting and ending points
return addresses. and a measurable duration. Durations are
used to estimate deployment times. You
Resource: A user-defined construct that is
add tasks to deployment plans. When you
based on the architectural model of IBM
run a deployment, you complete the tasks
Urban Code Velocity. A resource represents
in the plan
a deployment target.
User: A representation of an account on the
server. Users can be members of teams and
groups. User can be created in IBM Version: A representation of an IBM
UrbanCode Velocity server or import users UrbanCode Deploy application snapshot.
from an external authentication realm,
Virtual Shared Memory: The emulation of a
including an LDAP, Active Directory, or SSO
shared memory system on a distributed
provider.
memory machine by a software layer.