0% found this document useful (0 votes)
12 views2 pages

MQP 1

Maths BCS301 MODEL QP

Uploaded by

Aditi Jagannath
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF or read online on Scribd
0% found this document useful (0 votes)
12 views2 pages

MQP 1

Maths BCS301 MODEL QP

Uploaded by

Aditi Jagannath
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF or read online on Scribd
You are on page 1/ 2
Model Question Paper- II with effect from 2022 ICBCSISCHEME Third Semester B.E Degree Examination, Digital Design and Computer Organization (BCS302) 1, Note: Answer any FIVE full questions, choosing at east ONE question from each MODULE 2. M: Marks, L: Bloom's level, C: Course autcomes. MaxMarks:100 Module - 1 M{Lic Qi ‘Demonstrate the working of NAND & XOR gate. 6 | LI col Explain the working of Test Bench in Verilog. 6 | 12 / cor ‘Simplify the following Boolean function into (i) sum-of-produets form and_| 8 [13 | COI (ii) product-of-sums form: F(A, B,C, D) = 3(0,6,8, 13, 14) (A, B, C, D) = X(2, 4, 10) OR ‘Write a program in Verilog to demonstrate the working of User-Defined) 6 | L3 | CO1 Q2 primitive table, Realize F= AB + CD using NAND gate only. 6 | Li | Cor ‘Simplify the following Boolean Expression using kmap: 8 | 13) Cor F(A, B,C, D) = %(0,1,3,7,8, 9, 10, 13,15) F(w,x, yz) = %(0,1,2,4,5, 6,7, 10,15) Module - 2 Q3 | a [Explain Dataflow Modeling in Verilog with an example program. 6 | 12 | Coz Design a Full Adder and Subtractor Circuit. 6 | 13 | Coz Design an Octal-to-Binary Encoder. 8 | 13 CO2 OR Q4 Explain the working of Four-bit adders using 4-Full Adders. | 6 | £3 | Coz Design a BCD-to-excess-3 code converter. 6 | 13 | Co2 Demonstrate the working of SR Latch and Flge-Triggered D Flip-Flop. | 8 | 12 | CO2 Module - 3 Qs Describe the Big-endian and little-endian address assignment. 5/12) Co3 Model Question Paper- II with effect from 2022 b | Demonstrate the Instruction Execution and Sequencing forC —[A]+[B] | 8 with block diagram. ‘¢ | With a block diagram, explain the basic functional units of a computer. 7 | 12 {Cos OR a | With relevant example, Explain the following modes of Addressing: 10 | L2 | Co3 Q6 i) Direct ii) Register iii) Index iv) Base with index and offset v) Autoincrement b |Aprogram with 7000 machine instructions needs an average of 3 basic steps | 5 | L3 | CO3 to execute one instruction. Find the performance of the computer having a clock speed of 700 KHz. ‘¢ | What are Condition Code Flags? Mention the significance of the flags N,Z, | 5 | L1 | CO3 Vand C. Module - 4 Q.7 | a [Describe DMA with its registers and controllers. 10 | 12 | Coa b | Explain the effect of size, cost and speed in Memory Hierarchy. 10 | 13 | Coa OR Q.8 | a [Explain Hardware Interrupt, enabling/disabling of Interrupts and sequence of| 10 | L2 [ CO4 events in handling interrupt request from a single device. b | Describe the different memory mapping functions. 10 | L2 [Coa Module - 5 Q.9 | a [Describe how an ALU performs an Arithmetic and Logic Operations along] 10 [ L3 [ COS with input gating diagrams. b | Explain 4-stage pipeline with diagrams. 10 | 12 | Cos OR Q.10| a [Explain the complete set of operations involved in executing the instruction | 10 | L4 | COS ‘Add (R3), R1 along with control sequence. b | What are Hazards? Explain Data Hazard, Control Hazard and Structural 10 | £2 | Cos Hazard.

You might also like