SDQ ECE 445 Assignment
SDQ ECE 445 Assignment
NOTE: The program written has to be converted into appropriate binary form, because microcomputer
understands only binary numbers.
1) MACHINE LANGUAGE: it consist of binary or hexadecimal code that specify action to be performed or
data element. A machine language Program for one microcomputer with not run on another
microcomputer due to aunique set of machine Instruction in each microcomputer.
*Micro instruction: is the smallest event that can take place within a computer.
Each Instruction in an assembly language. Program is composed of three or four field as follows.
(3) HIGH LEVEL LANGUAGE: it comprises of english type statement designed to rectify the Problem in
assembly and machine language Programming. High level language aid a computer program to have a
direct control of the hardware and uses more memory than other computer languages.
ADVANTAGE
i. The Programmer does not need to be familiar with microprocessor Internal architecture or It
instruction set
iii. Each statement of the program is equivalent to a member of assembly or machine language
Instruction.
DISADVANTAGE
*INSTRUCTION FORMATS
(1) Zero-address instruction format: An instruction that does not require any address is called a
zero-address Instruction format; Examples are STC (set carry flag), NOP (no oporation) RAL(rotate
accumulator left), RET (return from exception).
*ADDRESSING MODES
*Instruction Cycle: are sequence of operation that a microprocessor have to carry out while executing an
Instruction.
*Addressing mode: is the manner in which the microprocessor accomplishes the instruction cycle task. In
other manner words, addressing mode is the manner in which the microprocessor Calculates the
addresses of source & destination registers.
1. Inherent/Implied Addressing Modes: The Instructions using this mode have no operands.Eg STC,
CMA, NOP, RET
2. Immediate Addressing Mode: Whenever an Instruction contains the operand valve. The symbol #
usually indientes that an instruction is in immediate Mode.
3. Direct Addressing Mode: Instruction using this mode specify the effective address of the Operand as
Part of the instruction. Instruction using this mode contain three bytes.First byte is the op-code and two
bytes represent the address of data
4. Register Addressing Mode: This mode specifies the register or register pair that contains data ie
operand valves are held in microprocessor registers.
5. Register Addressing Indirect Mode:. Whenever an instruction specifies a microprocessor register that
holds the address of an operands the resulting addressing mode is known as the register indirect mode.
6. Memory Indirect Addressing Mode: Sometimes, it is possible that an instruction may contain the
address of an operand.
7. Address Made Base on Address Modification: effective (EA) of an operand is expressed as a Sum of
two parameters known as Modifier M the displacement the offset or and the reference address . EA=
RA + M
-Indexed Register
A program can select a particular segive instructions to execute based on the results of computation. In
assembly language programming, the instruction that could be used to realize this idea are Called
program Control Instructions.
SUB.B Number, D3
These means; Subtract 8-bit number Stored in memory location named number from the contents of a
data register D3.
*ASSEMBLER: Is a program that translates symbolically written programs in assembly language into
machine language.
One-Pass Assember: This assembler scans through the assembly language program once and translates
the assembly language program into a machine Language Program.
Two-Pass Assember: This assembler scans the assembly language program twice.
Macro assembler: This type of assembler translates a program written in macrolanguage into the
machine language.
Resident Assembler: This type of assemblen a assembles programs for a microprocess or in which it is
resident.
Cross Assembler: The cross assembler program is written in a high level language, so that it can run on
different types of processors that understand the same high-level language
Meta-Assembler: This type of asser bler can assemble programs for many different types of
microprocessor, The programmer usually defines the particular proessor being used.
ASSEMBLER SYNTAX -Label field Mnemonic/OP-Code field Operand field Comment field
ASSEMBLER DIRECTIVE The Pseudo-Instructions are not directly translated into machine language
instruction. Assemble uses pseudo-instruction or directives to make the formatting of the edited text
easier.
- ORIGIN (ORG)
- EQUATE (EQU)
-TITTLE (TTL)
ORIGIN (ORG): The pseudo instruction ORG lets the programmer place the programs any where in the
memory. ORG address tells the assemble to load the program into memory Starting at the Specified
address. Similarly the ORG pseudo-instruction causes the assembler to Place a new value in the address
counter.
EQUATE (EQV): assign a value in Its operand field to an address in. Its label field. This allows the user to
assign a numeric value to a Symbolic name.
This Pseudo cada instruction assiges the valve 0200 in bexadecimal to the abel START.
DEFINE BYTE (DB): The Pseudo instruction DB is usually used to set a memory location to a certain byte
value.
DEFINE CONSTANT (DC) is a rective to the assembler to set up one or more data values as constant in
memory.
MC68000 can be operated in two modes; user modes and Supervisor mode.
- The user mode is used to execute user programs while the supervisor made is used to Implement
operating system and protection features by the microprocessor.
*MC 68000 supports tive different data types 1-bit 4-bit BCD digits B-bits (byte) -16-bits (word) a C
32-bits (long word)
- Its instruction set includes 56 basic instruction types, 14 addressing mates and over 1000 op-codes.
It has no input 8 output instruction, hence, all input & output are memory mapped
It has eight data registers and nine address registers including the supervisor stack pointer.
*PROGRAMMING MODEL
The programming model of a microprocessor describes in detail all registers that are available in
microprocessor to a programmer, which can be manipulated, MC68000 has adequate registers for
various manipulations.
*Data Registers: The Processor has eight 32bit data registers (Do-D7). Data registers hold artithmetic
valves and data item in form of 1-bit, 8-bit (byte), 16-bit word, 32 bit long word and 4-bit BCD numbers.
Address Registers: There are nine, 32 bit address registers, (A0 through A7 Plus A7') address registers are
used to hold memory pointers (addresses) and index values of an operand.
Program Counter: The Program Counter PC keeps track of the address of next Instruction to be executed.
It alway contains the address of the next In memory to be Instruction to be executed. PC is a 32-bit long
register.
- Carry (C): Carry flag can either be set (1) or Cleared (0). It is set it arithmetic and logical operation
carried out results in a carry or borrow bit from bit 7 to bit 8 in a destination data register.
Overflow (V): flag is level of one if the set to logical result of manipulation is larger than the destination
register, that is the result is no longer reliable
-zero (2): 2 flag is set (1), if result of arithmetic and logical operations is equal to numerical value -
zero.otherwise, the z flag is Clear.
-Extend (x): is similar to carry flag be cause they are always affected the same way as carry flag but
extend flag is used in multi-precision instructions such as ADDX & SUBX.
-Negative (N) is set (1) if result of arithmetic & logical operations. is equal to negative numerical Value
- Supervisor Flag: is set to one the System operate in the supervisory mode, otherwise, the user mode
operation is assumed.
ADDRESSING MODE
- MC68000 microprocessor's addressing mode can be divided into six basic groups:
i. Register Direct
*INSTRUCTION SET
- MC68000 contains 56 basic instructions. The Instruction set repertoire is very versatile and allows an
efficient means to handle HLL structures like linked lists and array . ALL MC68000 Imstruction may be
classified into eight groups.
LOGICAL INSTRUCTIONS
DATA MOVEMENT INSTRUCTIONS E G (DMI): allow: data transfers from register to memory, memory to
register memory to memory. to register, There are eleven data movement Instructions in MC68000.
-MOVE, MOVEM, MOVED, MOVEQ, MOVEA, EXG, SWAP, LEA, PEA, LINK and UNLINK. P MOVE
INSTRUCTIONS
(2) MOVEA: The instruction moves data from the effective address of source operand to an address
register. The assemble Syntax is MOVEA S (EA), A
(3) MOVEM: When data are pushed the stack pointer is decremarit led by the data size and incremented
by the data size when data are pushed onto the stack.
(4) MOVE Q : instruction moves the Immediate 8-bit data in the instruction into the specified data
register. Assembler Syntax: MOVEQ#data,Dn
(5) MOVED Instruction transfers data between data register (Dn) and alternate byte of memory
locations, Starting at the location Specifica by "d (Ay)" and incremented by the operand size. Syntax:
MOVEP Dn,d(Ay) or MOVEP Pd (AY), Dn
EXG: instruction exchanges the 32- Bit contents of two registers. SYNTAX: EXG Rx,Ry
Load Effective Address [LEA] Instruction moves an effective address (EA) from source operand Into a
specified address.register CAN). SYNTAX: LEA (EA), An
PEA: instruction computes an effective address and then pushes it (32-bit address) onto the Stack.
SYNTAX: PEA (EA)
LINK: is usually used at the beginning of a subroutine to allocate stack space for stering local variables
and parameters for nested subroutine calls. SYNTAX! LINK An, # - displacement
UNLNK: is used at the end of - Subroutine before the RETURN Instruction to release the reserved local
area & restore the Stack - Pointer contents. SYNTAX: UNLK An An —> SP; (SP) + An
(2) ARITHMETIC INSTRUCTIONS are used to manipulate data. "It allows the following
F. Test & set instruction which can be used for synchronization In a multiprocessor System.
ADDITION:There are various types of addition instructions depending on the state of source operand.
* ADDQ instruction adds Immediate Integer data between 0 & 7 to the register or memory location in
the destination operand.