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Chapter 10

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Chapter 10

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iucgajjar5386
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Chapter 10

Linear Oriented Graphs (Connected Graph,


Subgraphs and Some Special Subgraphs)

Linear Oriented Graphs: A Deep Dive

Understanding Linear Oriented Graphs

A linear oriented graph, often simply referred to as a directed path or dipath, is a

specific type of directed graph where vertices are arranged in a linear sequence, and

edges are directed from one vertex to the next. This linear structure makes them

fundamental building blocks in various graph-theoretic concepts and algorithms.

Key Characteristics:

1. Linear Structure: Vertices are arranged in a straight line.

2. Directed Edges: Edges have a specific direction, typically from a vertex with a

lower index to a vertex with a higher index.

3. No Cycles: There are no cycles or loops in the graph.

Connected Graphs and Linear Oriented Graphs

A connected graph is a graph where there is a path between every pair of vertices. In

the context of linear oriented graphs, every vertex is connected to its adjacent vertices,

making it inherently connected.

Subgraphs and Linear Oriented Graphs


A subgraph is a graph derived from a larger graph by removing vertices or edges (or

both). For a linear oriented graph, a subgraph can be obtained by:

● Vertex Removal: Removing one or more vertices and their incident edges.

● Edge Removal: Removing one or more edges.

Special Subgraphs of Linear Oriented Graphs:

1. Induced Subgraph: A subgraph obtained by removing vertices. The edges

between the remaining vertices are preserved.

2. Spanning Subgraph: A subgraph that includes all vertices of the original graph.

3. Path: A sequence of vertices connected by edges. In a linear oriented graph,

every path is a subgraph.

Applications of Linear Oriented Graphs

Linear oriented graphs find applications in various fields, including:

● Computer Science:

○ Data Structures: Linked lists, queues, and stacks can be represented as

linear oriented graphs.

○ Algorithms: Dynamic programming, topological sorting, and breadth-first

search often involve linear oriented graphs.

● Biology:

○ Genetic Sequences: The linear arrangement of nucleotides in DNA can be

modeled as a linear oriented graph.

● Operations Research:

○ Project Scheduling: The sequence of tasks in a project can be

represented as a linear oriented graph.

Visual Representation of a Linear Oriented Graph:


The Incidence Matrix of a Linear Oriented
Graph

Incidence Matrix of a Linear Oriented Graph

An incidence matrix is a useful tool to represent the structure of a graph, including a

linear oriented graph. It's a matrix that shows the relationship between vertices and

edges.

For a linear oriented graph, the incidence matrix has a specific structure:

● Rows: Each row corresponds to a vertex.

● Columns: Each column corresponds to an edge.

Entries:

● +1: If the edge originates from the vertex.

● -1: If the edge terminates at the vertex.

● 0: If the edge is not incident on the vertex.

Example:
Consider a linear oriented graph with 4 vertices (A, B, C, D) and 3 edges (AB, BC, CD).

AB BC CD
A 1 0 0
B -1 1 0
C 0 -1 1
D 0 0 -1

Observations:

● Each column has exactly one +1 and one -1: This reflects the fact that each edge

originates from one vertex and terminates at another.

● The sum of each column is 0: This is a property of incidence matrices.

Applications of Incidence Matrices:

● Graph Analysis: Used to analyze graph properties like connectivity, cycles, and

planarity.

● Network Analysis: Used in network flow problems, electrical circuit analysis, and

transportation networks.

● Computer Science: Used in data structures and algorithms, particularly in graph

algorithms.

By understanding the structure of incidence matrices, you can efficiently represent and

analyze linear oriented graphs, as well as more complex graph structures.

Kirchhoff's Laws in Incidence Matrix


Formulation
Kirchhoff's Laws and Incidence Matrices
Kirchhoff's laws, fundamental to circuit analysis, can be elegantly expressed in matrix

form using the incidence matrix of a circuit graph.

Kirchhoff's Current Law (KCL)

KCL states that the algebraic sum of currents entering a node is zero. In matrix form,

this can be expressed as:

A * I = 0

Where:

● A is the incidence matrix of the circuit graph.

● I is a column vector of branch currents.

Each row of the equation represents KCL applied to a specific node.

Kirchhoff's Voltage Law (KVL)

KVL states that the algebraic sum of voltages around any closed loop in a circuit is zero.

This can be derived from the concept of potential differences across branches.

While KVL isn't directly expressed in terms of the incidence matrix, it can be indirectly

related to the loop matrix, which is derived from the incidence matrix. The loop matrix

can be used to formulate KVL equations.

Example:

Consider a simple circuit with 3 nodes (A, B, C) and 3 branches (AB, BC, CA).

AB BC CA
A 1 0 -1
B -1 1 0
C 0 -1 1
KCL equations:

● Node A: I_AB - I_CA = 0

● Node B: -I_AB + I_BC = 0

● Node C: -I_BC + I_CA = 0

These equations can be written in matrix form as:

[ 1 0 -1 ] [I_AB] [ 0 ]
[-1 1 0 ] * [I_BC] = [ 0 ]
[ 0 -1 1 ] [I_CA] [ 0 ]

Applications:

● Circuit Analysis: Used for solving complex circuits, especially those with many

nodes and branches.

● Network Analysis: Applied to various network problems, including power systems

and communication networks.

● Control Systems: Used in the analysis and design of control systems.

By leveraging the power of linear algebra, Kirchhoff's laws can be efficiently applied to a

wide range of circuit and network analysis problems.

Nodal Analysis of Networks

Nodal Analysis: A Step-by-Step Guide


Nodal analysis is a powerful technique for analyzing electrical circuits. It focuses on

determining the node voltages, which are the voltage differences between nodes and a

reference node (often ground).

Steps Involved:

1. Identify the Nodes:

○ A node is a point where two or more circuit elements connect.

○ Choose a reference node (ground) and label the remaining nodes.

2. Assign Node Voltages:

○ Assign a variable to the voltage at each non-reference node.

3. Apply Kirchhoff's Current Law (KCL):

○ At each non-reference node, write an equation stating that the sum of

currents entering the node equals the sum of currents leaving the node.

○ Use Ohm's Law to express currents in terms of node voltages and

resistances.

4. Solve the System of Equations:

○ Solve the system of equations obtained in step 3 to determine the node

voltages.

○ This can be done using techniques like substitution, elimination, or matrix

methods.

Example:

Consider the following circuit:


1. Identify Nodes:

○ Node 1: The node connected to the positive terminal of the voltage source

○ Node 2: The node connected to the negative terminal of the voltage

source (ground)

2. Assign Node Voltages:

○ V1: Voltage at node 1

3. Apply KCL at Node 1:

○ (V1 - 10V)/R1 + V1/R2 + V1/R3 = 0

4. Solve the Equation:

○ Substitute the resistance values and solve for V1.

Key Points:

● Reference Node: Choosing a suitable reference node simplifies the analysis.

● Supernode: If a voltage source is directly connected between two non-reference

nodes, treat them as a supernode and write a single KCL equation for both

nodes.
● Dependent Sources: Handle dependent sources by expressing their currents or

voltages in terms of node voltages.

● Matrix Methods: For larger circuits, matrix methods like Gaussian elimination or

matrix inversion can be used to solve the system of equations efficiently.

Advantages of Nodal Analysis:

● Systematic Approach: It provides a structured way to analyze circuits.

● Versatility: It can be applied to a wide range of circuits, including those with

dependent sources and op-amps.

● Efficiency: Matrix methods can be used to automate the solution process for

larger circuits.

By mastering nodal analysis, you can effectively analyze complex electrical circuits and

design efficient electronic systems.

The Circuit Matrix of a Linear Oriented

Graph
Circuit Matrix of a Linear Oriented Graph

Understanding the Circuit Matrix

A circuit matrix, often denoted as B, is a matrix used in graph theory and circuit analysis

to represent the relationship between branches and independent loops in a graph. For a

linear oriented graph, this concept is particularly straightforward.

Linear Oriented Graphs and Circuits


A linear oriented graph, as the name suggests, is a graph where vertices are arranged

in a linear sequence, and edges are directed from one vertex to the next. In such a

graph, there are no independent loops. Each edge essentially forms a trivial loop.

Circuit Matrix for a Linear Oriented Graph

Given the absence of independent loops, the circuit matrix for a linear oriented graph is

a null matrix.

Why a Null Matrix?

● No Independent Loops: As mentioned, a linear oriented graph doesn't have any

closed paths or loops that are independent of each other.

● Definition of Circuit Matrix: A circuit matrix is defined based on the presence of

independent loops. Since there are none in a linear oriented graph, the matrix is

empty.

Visual Representation:

For this graph, the circuit matrix B would be:

B = [ ]
Applications in Circuit Analysis

While circuit matrices are a powerful tool for analyzing complex networks with multiple

loops, their application to linear oriented graphs is limited. However, understanding the

concept of circuit matrices and their relationship to graph topology is essential for more

advanced circuit analysis techniques.

In conclusion, the circuit matrix for a linear oriented graph is a null matrix due to the

absence of independent loops. This understanding is crucial for applying graph theory

concepts to circuit analysis and other engineering disciplines.

Kirchhoff's Laws in Fundamental Circuit

Matrix Formulation
Kirchhoff's Laws and the Fundamental Circuit Matrix

Fundamental Circuit Matrix

The fundamental circuit matrix, often denoted as B_f, is a matrix that represents the

relationship between branches and fundamental loops in a graph. A fundamental loop is

a loop that contains exactly one branch that is not part of any previously defined tree.

Kirchhoff's Voltage Law (KVL) and B_f

KVL states that the algebraic sum of all the voltages around any closed loop in a circuit

is zero. This law can be expressed in matrix form using the fundamental circuit matrix:

B_f * V = 0
Where:

● B_f is the fundamental circuit matrix.

● V is a column vector of branch voltages.

Each row of the equation represents KVL applied to a fundamental loop.

Example

Consider the following circuit:

The fundamental circuit matrix for this circuit can be determined by choosing a tree (a

subgraph that includes all nodes without forming any loops). Let's choose the tree with

branches R1 and R2. The fundamental loops are then:

● Loop 1: R1, R3, and the voltage source

● Loop 2: R2, R3, and the voltage source

The fundamental circuit matrix B_f is:

B_f = [ 1 0 1 ]

[ 0 1 1 ]
Applying KVL to each loop:

● Loop 1: V1 - I1R1 - I3R3 = 0

● Loop 2: -I2R2 - I3R3 + V1 = 0

This can be written in matrix form as:

[ 1 0 1 ] [ V1 ] [ 0 ]

[ 0 1 1 ] * [ I1*R1 ] = [ 0 ]

[ I3*R3 ]

Key Points:

● The fundamental circuit matrix provides a systematic way to write KVL equations

for a circuit.

● By choosing a suitable tree, the number of independent loops and hence the size

of B_f can be minimized.

● The fundamental circuit matrix can be used in conjunction with other techniques

like nodal analysis to solve complex circuits.

Loop Analysis of Electrical Networks

Loop Analysis: A Comprehensive Guide


Loop analysis is another powerful technique for analyzing electrical circuits. It focuses

on identifying independent loops in the circuit and applying Kirchhoff's Voltage Law

(KVL) to each loop.

Steps Involved:

1. Identify Independent Loops:

○ A loop is a closed path in a circuit.

○ Independent loops are those that cannot be formed by combining other

loops.

2. Assign Loop Currents:

○ Assign a current to each independent loop.

3. Apply Kirchhoff's Voltage Law (KVL):

○ For each loop, write an equation stating that the algebraic sum of the

voltage drops around the loop is zero.

○ Use Ohm's Law to express voltage drops in terms of loop currents and

resistances.

4. Solve the System of Equations:

○ Solve the system of equations obtained in step 3 to determine the loop

currents.

Example:

Consider the following circuit:


1. Identify Independent Loops:

○ There is only one independent loop in this circuit.

2. Assign Loop Current:

○ Let I be the current flowing in the loop.

3. Apply KVL to the Loop:

○ -V + IR1 + IR2 + I*R3 = 0

4. Solve the Equation:

○ Solve the equation for I.

Key Points:

● Mesh Analysis: A special case of loop analysis where the loops are chosen to

form meshes (non-overlapping loops that cover the entire circuit).

● Dependent Sources: Handle dependent sources by expressing their voltages or

currents in terms of loop currents.

● Matrix Methods: For larger circuits, matrix methods can be used to solve the

system of equations efficiently.


Advantages of Loop Analysis:

● Direct Application of KVL: It directly applies KVL to independent loops.

● Simplicity for Planar Circuits: For planar circuits (circuits that can be drawn

without crossing wires), mesh analysis can simplify the analysis.

● Flexibility: It can be applied to a wide range of circuits, including those with

dependent sources.

Choosing Between Nodal and Loop Analysis:

● Nodal Analysis: Often preferred when there are many voltage sources in the

circuit.

● Loop Analysis: Often preferred when there are many current sources in the

circuit or when dealing with planar circuits.

By understanding both nodal and loop analysis, you can effectively analyze a variety of

electrical circuits and design efficient electronic systems.

Loop Analysis of Networks Containing Ideal

Dependent Sources

Loop Analysis with Ideal Dependent Sources


Understanding Ideal Dependent Sources

Ideal dependent sources are circuit elements whose values depend on another voltage

or current in the circuit. They can be classified into four types:


1. Voltage-Controlled Voltage Source (VCVS): Output voltage is proportional to an

input voltage.

2. Current-Controlled Voltage Source (CCVS): Output voltage is proportional to an

input current.

3. Voltage-Controlled Current Source (VCCS): Output current is proportional to an

input voltage.

4. Current-Controlled Current Source (CCCS): Output current is proportional to an

input current.

Loop Analysis with Dependent Sources

The approach to loop analysis with dependent sources is similar to that with

independent sources. However, the equations become more complex due to the

dependence relationships.

Steps:

1. Identify Independent Loops:

○ Choose a set of independent loops that cover all branches of the circuit.

2. Assign Loop Currents:

○ Assign a current to each loop.

3. Apply KVL:

○ For each loop, write a KVL equation, expressing voltage drops across

resistors and voltage sources in terms of loop currents.

○ For dependent sources, express their voltages or currents in terms of

other loop currents or voltages.

4. Solve the System of Equations:

○ Solve the resulting system of equations to determine the loop currents.

Example:
In this circuit, the VCVS has an output voltage of 2*V1, where V1 is the voltage across

R1.

1. Identify Loop:

○ One independent loop exists.

2. Assign Loop Current:

○ Let I be the loop current.

3. Apply KVL:

○ -10V + IR1 + (2V1)R2 + IR3 = 0

4. Express V1 in Terms of I:

○ V1 = I*R1

5. Substitute and Solve:

○ -10V + IR1 + 2(I*R1)R2 + IR3 = 0

○ Solve for I.

Key Points:

● Careful Equation Formulation: Ensure that the equations accurately represent the

relationships between loop currents and dependent source voltages or currents.

● Matrix Methods: For larger circuits with multiple dependent sources, matrix

methods can be used to efficiently solve the system of equations.


● Computer-Aided Analysis: Software tools like MATLAB or SPICE can be used to

automate the analysis of complex circuits with dependent sources.

By following these steps and understanding the behavior of dependent sources, you

can effectively analyze circuits with dependent sources using loop analysis.

Planar Graphs and Mesh Analysis, Duality

Planar Graphs and Mesh Analysis

Planar Graphs

A planar graph is a graph that can be drawn on a plane without any edges crossing.

This property makes it particularly suitable for mesh analysis.

Mesh Analysis

Mesh analysis is a technique used to analyze electrical circuits. It involves applying

Kirchhoff's Voltage Law (KVL) to independent loops, called meshes, in the circuit.

Why Planar Graphs are Ideal for Mesh Analysis:

● Simple Loop Identification: In a planar graph, meshes are easily identifiable as

the enclosed regions.

● Reduced Number of Equations: The number of equations to solve is equal to the

number of meshes, which is typically fewer than the number of nodes in nodal

analysis.

Steps in Mesh Analysis:


1. Identify Meshes: Identify all independent loops in the circuit.

2. Assign Mesh Currents: Assign a current to each mesh in an arbitrary direction.

3. Apply KVL to Each Mesh: Write KVL equations for each mesh, expressing

voltage drops across resistors and voltage sources in terms of mesh currents.

4. Solve the System of Equations: Solve the resulting system of equations to

determine the mesh currents.

Duality in Graph Theory

Duality is a concept in graph theory where two graphs are related to each other in a

specific way. A dual graph of a planar graph is another graph that represents the

relationship between the faces of the original graph.

Dual of a Planar Graph:

1. Place a Node in Each Face: For each face (including the outer face) of the

original graph, place a node in the dual graph.

2. Connect Nodes: Connect two nodes in the dual graph if the corresponding faces

share an edge in the original graph.

Duality and Circuit Analysis:

● Dual of a Circuit: The dual of an electrical circuit is another circuit where the

node-voltage equations of one circuit are equivalent to the mesh-current

equations of the other.

● Transforming Circuits: By understanding duality, we can transform complex

circuits into simpler ones, making analysis easier.

In Conclusion: Planar graphs and mesh analysis are powerful tools for analyzing

electrical circuits. By understanding the concept of duality, we can gain deeper insights

into circuit behavior and simplify the analysis process.


The Cut-set Matrix of a Linear Oriented

Graph

Cut-Set Matrix of a Linear Oriented Graph


Understanding Cut-Sets

A cut-set is a minimal set of edges in a graph whose removal disconnects the graph into

two or more components. In simpler terms, it's a set of edges that, when removed,

"cuts" the graph into separate parts.

Cut-Set Matrix

The cut-set matrix, often denoted as C, is a matrix that represents the relationship

between cut-sets and branches in a graph. Each row of the matrix corresponds to a

cut-set, and each column corresponds to a branch. The entries in the matrix indicate

whether a branch is included in a particular cut-set:

● +1: If the branch is in the cut-set and its orientation agrees with the cut-set

orientation.

● -1: If the branch is in the cut-set and its orientation opposes the cut-set

orientation.

● 0: If the branch is not in the cut-set.

Cut-Set Matrix for a Linear Oriented Graph

For a linear oriented graph, the cut-set matrix has a specific structure. Since a linear

oriented graph is essentially a chain of vertices connected by edges, the cut-sets are
straightforward. Each edge can be considered a cut-set, as removing any edge

disconnects the graph.

Example:

Consider a linear oriented graph with 4 vertices (A, B, C, D) and 3 edges (AB, BC, CD).

AB BC CD

A 1 0 0

B -1 1 0

C 0 -1 1

D 0 0 -1

Observations:

● Each row corresponds to a cut-set: In this case, each row corresponds to cutting

the graph at a specific edge.

● The matrix is similar to the incidence matrix: For linear oriented graphs, the

cut-set matrix and the incidence matrix are essentially the same.

Applications of Cut-Set Matrices:

● Circuit Analysis: Used in analyzing electrical circuits, particularly for formulating

KCL equations.

● Network Analysis: Used in various network analysis problems, such as network

flow and reliability analysis.

● Graph Theory: Used in studying graph properties and algorithms.


In conclusion, while the cut-set matrix is a powerful tool for analyzing general graphs, its

application to linear oriented graphs is relatively straightforward. The concept of cut-sets

and their representation in matrix form is essential for understanding more complex

graph-theoretic concepts and their applications in engineering and computer science.

Cut-sets - The All cut set matrix Qa-

Orthogonality relation between Cut-set

matrix and Circuit matrix

Cut-Sets and the All-Cut-Set Matrix (Q)


Cut-Sets Revisited

A cut-set is a minimal set of edges in a graph whose removal disconnects the graph into

two or more components. In simpler terms, it's a set of edges that, when removed,

"cuts" the graph into separate parts.

All-Cut-Set Matrix (Q)

The all-cut-set matrix, denoted by Q, is a matrix that represents all possible cut-sets in a

graph. Each row of the matrix corresponds to a cut-set, and each column corresponds

to a branch. The entries in the matrix indicate whether a branch is included in a

particular cut-set:

● +1: If the branch is in the cut-set and its orientation agrees with the cut-set

orientation.
● -1: If the branch is in the cut-set and its orientation opposes the cut-set

orientation.

● 0: If the branch is not in the cut-set.

Orthogonality Relation Between Cut-Set and Circuit Matrices

A fundamental property of cut-set and circuit matrices is their orthogonality. This means

that the product of the transpose of one matrix and the other is a null matrix.

Mathematically, this can be expressed as:

B^T * Q = 0

Where:

● B^T is the transpose of the fundamental circuit matrix.

● Q is the all-cut-set matrix.

Why is this Orthogonality Important?

● Circuit Analysis: This property is crucial in circuit analysis, especially when using

techniques like nodal analysis and mesh analysis.

● Network Analysis: It's used in various network analysis problems, such as

network flow and reliability analysis.

● Graph Theory: It's a fundamental property in graph theory, used to derive various

graph invariants and properties.

In Conclusion

The cut-set matrix and its orthogonality relationship with the circuit matrix are powerful

tools for analyzing graphs and circuits. By understanding these concepts, we can gain

deeper insights into the structure and behavior of networks.


The Fundamental Cut-set Matrix of -

Relation between of , A and Bf

Fundamental Cut-Set Matrix (Qf)


A fundamental cut-set is a cut-set that contains exactly one branch of a tree. The

fundamental cut-set matrix, denoted as Qf, is a matrix that represents the relationship

between fundamental cut-sets and branches in a graph.

Relation Between Qf, A, and Bf

There's a fundamental relationship between the fundamental cut-set matrix (Qf), the

incidence matrix (A), and the fundamental circuit matrix (Bf).

Qf * A^T = 0

This equation expresses the orthogonality between the fundamental cut-sets and the

branches. It means that the dot product of any row of Qf with any row of A^T is zero.

Why is this important?

● Circuit Analysis: This relationship can be used to derive KCL equations directly

from the graph structure.

● Network Analysis: It's fundamental in network analysis for problems like network

flow and reliability analysis.

● Graph Theory: It's a core concept in graph theory, used to understand the

structural properties of graphs.

Example
Consider a simple graph with 4 nodes and 4 branches.

Let's choose a tree consisting of branches 1, 2, and 3. The fundamental cut-sets are:

● Cut-set 1: Branches 1 and 4

● Cut-set 2: Branches 2 and 4

● Cut-set 3: Branches 3 and 4

The fundamental cut-set matrix Qf is:

Qf = [ 1 0 0 1 ]

[ 0 1 0 1 ]

[ 0 0 1 1 ]

The incidence matrix A is:

A = [ 1 0 0 -1 ]

[-1 1 0 0 ]

[ 0 -1 1 0 ]

[ 0 0 -1 1 ]
You can verify that Qf * A^T = 0.

In Conclusion

The fundamental cut-set matrix, along with the incidence and fundamental circuit

matrices, provides a powerful framework for analyzing graphs and networks.

Understanding the relationships between these matrices is essential for solving various

problems in engineering and computer science.

Kirchhoff's Laws in Fundamental Cut-set

formulation

Kirchhoff's Laws and the Fundamental Cut-Set Matrix

Kirchhoff's Current Law (KCL) and Qf

KCL states that the algebraic sum of currents entering a node is zero. This law can be

expressed in matrix form using the fundamental cut-set matrix (Qf):

Qf * I = 0

Where:

● Qf is the fundamental cut-set matrix.

● I is a column vector of branch currents.

Each row of this equation represents KCL applied to a fundamental cut-set.


Example

Consider the same simple graph with 4 nodes and 4 branches as before:

The fundamental cut-set matrix Qf is:

Qf = [ 1 0 0 1 ]

[ 0 1 0 1 ]

[ 0 0 1 1 ]

Applying KCL to each fundamental cut-set:

● Cut-set 1: I1 - I4 = 0

● Cut-set 2: I2 - I4 = 0

● Cut-set 3: I3 - I4 = 0

This can be written in matrix form as:

[ 1 0 0 1 ] [ I1 ] [ 0 ]

[ 0 1 0 1 ] * [ I2 ] = [ 0 ]

[ 0 0 1 1 ] [ I3 ] [ 0 ]
[ I4 ]

Key Points

● The fundamental cut-set matrix provides a systematic way to write KCL

equations.

● By choosing a suitable tree, the number of fundamental cut-sets and hence the

size of Qf can be minimized.

● The fundamental cut-set matrix can be used in conjunction with other techniques

like nodal analysis and mesh analysis to solve complex circuits.

In Conclusion

The fundamental cut-set matrix, along with the incidence and fundamental circuit

matrices, provides a powerful framework for analyzing graphs and circuits. By

understanding the relationships between these matrices and their application to

Kirchhoff's laws, we can efficiently analyze complex networks.

Tie set -Tie set Matrix (F-loop matrix)

Tie-Set and Tie-Set Matrix (F-Loop Matrix)

Tie-Set

A tie-set is a closed path in a graph that contains at least one branch that does not

belong to a chosen tree. In other words, it's a loop that includes at least one branch not

in the tree.
Tie-Set Matrix (F-Loop Matrix)

The tie-set matrix, denoted by F, is a matrix that represents the relationship between

tie-sets and branches in a graph. Each row of the matrix corresponds to a tie-set, and

each column corresponds to a branch. The entries in the matrix indicate whether a

branch is included in a particular tie-set:

● +1: If the branch is in the tie-set and its orientation agrees with the tie-set

orientation.

● -1: If the branch is in the tie-set and its orientation opposes the tie-set orientation.

● 0: If the branch is not in the tie-set.

Relation Between F and B_f

The tie-set matrix (F) and the fundamental circuit matrix (B_f) are closely related. In fact,

for a given graph, the tie-set matrix can be obtained from the fundamental circuit matrix

by adding or subtracting rows.

Application in Circuit Analysis

The tie-set matrix can be used to formulate Kirchhoff's Voltage Law (KVL) equations for

a circuit. By multiplying the tie-set matrix with the branch voltage vector, we can obtain a

set of KVL equations:

F * V = 0

Where:

● F is the tie-set matrix.

● V is a column vector of branch voltages.


Key Points

● The choice of tree affects the specific tie-sets and the corresponding F matrix.

● The tie-set matrix is a useful tool for analyzing circuits, especially when dealing

with non-planar graphs.

● The orthogonality relationship between the tie-set matrix and the cut-set matrix

can be used to derive various circuit equations and properties.

By understanding the concept of tie-sets and the tie-set matrix, you can effectively

analyze complex circuits and networks.

Tie set schedule

Tie-Set Schedule
A tie-set schedule is a tabular representation of the tie-sets in a graph. It lists each

tie-set and the branches it includes, along with their orientations.

Steps to Create a Tie-Set Schedule:

1. Identify a Tree: Choose a tree within the graph. A tree is a subgraph that includes

all nodes without forming any loops.

2. Identify Tie-Sets: For each branch that is not part of the tree (link branch), create

a tie-set by adding the minimum number of tree branches to form a loop.

3. Create the Table:

○ Column 1: List the tie-set numbers.

○ Subsequent Columns: List the branch numbers, indicating their orientation

with +1 for the same direction as the tie-set current and -1 for the opposite

direction.
Example:

Consider the following graph:

Let's choose branches 1, 2, 3, and 4 as the tree branches. The link branches are 5, 6, 7,

and 8.

The tie-set schedule would look like this:

Ti Bran Bran Bran Bran Bran Bran Bran Bran


e- ch 1 ch 2 ch 3 ch 4 ch 5 ch 6 ch 7 ch 8
S
et

1 +1 0 0 +1 +1 0 0 0

2 0 +1 0 +1 0 +1 0 0

3 0 0 +1 +1 0 0 +1 0

4 0 0 0 +1 0 0 0 +1

Using Tie-Set Schedules for Circuit Analysis:


● Writing KVL Equations: Each row of the tie-set schedule represents a KVL

equation. By assigning currents to each tie-set, you can write KVL equations for

each loop.

● Analyzing Network Topology: Tie-set schedules can be used to analyze the

topological properties of a network, such as the number of independent loops

and the relationship between branches and loops.

By understanding tie-set schedules and their application to circuit analysis, you can

effectively analyze complex networks and solve circuit problems.

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