0% found this document useful (0 votes)
10 views10 pages

Arm Final

Uploaded by

Namratha Nagaraj
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
10 views10 pages

Arm Final

Uploaded by

Namratha Nagaraj
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 10

VISVESVARAYA TECHNOLOGICAL UNIVERSITY

“Jnana Sangama”, Belagavi-590018

Computer Organization & ARM Microcontrollers [21EC52]


Creative Assessment Report on
“Programming using ARM Cortex M3”
Submitted by

Namratha Nagaraj Mysore


(1DT21EC033)

Under the Guidance of,


Dr. Roopa R Kulkarni
Asst Prof, Dept. of ECE
DSATM, Bengaluru

Marks Obtained

Signature

Department of Electronics and Communication Engineering


Accredited by NBA, New Delhi.
DAYANANDA SAGAR ACADEMY OF TECHNOLOGY AND MANAGEMENT
Accredited by NAAC with Grade A+
Udayapura, Kanakapura Road, Bengaluru-560082
2023-2024
TABLE OF CONTENTS

Sl. Content Page


No No
1 Features of ARM Cortex M3 [LPC1768] 1

2 ARM Instruction Set 2

3 Part A: Problem 1 4

4 Part A: Problem 2 6

5 Part B Problem 8
C0-ARM [21EC52] 2023-2024

1. FEATURES OF ARM CORTEX M3 [LPC1768]

The LPC1768 is a widely used ARM Cortex-M3 microcontroller manufactured by NXP


Semiconductors. It offers a variety of features suitable for embedded systems development.

ARM Cortex-M3 Core: The LPC1768 is built around the ARM Cortex-M3 core, which
provides high performance and low power consumption, making it suitable for a wide range of
applications.

Clock Speed: It operates at frequencies of up to 100 MHz, providing sufficient processing


power for many embedded applications.

Flash Memory: The LPC1768 typically comes with 512 KB of on-chip flash memory for
storing program code.
SRAM: It has 64 KB of on-chip static RAM (SRAM) for data storage.
EEPROM: Some variants may include built-in EEPROM for non-volatile data storage.
Peripherals:

GPIO (General Purpose Input/Output): Multiple GPIO pins for interfacing with external
devices.
UART (Universal Asynchronous Receiver/Transmitter): Serial communication interface.
SPI (Serial Peripheral Interface): Synchronous serial communication interface for connecting
peripherals.

I2C (Inter-Integrated Circuit): Another serial communication protocol for connecting low-speed
peripherals.
USB (Universal Serial Bus): Built-in USB interface for connecting to external devices.
Timers and Counters: Multiple timers and counters for various timing and control applications.
Interrupts and DMA: The LPC1768 supports interrupts and DMA (Direct Memory Access) for
efficient handling of asynchronous events and data transfer.

Debugging and Development: It supports various debugging and development tools, including
on-chip debugging via JTAG/SWD (Joint Test Action Group/Serial Wire Debug) interfaces and
development environments such as Keil µVision and Eclipse.
Operating Voltage: Typically operates at 3.3V, although some variants may support wider
voltage ranges.

Fig. ARM Cortex M3 (LPC1768)

Department of E&CE, DSATM, Bengaluru


1
C0-ARM [21EC52] 2023-2024

2. ARM INSTRUCTION SET

Department of E&CE, DSATM, Bengaluru


2
C0-ARM [21EC52] 2023-2024

Department of E&CE, DSATM, Bengaluru


3
C0-ARM [21EC52] 2023-2024

PART A:

3. PROBLEM 1

Convert a single hex digit to its ASCII equivalent

LABEL MNEMONICS OPERANDS COMMENTS


AREA PROGRAM,CODE,READONLY ; This directive specifies that the
following code is part of the
"PROGRAM" area, containing code
that is read-only.
EXPORT __main ; This exports the symbol "__main",
indicating that it's the entry point of
the program.
__main ; This is the entry point of the
program.
LDR R0,DIGIT ; Loads the value at the memory
location labeled "DIGIT" into
register R0.
LDR R1,=RESULT ; Loads the address of the memory
location labeled "RESULT" into
register R1.
CMP R0,#0xA ; Compares the value in register R0
with the hexadecimal value 0xA.
BLT Add_0 ; Branches to the label "Add_0" if
the value in R0 is less than 0xA.
ADD R0,R0,#"A"-"O"-0xA ; This line seems to be correcting
the value in R0 if it's greater than or
equal to 0xA. It adjusts the value to
correspond to the ASCII
representation of hexadecimal digits
from 'A' to 'F'.
Add_0 ; Label for the branch target.
ADD R0,R0,#"0" ; Adds the ASCII value of '0' to the
value in R0. This is done to convert
the hexadecimal digit to its ASCII
representation.
STR R0,[R1] ; Stores the value in register R0 to
the memory location pointed to by
register R1 (which is the location

Department of E&CE, DSATM, Bengaluru


4
C0-ARM [21EC52] 2023-2024

labeled "RESULT").
SWI &11 ; Invokes software interrupt 17
(0x11), which might be a system
call for outputting the result.
DIGIT DCD &0C ; Defines a memory location labeled
"DIGIT" and initializes it with the
hexadecimal value 0x0C (decimal
12).
RESULT DCD 0 ; Defines a memory location labeled
"RESULT" and initializes it with
the value 0.
END Marks the end of the assembly
code.

Output:

Department of E&CE, DSATM, Bengaluru


5
C0-ARM [21EC52] 2023-2024

4. PROBLEM 2

WRITE AN ARM ASSEMBLY CODE TO CHECK IF A GIVEN


STRING IS A PALINDROME.

Program:
LABEL MNEMONICS OPERANDS COMMENTS

AREA PALINDROME, Define the program with the area


CODE, READONLY and name it a palindrome
SWI_EXIT EQU 0X11
EXPORT __MAIN
__MAIN
LDR R0,=STRING Load the address of the string
into r0
MOV R1,R0 Copy the address of the string to
r1
LOOP LDRB R2,[R1],#1 Load a byte from the string into
r2, and increment the address in
r1
CMP R2,#0 Compare the byte with null
terminator
BNE LOOP If not null terminator, continue
looping
SUB R1,R1,#2 Adjust r1 to point to the last
character of the string
BL PAL Branch to pal (palindrome
check)
STOP SWI SWI_EXIT System call to exit
PAL MOV R10,#0X0 Initialize r10 to 0
AGAIN LDRB R3,[R0] Load a byte from the beginning
of the string into r3
LDRB R4,[R1] Load a byte from the end of the
string into r4
CMP R3,R4 Compare the two bytes
BNE NOTPAL If not equal, branch to notpal
CMP R0,R1 Compare the addresses
BEQ WASPAL If equal, branch to waspal (end
of palindrome check)
ADD R2,R0,#1 Increment the address in r0
CMP R2,R1 Compare the updated address in
r0 with r1
BEQ WASPAL If equal, branch to waspal
ADD R0,R0,#1 Increment the address in r0
SUB R1,R1,#1 Decrement the address in r1
B AGAIN Branch back to again (continue
palindrome check)
WASPAL MOV R0,#0X1 Set r0 to 1 (indicating

Department of E&CE, DSATM, Bengaluru


6
C0-ARM [21EC52] 2023-2024

palindrome)
NOTPAL MOV R0, #0X2 Set r0 to 2 (indicating not a
palindrome)
STRING DCB "ABCBA",0 Define the string "abcba"
terminated with null
END End of program

Output:

Department of E&CE, DSATM, Bengaluru


7
C0-ARM [21EC52] 2023-2024

PART B PROBLEM:
5. Implement UART serial communications protocol

Program:

#include<lpc17xx.h>
unsigned int c; //if signed it takes 31 bits we need full 32 bits hence unsigned
unsigned char recdata;
int main()
{
char a[]="UART protocol\r";
int i;
//uart transmitter
LPC_SC->PCONP |=0x00000008; //optional
LPC_PINCON->PINSEL0=0x00000050; //TXD0 and rxd0 of uart0 is selected with function
LPC_UART0->LCR = 0x83; //8 bit character, 1 stop bit and div latch enable
LPC_UART0->DLL = 0xA2; //calculation 9600
LPC_UART0->DLM = 0x00; //higher bits are 0
LPC_UART0->LCR = 0x03; //8 bits of information
LPC_UART0->FCR = 0x07; //clear tx and rx of FIFO
while(1) //endless loop
{
while((LPC_UART0->LSR & 0x20)==0x20)
{
for(i=0;i<=a[i];i++) //string of data
LPC_UART0->THR =a[i]; //data
}
}
}
Output:

Department of E&CE, DSATM, Bengaluru


8

You might also like