0% found this document useful (0 votes)
27 views9 pages

ECD Lab Report 6

Uploaded by

umer
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
27 views9 pages

ECD Lab Report 6

Uploaded by

umer
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 9

_________________________________________________________________________

DEPARTMENT OF AVIONICS ENGINEERING

SUBJECT : Electronics Circuits & Devices Lab


BATCH Avionics 07
LAB NO : 06

TITLE : Op-Amps Basic Circuits

SUBMITTED TO : Sir Sardar


SEMESTER : 07
SECTION : B

Marks Obtained

Group Member 1 Group Member 2 Group Member 3

NAME Muhammad Umar Fatima Bibi Laiba


REGISTRATION
210701062 210701052 210701016
NUMBER
LAB REPORT 06 06 06
PERFORMANCE
TOTAL MARKS

DEADLINE FOR
SUBMISSION:

DATE OF SUBMISSION:
________________________________________________________________________

PURPOSE

To study the basic circuits of Op-amps for good understanding

READING
1. Section 13-1 of Floyd (textbook)

OBJECTIVE

I. To simulate a simple comparator using op-amp


II. To simulate zero-level detector using op-amp
III. To simulate non zero-level detector using op-amp
IV. To build and test non zero-level detector using op-amp

REQUIRED EQUIPMENT

• FG-1882 function generator


• Oscilloscope
• Discrete components such as transistors, capacitors and resistors.
• Regulated power supply

________________________________________________________________________
Exp # 05 Electronic Circuits and Devices Laboratory 2
________________________________________________________________________

EXPERIMENT PROCEDURE

I. To simulate a simple comparator using op-amp


In Multisim, simulate a simple comparator circuit as shown below. Try using global
connectors instead of using long ugly routed wires. Two global connectors named IN
and Out have been used.

Figure 1. A simple comparator circuit using Op-amp.


Show the input and output signals in your report and explain why the output is like
this.

________________________________________________________________________
Exp # 05 Electronic Circuits and Devices Laboratory 3
________________________________________________________________________

The output in the above simulation is in this form because the output of a comparator is typically
in binary/digital form (0,1), representing whether the non-inverting input is greater than or less
than the inverting input. It also does not contain any feedback and it will generate a rectangular
wave at the output with saturation voltage levels (VDD and -VDD) when the input is a sin wave.
When V+ > V- the output is +Vsat
When V+ < V- the output is -Vsat

II. To simulate zero-level detector using op-amp


In Multisim, simulate a zero-level shown in the figure below. Include the schematic in
your report.
Observe the input and output signals on the DSO. Include these in your report.
Measure the peak to peak amplitude of the output signal. Explain why the peak to
peak amplitude is not exactly VDD-VEE?

Figure 2. A zero level detector circuit using Op-amp.

________________________________________________________________________
Exp # 05 Electronic Circuits and Devices Laboratory 4
________________________________________________________________________

Peak-to-peak amplitude is 8.20V. It is not equal to VDD-VEE which is 10V because some of
signal is lost as part of noise and other factors leading to reduce the original signal amplitude.

________________________________________________________________________
Exp # 05 Electronic Circuits and Devices Laboratory 5
________________________________________________________________________

III. To simulate non zero-level detector using op-amp


Simulate all three circuits below using your own choice values to demonstrate non zerolevel
detection using op-amps. Report the chosen values.

Figure 3. Non zero-level detector configurations. (a) using voltage source (b) using
voltage divider (c) using zener diode (Image courtesy floyd). Observe the input and
output signals. Include these in your report.

Battery Reference

________________________________________________________________________
Exp # 05 Electronic Circuits and Devices Laboratory 6
________________________________________________________________________

Voltage-divider Reference

Zener Diode Reference

Vref = 5V
R1 = 10kΩ
R2 = 1kΩ
Zener Diode Breakover Voltage = 0.7V

________________________________________________________________________
Exp # 05 Electronic Circuits and Devices Laboratory 7
________________________________________________________________________

IV. To build and test non-zero-level detector using op-amp


Build a non-zero-level detector using the voltage divider technique i.e. second circuit
configuration in figure 3. Use component values of your own choice. Replace one resistor with a
variable one and note the behavior as well.
Include in your report the values of components used and the input-output waveforms. Explain
the working w.r.t your values and experiment and provide analysis.

Battery Reference

Voltage Divider Reference

________________________________________________________________________
Exp # 05 Electronic Circuits and Devices Laboratory 8
________________________________________________________________________

Zener Diode Reference

Explanation:
A non-zero level detector is a type of circuit that detects whether an input signal has a level
different from zero. The primary goal is to produce a digital output indicating whether the input
signal is above or below a specified reference level.
Input Signal: The circuit takes an sine wave as input voltage signal
Reference Level: There is a reference level set within the circuit. This reference level represents
the threshold that the input signal needs to surpass for the detector to register a non-zero level
(Vref = 5V)
Comparator: The core component of a non-zero level detector is usually a comparator. A
comparator compares the input signal with the reference level and produces a digital output
based on the relationship between the two.
Output Logic: The output of the comparator is typically a digital signal. The output logic can be
designed such that when the input signal is above the reference level, the output is high (logic
'1'), and when the input signal is below the reference level, the output is low (logic '0').
In the experiment, the input voltage is set as 10V and Vref is set as 5V. When the voltage level
exceeds the reference voltage the output is a logic ‘1’ signal otherwise it is logic ‘0’. Due to this
a rectangular type output wave is produced.
R1 = R2 = 1kΩ

________________________________________________________________________
Exp # 05 Electronic Circuits and Devices Laboratory 9

You might also like