Introduction to Embedded Systems

EHB326E
Lectures

Prof. Dr. Müştak E. Yalçın

Istanbul Technical University

[email protected]

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 1 / 23
Describing a system as a state machine(Step1 )
List all possible states
Declare all variables
For each state, list possible transitions, with conditions, to other
states
For each state and/or transition, list associated actions
For each state, ensure exclusive and complete exiting transition
conditions
No two exiting conditions can be true at same time (Otherwise
nondeterministic state machine)
One condition must be true at any given time
Note:
Each transition is implicitly ANDed with rising clock edge !
Any bit output is implicitly assigned a 0
For Moore machines the output generation is represented by assigning outputs
with states. For Mealy machines conditional output generation is represented by
assigning outputs to transitions! (EHB205 Int. Logic Design)
Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 2 / 23
Simple parking gate controller:
The gate needs to do:
If a car wants to come through, the gate needs to raise the arm until
it is at the top position.
Once the gate is at the top position, it has to stay there until the car
has driven through the gate.
After the car has driven through the gate needs to lower the arm until
it reaches the bottom position.

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 3 / 23
Describing a system as a state machine

FSM is a powerful programming mechanism express a sequence of events.

An event describes a physical activity. An event is a tuple (real-time
stamp, value), where ’value’ describes what has happened in the physical
world (data value is irrelevant).

Example: The microcontroller reads two buttons and has two output pins
that each drive a LED.
int main() {
while (1) // Cyclic Executive ! {
if (Button 1 Pressed())
turn on LED1
else
turn off LED1
if (Button 2 Pressed())
turn on LED2
else
turn off LED2
}
}

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 4 / 23
A sequence of events is a series of physical events for which you care
about the ORDER of events.
An event sequence is for example the following:
”ButtonLeft is pressed and held, followed by ButtonRight”
The challenge is to find a good method to capture this in C.
Using the standard cyclic executive, this is not so easy, because a cyclic
executive looks only at one event at a time, with no memory of the past.
Everything is instantaneous.

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 5 / 23
Source: 6.004 Computation Structures (MIT OpenCourseWare)

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 6 / 23
Source: 6.004 Computation Structures (MIT OpenCourseWare)

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 7 / 23
Creating a Datapath (Step2 )
Make all data inputs and outputs to be datapath inputs and outputs.
Implement the data storage by adding a register component into
datapath for every declared register (RULE: always put a register
before data output).
Examine each state and transaction, adding and connecting new
datapath components to implement new computation. Add
multiplexors in front of shared components and define a control signal
for them.

A state’s actions configure the datapath and controller ! (the next clock edge will
load the desired values)
Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 8 / 23
Connecting the Datapath to a Controller and Design the
Controller (Step3 and Step4 )
Just connect all control signals between controller and datapath
Describe the control behaviour into a FSM replacing actions and
conditions.

Study : Example 5.2 from Frank Vahid, Digital Design

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 9 / 23
State machine vs. sequential program model

Different thought process used with each model

State machine
Encourages designer to think of all possible states and transitions
among states based on all possible input conditions
Sequential program model:
Designed to transform data through series of instructions that may be
iterated and conditionally executed
State machine description excels in many cases
More natural means of computing in those cases

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 10 / 23
Example

Example :
”Move the elevator either up or down to reach
the target floor. Once at the target floor,
open the door for at least 10 seconds, and
keep it open until the target floor changes.
Ensure the door is never open while moving.
Don’t change directions unless there are no
higher requests when moving up or no lower
requests when moving down.”

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 11 / 23
Design Technology

The system specification:

The designer describes the desired functionality in some language, often a
natural language like English, but preferably an executable language !

Designers must spend much time and effort simply understanding and
describing the desired behaviour of a system, and some studies have found
that most system bugs come from mistakes made describing the desired
behaviour rather than from mistakes in implementing that behaviour.

D. Gajski, F. Vahid, S. Narayan and J. Gong, ”Specification an Design of embedded systems,” page 10 - 13.

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 12 / 23
Example
Inputs: int floor; bit b1...bN; up1...upN-1; dn2...dnN;
Outputs: bit up, down, open;
Global variables: int req;

void main() {
Call concurrently:
UnitControl() and
RequestResolver()
}
void UnitControl() {
up = down = 0; open = 1;
while (1) {
while (req == floor);
open = 0;
if (req > floor) { up = 1;}
else {down = 1;}
while (req != floor);
open = 1;
delay(10);
}
}
void RequestResolver() {
while (1)
...
req = ...
...
}
Read : Chapter 8: Embedded System Design, F. Vahdi & T Givargis

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 13 / 23
Concurrency & Parallelism

Concurrency is the ability to execute simultaneous operations because

these operations are completely independent. Parallelism is the ability to
execute simultaneous operations because the operations can run on
different processors or circuit elements.

UnitControl() and RequestResolver() two concurrent process.

Hardware is always parallel. Software on the other hand can be sequential,

concurrent, or parallel. Sequential and concurrent software requires a
single processor, parallel software requires multiple processors

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 14 / 23
Modeling the example with FSMD

Functional Level :

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 15 / 23
General template: FSM to Seq. Prog. Language

#define S0 0
#define S1 1
...
#define SN N
void StateMachine()
int state = S0; // or whatever is the initial state.
while (1) {
switch (state) {
S0:
// Insert S0’s actions here & Insert transitions Ti leaving S0:
if( T0’s condition is true ) {state = T0’s next state; /*actions*/ }
if( T1’s condition is true ) {state = T1’s next state; /*actions*/ }
...
if( Tm’s condition is true ) {state = Tm’s next state; /*actions*/ }
break;
S1:
// Insert S1’s actions here
// Insert transitions Ti leaving S1
break;
...
SN:
// Insert SN’s actions here
// Insert transitions Ti leaving SN
break;

}
}

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 16 / 23
Sequential program model for the example

#define IDLE 0
#define GOINGUP 1
#define GOINGDN 2
#define DOOROPEN 3
void UnitControl() {
int state = IDLE;
while (1) {
switch (state) {
IDLE: up=0; down=0; open=1; timer start=0;
if (req==floor) {state = IDLE;}
if (req > floor) {state = GOINGUP;}
if (req < floor) {state = GOINGDN;}
break;
GOINGUP: up=1; down=0; open=0; timer start=0;
if (req > floor) {state = GOINGUP;}
if (!(req>floor)) {state = DOOROPEN;}
break;
GOINGDN: up=1; down=0; open=0; timer start=0;
if (req < floor) {state = GOINGDN;}
if (!(req<floor)) {state = DOOROPEN;}
break;
DOOROPEN: up=0; down=0; open=1; timer start=1;
if (timer < 10) {state = DOOROPEN;}
if (!(timer<10)){state = IDLE;}
break;
}
}

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 17 / 23
Example 5.1 (Vahid, page 227) : Soda dispenser
#define INIT 0
#define WAIT 1
#define ADD 2
#define DISP 3
void State Machine Soda Disp() {
int state = INIT ;
while(1){
switch(state){
INIT : d = 0; tot = 0;
state = WAIT ;
break;
WAIT :
if (c == 1){state = ADD; }
if ((tot < s)&(!(c))){state = WAIT ; }
if (!(tot < s)&(!(c))){state = DISP; }
break;
ADD :
tot = tot + c;
state = WAIT ;
break;
DISP : d = 1;
state = INIT ;
break;
}
}
}

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 18 / 23
 Design of Soda Dispenser on general-purpose processor
C Program Microprocessor
8
P0
8
P1

1
P2.1
1
P2.2

Design of Soda Dispenser on

single-purpose processor

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 19 / 23
Embedded System Design
The designer refines Behavioural Specifications into register-transfer (RT)
specifications
by converting behavior on general-purpose processors to assembly
code,
by converting behavior on single-purpose processors to a connection
of register-transfer components and state machines.

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 20 / 23
Hardware/Software codesign

Hardware/Software codesign is the design of cooperating hardware

components and software components in a single design effort.

Hardware/Software codesign is the partitioning and design of an

application in terms of fixed (’hardware’) and flexible (’software’)
components.

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 21 / 23
Example 5.1 (Vahid, page 227) : Hardware/Software codesign of Soda
Dispenser
#define INIT 0
#define WAIT 1
#define ADD 2
#define DISP 3
void State Machine Soda Disp() {
int state = INIT ;
while(1){
switch(state){
INIT : d = 0; tot clr = 1;
state = WAIT ;
break;
WAIT :
if (c == 1){state = ADD; }
if ((tot lt s)&((c))){state = WAIT ; }
if ((tot lt s)&((c))){state = DISP; }
break;
ADD : tot ld = 1
state = WAIT ;
break;
DISP : d = 1;
state = INIT ;
break;
}
}
}

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 22 / 23
Hardware/Software codesign of Soda Dispenser

Example : Obtain Sequential Prog. of Example 5.2 from Frank Vahid,

Digital Design

Prof. Dr. Müştak E. Yalçın (İTÜ) EHB326E (V: 0.1) September, 2018 23 / 23