Scribd
Upload
46 views9 pages

Unit4 DCD QB 2024

Unit 4 and 5

Uploaded by

Sai paavan Chunduru
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
46 views9 pages

Unit4 DCD QB 2024

Unit 4 and 5

Uploaded by

Sai paavan Chunduru
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 9

Unit-4

No Question Marks

1 a)Realize the system represented by the following state diagram shown in 12


Fig. 6a using T Flip-flops.

b)With diagrams, explain the different types of sequential machines.


08

2 a) For the clocked synchronous sequential network shown in fig, construct 12


the excitation table, transition table, state table and state diagram.

08

b)Write state diagram and excitation table for realizing the state table given
below using D flip flops. The machine is of a single input and single output
type. Assume A=00, B=01, C=10, D=11.
3 a)Implement the state diagram shown in Figure 6a using D flip flops 12

08

b)Draw the state diagram of a Mealy machine whose output z is 1 if and


only if the last three inputs were 010 assuming that the sequence could
overlap.
Consider the input sequence x given below:

4 a) Design a Moore Model for the sequence 1101 with non-overlapping 10


condition using D- flip flops.
b) Construct the excitation table, transition table, state table and sequential 10
circuit with T-Flip flops for the following state diagram.
5 a)Analyze the synchronous sequential circuit shown below. Obtain its state 10
table and state diagram. Identify the machine.

b)A clocked sequential circuit with single input X and single output Z 10
produces an output Z=1, whenever the input X completes the sequence
1001 with overlapping. Draw Circuit with D flip-flops and obtain Mealy FSM.

6 a)Design a clocked sequential circuit that operates according to the state 10


diagram shown in Figure 6a. Implement the circuit using D Flip-flops.

b)Analyze the circuit shown in Figure 6b, obtain excitation table, state table
and state diagram. 10

7 a)A sequential circuit has one input and one output. The state diagram is 12
shown in Fig.Ga. The circuit is designed to use unused state as don't care.
Design a sequential circuit using D flip-flop.
b)Design a sequence detector for the sequence 100lusing D flip-flop with 08
Overlap.

8 a. With diagrams, explain the different types of sequential machines 8


b. Realise the system represented by the following state diagram shown
Fig.1 using T flip-flops 12

9 a)Design a sequential circuit to satisfy the following state equations. Obtain 10


its state
table and state diagram. Assume JK M/S flip flops.
10

b)Write the excitation table, transition table, state table and hence obtain
the state diagram for the synchronous sequential circuit shown in below
Figure.

10 a)With a neat diagram, explain Mealy and Moore Model sequential circuits. 10
b)Construct the excitation table, transition table, state table and state 10
diagram for the Moore sequential circuit shown in figure - 1.

11 a Explain the design procedure for clocked sequential circuits. 06


b Design a clocked sequential circuit using J-k flip flop for state diagram 14
shown in figure - 2
12 a)Design a sequential circuit that adds two 5- bits of data using Moore 12
circuit. Data is sent to the circuit 1-bit per clock cycle.
b)Using state table reduction technique, reduce the following state table. 08
Analyze the state table and find the output sequence for an input sequence
of 01110010011 with starting state as 'a'.

13 a) Analyze the synchronous sequential circuit shown in Figure 6a. 10


Obtain its state table and the state diagram.
10

b)Design a synchronous circuit using positive edge triggered JK flip-flops


with minimal combinational gating to generate the following sequence.
0-1-2-0 if the input X=0 and 0-2-1-0 if the input X=1
provide an output which goes high to indicate non-zero states in the 0-1-2-0
sequence.

14 a)Obtain the reduced state table and reduced state diagram for the 10
sequential machine whose state diagram is shown in the figure 5 a. Design
the circuit using T flip-flops assuming the direct state assignment

.
b)Design a sequential circuit for the state diagram shown in the figure 5b
using JK flip flops. Obtain its state table and Identify the machine. 10

15 a)Analyze the synchronous sequential circuit shown in the figure. Obtain its 10
state table and the state diagram. Identify the machine.
b)A clocked sequential circuit with single input X and single output Z
produces an output Z = 1 whenever the input X completes the sequence 10
1111 and overlapping is alowed. Asume the input sequence as 01011111
(i)obtain the state diagram
(ii) Write the output string Z
(iii) Design the circuit with D flip flops

16 a)Explain the Mealy model and Moore model of a clocked synchronous 06


sequential network.
b) Construct the excitation table, transition table, state table and state 14
diagram for the Moore sequential circuit shown in figure

17 a) Write the basic recommended steps for design of a clocked Synchronous 06


sequential circuit.
b) Design a sequential circuit using IK. flip flop for the state diagram shown
in figure 14

18 a)Design a sequence network for the following state diagram using JK FF 10


10

b)Implement serial adder using sequential logic

19 a. With a neat diagram, explain the Mealy model sequential network 06


b. Analyze the Synchronous circuit given in the figure below, obtain its state 14
diagram. Find the output sequence for an input sequence of 101101(initial
state=01)

20 a)With diagram, explain the different types of sequential machines. 08


b)Design the sequential circuit using T flip flop for the state diagram shown. 12
Where A= 00, B = 01, C = 10, D = 11.

You might also like