Scribd
Upload
9 views

Lab3- Design of Decoder and Encoder- Hardware (1)

Uploaded by

makilbharathi.2024
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
9 views

Lab3- Design of Decoder and Encoder- Hardware (1)

Uploaded by

makilbharathi.2024
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 6

Experiment No:3 Date:02.01.

2025

DESIGN OF ENCODER AND DECODER USING LOGIC GATES

AIM:

To design and construct a decoder and encoder circuit using logic gates

APPARATUS REQUIRED:

S.No. COMPONENT SPECIFICATION QUANTITY

1. AND GATE IC 7408 1

2. OR GATE IC 7432 1

3 NOT GATE IC 7404 1

4. DIGITAL IC - 1
TRAINER KIT

5. PATCH CORDS - 20

THEORY:

DECODER:

The name “Decoder” means to translate or decode coded information from one
format into another, so a digital decoder transforms a set of digital input signals into an
equivalent decimal code at its output.

A decoder is a combinational circuit that converts binary information from n input lines to a
maximum of m=2n unique output lines.
ENCODER:

An Encoder is a combinational circuit that performs the reverse operation of Decoder. It has

maximum of 2n input lines and ‘n’ output lines. It will produce a binary code equivalent to the

input, which is active High. Therefore, the encoder encodes 2n input lines with ‘n’ bits. It is

optional to represent the enable signal in encoders.

PROCEDURE:

1. Place the IC on IC trainer kit

2. Connect the Vcc and ground to respective pins of IC trainer kit


3. Connections are given as per logic diagram

4. Connect the inputs to the input switches provided in the IC trainer kit

5. Connect the outputs to the switches of output LED’s

6. Apply various combinations of input according to the truth table

7. Observe the condition of output LED’s and verify the truth table

OBSERVATION:

2 to 4 Decoder

TRUTH TABLE:

Karnaugh Map:

Write the Kmap for the outputs Y3 Y2, Y1 and Y0


PIN DIAGRAM OF IC 7411

LOGIC DIAGRAM:

ENCODER
TRUTH TABLE:

Karnaugh Map:

Write the Kmap with don’t care conditions

LOGIC DIAGRAM:

A1= Y3+Y2

A0=Y1+Y3

Result: The encoder and decoder were designed and constructed using logic gates
and their truth table was verified.

You might also like