A7682E

Hardware Design
LTE Module

SIMCom Wireless Solutions Limited

SIMCom Headquarters Building, Building 3, No. 289 Linhong
Road, Changning District, Shanghai P.R. China
Tel: 86-21-31575100
[email protected]
www.simcom.com
 A7682E Hardware Design V1.00

Document Title: A7682E Hardware Design

Version: V1.00
Date: 2021-03-09
Status: Released

GENERAL NOTES

SIMCOM OFFERS THIS INFORMATION AS A SERVICE TO ITS CUSTOMERS, TO SUPPORT

APPLICATION AND ENGINEERING EFFORTS THAT USE THE PRODUCTS DESIGNED BY SIMCOM.
THE INFORMATION PROVIDED IS BASED UPON REQUIREMENTS SPECIFICALLY PROVIDED TO
SIMCOM BY THE CUSTOMERS. SIMCOM HAS NOT UNDERTAKEN ANY INDEPENDENT SEARCH
FOR ADDITIONAL RELEVANT INFORMATION, INCLUDING ANY INFORMATION THAT MAY BE IN THE
CUSTOMER’S POSSESSION. FURTHERMORE, SYSTEM VALIDATION OF THIS PRODUCT
DESIGNED BY SIMCOM WITHIN A LARGER ELECTRONIC SYSTEM REMAINS THE RESPONSIBILITY
OF THE CUSTOMER OR THE CUSTOMER’S SYSTEM INTEGRATOR. ALL SPECIFICATIONS
SUPPLIED HEREIN ARE SUBJECT TO CHANGE.

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THIS DOCUMENT CONTAINS PROPRIETARY TECHNICAL INFORMATION WHICH IS THE PROPERTY

OF SIMCOM WIRELESS SOLUTIONS LIMITED COPYING, TO OTHERS AND USING THIS DOCUMENT,
ARE FORBIDDEN WITHOUT EXPRESS AUTHORITY BY SIMCOM. OFFENDERS ARE LIABLE TO THE
PAYMENT OF INDEMNIFICATIONS. ALL RIGHTS RESERVED BY SIMCOM IN THE PROPRIETARY
TECHNICAL INFORMATION ，INCLUDING BUT NOT LIMITED TO REGISTRATION GRANTING OF A
PATENT , A UTILITY MODEL OR DESIGN. ALL SPECIFICATION SUPPLIED HEREIN ARE SUBJECT TO
CHANGE WITHOUT NOTICE AT ANY TIME.

SIMCom Wireless Solutions Limited

SIMCom Headquarters Building, Building 3, No. 289 Linhong Road, Changning District, Shanghai P.R.
China
Tel: +86 21 31575100
Email: [email protected]

For more information, please visit:

https://www.simcom.com/download/list-863-en.html

For technical support, or to report documentation errors, please visit:

https://www.simcom.com/ask/ or email to: [email protected]

Copyright © 2021 SIMCom Wireless Solutions Limited All Rights Reserved.

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 A7682E Hardware Design V1.00

Version History

Date Version Description of change Author

Xiaojun.Guo
2021-03-09 1.00 Original version.
Yu.Xia

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 A7682E Hardware Design V1.00

Contents
1 Introduction ................................................................................................................................ 9
1.1 Product Outline ............................................................................................................................. 9
1.2 Hardware Interface Overview ..................................................................................................... 10
1.3 Hardware Block Diagram ............................................................................................................ 10
1.4 Functional Overview.................................................................................................................... 11

2 Package Information ................................................................................................................ 13

2.1 Pin Assignment Overview ........................................................................................................... 13
2.2 Pin Description ............................................................................................................................ 15
2.3 Mechanical Information ............................................................................................................... 20
2.4 Recommend PCB Footprint Dimension ...................................................................................... 21
2.5 Recommend Stencil Size ............................................................................................................ 22

3 Interface Application ................................................................................................................ 23

3.1 Power Supply .............................................................................................................................. 23
3.1.1 Power Supply Reference Design ........................................................................................ 24
3.1.2 Recommended Power Supply Circuit ................................................................................. 25
3.1.3 Voltage Monitor.................................................................................................................... 26
3.2 Power On/ Off and Reset ............................................................................................................ 26
3.2.1 Module Power on................................................................................................................. 26
3.2.2 Module Power off ................................................................................................................. 28
3.2.3 Module Reset ...................................................................................................................... 29
3.3 UART ........................................................................................................................................... 30
3.3.1 RI/DTR description .............................................................................................................. 31
3.4 USB Interface .............................................................................................................................. 32
3.4.1 USB Reference Design ....................................................................................................... 33
3.4.2 BOOT_CFG Interface .......................................................................................................... 33
3.5 USIM Interface ............................................................................................................................ 34
3.5.1 USIM Application Guide ...................................................................................................... 35
3.5.2 Recommend USIM Card Holder.......................................................................................... 36
3.6 Analog audio interface ................................................................................................................ 38
3.6.1 Analog Audio Reference Design ......................................................................................... 38
3.7 GPIO Interface ............................................................................................................................ 39
3.8 I2C Bus........................................................................................................................................ 39
3.9 Network status ............................................................................................................................ 40
3.10 Other interface ............................................................................................................................ 41
3.10.1 ADC ................................................................................................................................... 41
3.10.2 LDO ................................................................................................................................... 41

4 RF Specifications ..................................................................................................................... 43
4.1 GSM/LTE ..................................................................................................................................... 43
4.2 GSM/ LTE Antenna Reference Design ....................................................................................... 44

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4.3 Antenna reference design ........................................................................................................... 45

4.4 PCB layout ..................................................................................................................................... 45

5 Electrical Specifications .......................................................................................................... 46

5.1 Absolute Maximum Ratings ........................................................................................................ 46
5.2 Operating conditions ................................................................................................................... 46
5.3 Operating Mode .......................................................................................................................... 47
5.3.1 Operating Mode Definition................................................................................................... 47
5.3.2 Sleep mode.......................................................................................................................... 48
5.3.3 Minimum functionality mode and Flight mode ..................................................................... 48
5.4 Current Consumption .................................................................................................................. 49
5.5 ESD Notes................................................................................................................................... 50

6 SMT Production Guide ............................................................................................................. 51

6.1 Top and Bottom View of A7682E ................................................................................................ 51
6.2 Label Information ........................................................................................................................ 52
6.3 Typical SMT Reflow Profile ......................................................................................................... 53
6.4 Moisture Sensitivity Level (MSL) ................................................................................................ 53

7 Packaging ................................................................................................................................. 55

8 Appendix ................................................................................................................................... 58
8.1 Coding Schemes and Maximum Net Data Rates over Air Interface .......................................... 58
8.2 Related Documents..................................................................................................................... 60
8.3 Terms and Abbreviations............................................................................................................. 61
8.4 Safety Caution............................................................................................................................. 62

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Table Index
Table 1: A7682E Frequency Bands ................................................................................................................. 9
Table 2: General features .............................................................................................................................. 11
Table 3: Pin Description ................................................................................................................................. 14
Table 4: IO parameters definition................................................................................................................... 15
Table 5: 1.8V IO electrical parameters definition ........................................................................................... 15
Table 6: 3.3V IO electrical parameters definition ........................................................................................... 16
Table 7: Pin description.................................................................................................................................. 16
Table 8: VBAT Pin electrical parameters ....................................................................................................... 23
Table 9: Recommended TVS diode list ......................................................................................................... 25
Table 10: Power on sequence parameters .................................................................................................... 27
Table 11: Power off sequence parameters .................................................................................................... 29
Table 12: RESET electric parameter ............................................................................................................. 30
Table 13: BOOT_CFG description ................................................................................................................. 33
Table 14: USIM electronic characteristic in 1.8V mode (USIM_VDD=1.8V) ................................................. 34
Table 15: USIM electronic characteristic in 3.0V mode (USIM_VDD=3V) .................................................... 35
Table 16: Amphenol USIM socket pin description ......................................................................................... 37
Table 17：Analog MIC input ADC parameter table ....................................................................................... 38
Table 18: GPIO Resource List ....................................................................................................................... 39
Table 19: 2G mode NETLIGHT pin status ..................................................................................................... 40
Table 20: LTE mode NETLIGHT pin status ................................................................................................... 41
Table 21: ADC electronic characteristics ....................................................................................................... 41
Table 22: VDD_EXT Electrical characteristics ............................................................................................... 41
Table 23: Conducted emission power............................................................................................................ 43
Table 24: GSM Operating bands ................................................................................................................... 43
Table 25: E-UTRA operating bands ............................................................................................................... 43
Table 26: Conducted receive sensitivity ........................................................................................................ 44
Table 27: Reference sensitivity (QPSK) ........................................................................................................ 44
Table 28: GSM/LTE antenna requirements ................................................................................................... 44
Table 29: TVS recommended part list ........................................................................................................... 45
Table 30: Absolute maximum ratings ............................................................................................................. 46
Table 31: Recommended operating ratings................................................................................................... 46
Table 32: 1.8V Digital I/O characteristics* ..................................................................................................... 46
Table 33: Operating temperature ................................................................................................................... 47
Table 34: Operating mode Definition ............................................................................................................. 47
Table 35: Current consumption on VBAT Pins (VBAT=3.8V) ........................................................................ 49
Table 36: The ESD performance measurement table (Temperature: 25℃, Humidity: 45%) ........................ 50
Table 37: The description of label information ............................................................................................... 52
Table 38: Moisture Sensitivity Level and Floor Life ....................................................................................... 54
Table 39: Tray size ......................................................................................................................................... 56
Table 40: Small Carton size ........................................................................................................................... 56
Table 41: Big Carton size ............................................................................................................................... 57

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Table 42: Coding Schemes and Maximum Net Data Rates over Air Interface ............................................. 58
Table 43: Related Documents ....................................................................................................................... 60
Table 44: Terms and Abbreviations ................................................................................................................ 61
Table 45: Safety Caution................................................................................................................................ 62

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Figure Index

Figure 1: Block diagram ................................................................................................................................. 10

Figure 2: Module pin diagram (Top view) ...................................................................................................... 13
Figure 3: Dimension drawing (Unit: mm) ....................................................................................................... 20
Figure 4: Recommend PCB footprint Dimension (Unit: mm) ........................................................................ 21
Figure 5: Recommend stencil dimension (Unit: mm) .................................................................................... 22
Figure 6: Burst current cause VBAT drop ...................................................................................................... 23
Figure 7: VBAT input reference circuit ........................................................................................................... 24
Figure 8: Recommended circuit for linear power supply ............................................................................... 25
Figure 9: Recommended circuits for switching power supply ....................................................................... 26
Figure 10: Power on/off reference circuit....................................................................................................... 27
Figure 11: PWRKEY power on sequence...................................................................................................... 27
Figure 12: PWRKEY power off sequence ..................................................................................................... 29
Figure 13: Reference reset circuit ................................................................................................................. 29
Figure 14: Serial port connection diagram (full function mode) .................................................................... 30
Figure 15: Serial port connection diagram (NULL mode) .............................................................................. 31
Figure 16: Triode level conversion circuit ...................................................................................................... 31
Figure 17: Level change on RI (SMS，URC，Incoming call) ....................................................................... 32
Figure 18: USB circuit diagram ...................................................................................................................... 33
Figure 19: Reference BOOT_CFG circuit ..................................................................................................... 34
Figure 20: Force-download port .................................................................................................................... 34
Figure 21: USIM interface reference circuit (6PIN) ....................................................................................... 35
Figure 22: USIM interface reference circuit (8PIN) ....................................................................................... 35
Figure 23: Amphenol C707 10M006 512 USIM card socket ......................................................................... 37
Figure 24: Analog audio interface reference circuit ....................................................................................... 38
Figure 25: I2C reference circuit ..................................................................................................................... 39
Figure 26: NETLIGHT reference circuit ......................................................................................................... 40
Figure 27: Passive antenna connection circuit .............................................................................................. 45
Figure 28: Reference PCB layout .................................................................................................................. 45
Figure 29: Top and bottom view of A7682E ................................................................................................... 51
Figure 30: Label information .......................................................................................................................... 52
Figure 31: The ramp-soak-spike reflow profile of A7682E ............................................................................ 53
Figure 32: packaging diagram ....................................................................................................................... 55
Figure 33: Tray drawing ................................................................................................................................. 55
Figure 34: Small carton drawing .................................................................................................................... 56
Figure 35: Big carton drawing ........................................................................................................................ 56

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 A7682E Hardware Design V1.00

1 Introduction
This document describes the hardware interface of the module, which can help users quickly understand
the interface definition, electrical performance and structure size of the module. Combined with this
document and other application documents, users can understand and use A7682E module to design and
develop applications quickly.

SIMCom provides a set of evaluation boards to facilitate A7682E module testing and use. The evaluation
board tools include an EVB board, a USB cable, an antenna, and other peripherals.

1.1 Product Outline

A7682E module supports GSM and LTE-FDD. Please refer to the following table for detailed frequency
band description:

Table 1: A7682E Frequency Bands

STANDARD BAND A7682E

900MHz 
GSM
1800MHz 
FDD B1 
FDD B3 
FDD B5 
LTE-FDD
FDD B7 
FDD B8 
FDD B20 
Category CAT1

With a small physical dimension of 19.6 * 19.6 * 2.4 mm, which can meet the requirements of space size in
almost all M2M applications, such as vehicle, metering, security, routing, wireless POS, mobile computing
equipment, PDA, tablet computer, etc.

A7682E provides 85 pins, including 50 LGA pins in the outer ring and 35 LGA pins in the inner ring. This
document will introduce all the functional pins.

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1.2 Hardware Interface Overview

A7682E provides the following hardware interfaces.

⚫ Power input
⚫ USB 2.0 interface
⚫ Three UART interfaces (one main serial port, one debug serial port and one ordinary two-wire serial
port)
⚫ I2C interface
⚫ Two USIM card interfaces
⚫ ADC interface
⚫ Power supply output
⚫ USB boot download and guidance interface
⚫ Two audio interfaces, one MIC port and one Receiver port.
⚫ General input and output interfaces (GPIO)
⚫ Network status indication interface
⚫ Antenna interface
⚫ Module operation status indication interface

1.3 Hardware Block Diagram

The block diagram of the A7682E module is shown in the figure below.
ANT

GSM/LTE
RF FEM

LTE PA GSM PA

26M

PMU XO

RF QSPI BUS NOR

FLASH

CTR BB
SPK
USB 2.0

I2C
UART

ADC
MIC

Others
USIM

GPIO

Figure 1: Block diagram

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1.4 Functional Overview

Table 2: General features

Feature Implementation
Power supply VBAT: 3.4V ~4.2V, Recommended VBAT: 3.8V
Power consumption Current consumption in sleep mode: <2mA
BAND Refer to Table 1
TX power GSM/GPRS power level:
-- EGSM900: 4 (33dBm±2dB)
-- DCS1800: 1 (30dBm±2dB)
EDGE power level:
-- EGSM900: E2 (27dBm±3dB)
-- DCS1800 : E1 (26dBm+3dB/-4dB)
LTE power level: 3 (23dBm±2.7dB)
Data transmission throughput GPRS Multiple time slot level 12
EDGE Multiple time slot level 12
FDD-LTE category 1 : 10 Mbps (DL),5 Mbps (UL)
Antenna interface GSM/LTE antenna interface
MT,MO, CB, Text , PDU mode
Short Message（SMS）storage device: USIM Card, CB does not
Short Message（SMS）
support saving in SIM Card
Support CS domain and PS domain SMS
USIM Card interface Support 1.8V/3V USIM card
Support SAT class3, GSM 11.14 Release 99
USIM application toolkit
Support USAT
Phonebook management Support phonebook types : SM/FD/ON/AP/SDN
Audio feature Support one analog MIC, one analog audio output interface
●Main serial port
Baud rate support from 300bps to 3.6Mbps
AT command and data can be sent through serial port
Support RTS/CTS Hardware flow control
UART interface ● UART3
one ordinary two-wire serial port
The default baud rate is 115200bps.
●Debug serial port
Support debug usage
USB 2.0 compliant, host mode not supported.
USB interface This interface can be used for AT command sending, data
transmission, software debugging and upgrading.
Firmware upgrade Firmware upgrade over USB interface
Dimension: 19.6*19.6*2.4mm
Physical characteristics
Weight: 1.9g±0.1

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Operation temperature: -30℃ ~ +80℃

Temperature range Extended operation temperature: -40℃ ~ +85℃*
Storage temperature: -45℃ ~ +90℃

NOTE

Module is able to make and receive voice calls, data calls, SMS and make GPRS/LTE traffic in -40℃ ~
+85℃. The performance will be reduced slightly from the 3GPP specifications if the temperature is
outside the normal operating temperature range and still within the extended operating temperature
range.

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2 Package Information
2.1 Pin Assignment Overview

A7682E provides 85 pins interface.

A7682E
(TOP VIEW)

82 BOOT_CFG
41 NETLIGHT

40 VDD_EXT
84 DBG_RX
85 DBG_TX

39 PWRKEY
42 STATUS

83 RESET
34 VBAT
35 VBAT
37 GND

36 GND
38 ADC
NC 68

GND 67

GND 66

SCL 65

SDA 64

GND 63

GND
UART1_TXD 1 33 GND
43 NC

UART1_RXD 2 32 ANT_MAIN
44 NC 69 76 75
UART1_RTS 3 GND GND GND 31 GND

UART1_CTS 4 45 GND 30 GND

NC 62
UART1_DCD 5 29 NC
46 NC 70 77 74
UART1_DTR 6 GND GND GND NC 61 28 NC

UART1_RI 7 27 GND
47 NC
NC 60
GND 8 26 USB_DM
71 72 73
48 NC GND GND GND
MICP 9 25 USB_DP
NC 59
MICN 10 24 USB_VBUS
49 NC

SPK1P 11 GPIO_2 58 23 UART3_RXD

50 NC
SPK1N 12 22 UART3_TXD
53 SIM2_DATA

56 SIM2_VDD
55 SIM2_RST
52 SIM2_DET

54 SIM2_CLK

57 GPIO_1
51 NC
GPIO_3 78

GPIO_4 79

GND 13

SIM1_DET 14

SIM1_DATA 15

SIM1_CLK 16

SIM1_RST 17

SIM1_VDD 18

GND 19

NC 20

GND 21

GPIO_6 81

GPIO_5 80

Main serial port NC GPIO SIM Card Interface

VBAT GND USB Interface Debug serial port/Ordinary two-

wire serial port

Figure 2: Module pin diagram (Top view)

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 A7682E Hardware Design V1.00

Table 3: Pin Description

Pin No. Pin name Pin No. Pin name

1 UART1_TXD 2 UART1_RXD
3 UART1_RTS 4 UART1_CTS
5 UART1_DCD 6 UART1_DTR
7 UART1_RI 8 GND
9 MICP 10 MICN
11 SPK1P 12 SPK1N
13 GND 14 SIM1_DET
15 SIM1_DATA 16 SIM1_CLK
17 SIM1_RST 18 SIM1_VDD
19 GND 20 NC
21 GND 22 UART3_TXD
23 UART3_RXD 24 USB_VBUS
25 USB_DP 26 USB_DM
27 GND 28 NC
29 NC 30 GND
31 GND 32 RF_ANT
33 GND 34 VBAT
35 VBAT 36 GND
37 GND 38 ADC
39 PWRKEY 40 VDD_EXT
41 NETLIGHT 42 STATUS
43 NC 44 NC
45 GND 46 NC
47 NC 48 NC
49 NC 50 NC
51 NC 52 SIM2_DET
53 SIM2_DATA 54 SIM2_CLK
55 SIM2_RST 56 SIM2_VDD
57 GPIO1 58 GPIO2
59 NC 60 NC
61 NC 62 NC
63 GND 64 SDA
65 SCL 66 GND
67 GND 68 NC
69 GND 70 GND
71 GND 72 GND
73 GND 74 GND
75 GND 76 GND

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77 GND 78 GPIO3
79 GPIO4 80 GPIO5
81 GPIO6 82 BOOT_CFG●
83 RESET 84 DBG_RXD
85 DBG_TXD

NOTE

‘BOOT_CFG’ Pin cannot be pulled down before the module powered up, otherwise it will affect the
normal start-up of the module.

2.2 Pin Description

Table 4: IO parameters definition

Pin type Description

PI Power input
PO Power output
AI Analog input
AO Analog output
I/O Input/output
DI Digital input
DO Digital output
DOH Digital output with high level
DOL Digital output with low level
PU Pull up
PD Pull down
OD Open Drain

Table 5: 1.8V IO electrical parameters definition

Power
Parameter Description Min Typ. Max
domain
VCC=1.8V
VIH High level input VCC * 0.7 1.8V VCC+0.2
VIL Low level input -0.3V 0V VCC *0.3
Rpu Pull up resistor 55 KΩ 79 KΩ 121KΩ
Rpd Pull down resistor 51KΩ 87 KΩ 169KΩ

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VCC=1.8V Typical
Input leakage
IIL - - 10uA
current
Input DC Operating Conditions (VCC = 1.8 V Typical)
Output high level
VOH VCC-0.2 - -
range
1.8V Output low level
VOL - - 0.2V
range
Low-level output
lol current - - 13mA
Vpad=0.2V
High-level output
loh current - - 11mA
Vpad=VCC-0.2V

Table 6: 3.3V IO electrical parameters definition

Power Paramet
Description Min Typ. Max
domain er
VCC=3.3V
VIH High level input 2V - VCC+0.3
VIL Low level input -0.3V 0V 0.8V
Rpu Pull up resistor 26K 47K 72K
Pull down
Rpd 27K 54K 267K
resistor
VCC=3.3V Typical
Input leakage
IIL - - 10uA
current
Input DC Operating Conditions (VCC = 3.3V Typical)
3.3V(SIM)
Output high
VOH 2.4V - -
level range
Output low level
VOL - - 0.4V
range
Low-level
lol output current - - 7mA
Vpad=0.4V
High-level
output current
loh - - 7mA
Vpad=VCC-0.5
V

Table 7: Pin description

Pin parameter
Pin name Pin No. Power Description Note
Type
domain

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Power supply
VBAT 34,35 - PI A7682E input voltage ranges
from 3.4V to 4.2V, and the
peak current value can reach
2A.
VDD_EXT 40 - PO 1.8V power output, output If unused, keep it
current up to 50 mA. It can open.
provide power for level
conversion circuits, but not for
high-power loads.
GND 8,13,19,2 - -
1,27,30,3
1,33,36,3
7,45,63,6
Ground
6,67,69,7
0,71,72,7
3,74,75,7
6,77
System Control
PWRKEY 39 - DI,PU Power ON/OFF input, active PWRKEY has
low. been internally
VIH: 0.7*VBAT pulled-up to VBAT
VIL: 0.5V with 50KΩ
resistor, default
high.
RESET 83 - DI,PU System reset control input, RESET has been
active low. pulled-up to VBAT
VIH：0.7*VBAT with 50KΩ
VIL：0.5V (typical) resistor,
default high.
SIM interface
SIM1_DET 14 1.8V I/O,PD SIM1 card hot swap detection
SIM1_DATA 15 1.8/3.0 I/O,PU SIM1 bus data, this pin has
V been pull-up with 4.7KΩ
resistor to SIM1_VDD.
SIM1_RST 17 1.8/3.0 I/O,PU SIM1 bus reset output.
V
SIM1_CLK 16 1.8/3.0 I/O,PU SIM1 bus clock output.
V
SIM1_VDD 18 1.8/3.0 PO SIM card power supply output,
V Supports 1.8v/3.0v output
according to the card type, Its
output current is up to 50mA.
SIM2_DET 52 1.8V I/O,PD SIM2 card hot swap detection
SIM2_DATA 53 1.8/3.0 I/O,PU SIM2 bus data, this pin has
V been pull-up with 4.7KΩ
resistor to SIM2_VDD.
SIM2_RST 55 1.8/3.0 I/O,PU USIM2 bus reset output.
V
SIM2_CLK 54 1.8/3.0 I/O,PU USIM2 bus clock output.

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V
SIM2_VDD 56 1.8/3.0 PO USIM card power supply
V output, Supports 1.8v/3.0v
output according to the card
type, Its output current is up to
50mA.
USB interface
USB_VBUS 24 - AI Valid USB detection input,
active High
Vmin=3.0V，Vmax=5.2V，
Vnorm=5V
USB_DM 26 - I/O Negative line of the differential,
bi-directional USB signal.
USB_DP 25 - I/O Positive line of the differential,
bi-directional USB signal.
Full function UART interface
UART1_TXD 1 1.8V DOH Data output
UART1_RXD 2 1.8V DI Data input
UART1_RTS 3 1.8V DI RTS input
If unused, keep it
UART1_CTS 4 1.8V DO CTS output
open.
UART1_DCD 5 1.8V DO Carrier detection
UART1_DTR 6 1.8V DI DTE Ready
UART1_RI 7 1.8V DO Ringing indicator
Debug UART
DBG_TXD 85 1.8V DOH CP_UART output Default used as
DBG_RXD 84 1.8V DI CP_UART input debug port.
UART 3
UART3_TXD 22 1.8V DOH UART3 output
UART3_RXD 23 1.8V DI UART3 input
I2C interface
SCL 65 1.8V DO I2C clock output If unused, keep it
SDA 64 1.8V I/O I2C data I/O open. If you need
to use it, please
use VDD_EXT
(40 PIN of the
module) for
pull-up
Analog audio interface
Audio microphone input If unused, keep it
MICP 9 1.8V AIO
positive
open.
Audio microphone input
MICN 10 1.8V AIO
negative
SPK1P 11 1.8V AIO Audio output positive
SPK1N 12 1.8V AIO Audio output negative
GPIO
GPIO1 57 1.8V IO,PU General purple I/O If unused, keep it

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open.
GPIO2 58 1.8V IO,PD General purple I/O If unused, keep it
open.
GPIO3 78 1.8V IO,PD General purple I/O If unused, keep it
open.
GPIO4 79 1.8V IO,PU General purple I/O If unused, keep it
open.
GPIO5 80 1.8V IO,PU General purple I/O If unused, keep it
open.
GPIO6 81 1.8V IO,PU General purple I/O If unused, keep it
open.
ANT interface
RF_ANT 32 - AIO Main ANT interface
Other pins
ADC 38 - AI General Purpose ADC If unused, keep it
open.
NETLIGHT 41 1.8V DO Network registration status
indicator (LED).
For more detail, please refer
the chapter 3.9.
STATUS 42 1.8V DO Power on status indicator
BOOT_CFG 82 1.8V DI Firmware download guide Do place 2 test
points for debug.
control input. When pull-down
Do not pull down
to GND and press PWRKEY, BOOT_CFG
A7682E will access in USB during normal
download mode. power up!

NOTE

⚫ Please reserve test points for BOOT_CFG, VDD_EXT, DBG_TXD and DBG_RXD.
⚫ If there is no USB connector, please reserve test points for USB_VBUS, USB_DP and USB_DM
for firmware upgrade.

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2.3 Mechanical Information

The following figure shows the package outline drawing of A7682E module.

Figure 3: Dimension drawing (Unit: mm)

NOTE

The side length is 19.60 ± 0.15mm, excluding burr area.

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2.4 Recommend PCB Footprint Dimension

Figure 4: Recommend PCB footprint Dimension (Unit: mm)

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2.5 Recommend Stencil Size

Recommend stencil thickness≥0.12mm and ≤0.15mm.

Figure 5: Recommend stencil dimension (Unit: mm)

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3 Interface Application
3.1 Power Supply

A7682E offers two power supply PINs (34, 35) as VBAT power input PIN. A7682E use these PINs supply
the internal RF and baseband circuit.

When the module is at the maximum power in GSM TX mode, the peak current can reach 2A (peak current),
which results in a large voltage drop on VBAT. In order to ensure that the voltage drop is less than 300mV,
the power supply capacity of external power supply must be no less than 2A.

The following figure shows the VBAT voltage drop.

57 7us 4.61 5m s

IV B A T B urst:2A

VBAT
M a x:30 0m V

Figure 6: Burst current cause VBAT drop

NOTE

Test condition: VBAT power supply 3.8V, SIMCom TE board is used for test, add 330μF tantalum
capacitor to VBAT power supply terminal.

Table 8: VBAT Pin electrical parameters

Parameter Description Min Typ. Max Unit

VBAT Module supply voltage 3.4 3.8 4.2 V
IVBAT(peak) Module consumption peak current - 2 - A
IVBAT(average) Module average consumption current (normal Refer to table 39

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mode)
Module average consumption current (sleep
IVBAT(sleep)
mode)
Module average consumption current（off leakage
IVBAT(power-off) - 30 - uA
current）

3.1.1 Power Supply Reference Design

In the user's design, make sure that the voltage on the VBAT pins will never drop below 3.4V even when the
module current consumption reaches 2A. If the voltage drops below 3.4V, the RF performance of the
module will be affected. It is recommended to select an LDO or DC-DC chip with an enable pin, and the
enable pin is controlled by the MCU.

NOTE

When the power supply can provide a peak current of 2A, the total capacity of the external power
supply capacitance is recommended to be no less than 300uf. If the peak current of 2A cannot be
provided, the total capacity of the external capacitance is recommended to be no less than 600uf to
ensure that the voltage drop on the VBAT pin at any time is not more than 300mV.

It is recommended to place four 0.1/1μF ， 33/10pF ceramic capacitors near VBAT to improve RF
performance and system stability. At the same time, it is recommended that the VBAT layout routing width
from the power supply on the PCB to the module be at least 3mm. Reference design recommendations are
as follows:

FB
Module VBAT VBAT
VBAT
TVS
10PF 33PF 0.1UF 1UF 100UF 100UF
GND

Figure 7: VBAT input reference circuit

If the VBAT input contains high-frequency interference, it is recommended to add magnetic beads for
filtering. The recommended types of magnetic beads are BLM21PG300SN1D and MPZ2012S221A.

In addition, in order to prevent the damage of A7682E caused by surge and overvoltage, it is recommended
to parallel one TVS on the VBAT pin of the module.

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Table 9: Recommended TVS diode list

No. Manufacturer Part Number VRWM Package

1 JCET ESDBW5V0A1 5V DFN1006-2L

2 WAYON WS05DPF-B 5V DFN1006-2L

3 WILL ESD5611N 5V DFN1006-2L

4 WILL ESD56151W05 5V SOD-323

NOTE

When selecting TVS, pay attention to the clamping voltage for surge protection, the clamping voltage
should not be higher than 10V for 100V surge input.

3.1.2 Recommended Power Supply Circuit

The MCU must have the function to power off the module, but the module can not be shut down or restarted
normally. Only when the module is abnormal and cannot be shut down or restarted normally can the module
be powered off. It is recommended that a switching mode power supply or a linear regulator power supply is
used. DC-DC chip is recommended for input power greater than 9V; LDO power supply is recommended for
input less than 9V.

The following figure shows the linear regulator reference circuit:

DC Input U101 MIC29302 VBAT

2 4
Vin Vout
FUSE
+
GND

C101 C102 1
FB 5 R101
100uF 1uF
On/Off
100K R103
470R
+ C103 C104
PWR_CTRL 3
330uF 100nF
R102
47K

Figure 8: Recommended circuit for linear power supply

The following figure shows the DC-DC regulator reference circuit:

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DC IN U 101 LM 2596- ADJ L101 FB 101 VBAT

1
Vin Vout 2
FUSE 100uH 270 ohm@100Mhz
R101
C101 + C102 5
+

GND
On/Off FB 4 D102 2.2K C103 C104
100uF
1uF
PWR_CTRL 3 330uF 100nF
MBR360

R102 1K

Figure 9: Recommended circuits for switching power supply

3.1.3 Voltage Monitor

AT command ‘AT+CBC’ can be used to monitor VBAT voltage.

AT command ‘AT+CVALARM’ can be used to set high/low voltage alarm, When the actual voltage exceeds
the preset range, a warning message will be reported through the AT port.

AT command ‘AT+CPMVT’ can be used to set high/low voltage power off, When the actual voltage exceeds
the preset range, the module will shut down automatically.

NOTE

Voltage monitoring function is being debugged, Overvoltage alarm and overvoltage shutdown are off by
default. For details of at commands, please refer to document [1].

3.2 Power On/ Off and Reset

3.2.1 Module Power on

Customer can power on the module by pulling down the PWRKEY pin. This pin has been pulled up inside
the module to VBAT.

It is recommended that when using the module, adding TVS diode at the module pin can effectively
enhance the ESD performance.

The recommended circuit is as follows:

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Module
PWRKEY default high VBAT

50K
Turn on/off PWRKEY 1K
impulse Power on/off
logic
4.7K

47K

Figure 10: Power on/off reference circuit

NOTE

Do not parallel capacitors which the value is exceed 100nF on PWRKEY or RESET pin. It will cause
module power on automatically when VBAT powered.
It is forbidden to pull down both RESET key and PWRKEY to power on the module at the same time.

VBAT Ton

PWRKEY
(Input)
Ton(status)
STATUS
(Output)
Ton(ua rt)

UART Undefined Active

Ton(usb)

USB Undefined Active

Figure 11: PWRKEY power on sequence

Table 10: Power on sequence parameters

Symbol Parameter Min. Typ. Max. Unit

Ton Power on low level pulse width - 50 - ms
Ton(status) Power on time (according to Status interface) - TBD - s

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Ton(uart) Power on time (according to UART interface) - 8 - s

Ton(usb) Power on time (according to USB interface) - 9 - s
VIH PWRKEY input high voltage level 0.7*VBAT - VBAT
VIL PWRKEY input low voltage level 0 0 0.5V

When the module is working, cutting off the power of the module will damage the flash. It is
recommended to turn off the module through AT command or PWRKEY before disconnecting the power
supply. When using the AT command to shut down, please ensure that the PWRKEY is at a high level;
otherwise, the module will automatically power on again after the module completes the shutdown.

3.2.2 Module Power off

A7682E has the following shutdown methods:

⚫ Power off by pulling the PWRKEY# pin down to a low level.
⚫ Power off Module by AT command ‘AT+CPOF’.
⚫ Over-voltage or under-voltage automatic power off, ‘AT+CPMVT’ set voltage range
⚫ Over-temperature or under-temperature automatic power off.

It is strongly recommended that the customer use PWRKEY or ‘AT+CPOF’ to shut down, and then power
off VBAT (especially when the module does not need to work). In addition, the customer cannot shut down
VBAT by disconnecting it, which may cause damage to FLASH.

NOTE

when the temperature exceeds the range of - 30 ~ + 80 ℃, A7682E will report warning information
through AT port. When the temperature exceeds the range of - 40 ~ + 85 ℃, A7682E will shut down
automatically. For a detailed description of ‘AT+ CPOF’ and ‘AT+ CPMVT’, please refer to document
[1].

PWRKEY can be used to power off the module, power off sequence see the following figure:

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Toff-on

PWRKEY Toff Ton

(Input)

STATUS
( Input )
Toff(status)

Toff(ua rt)

UART Active Undefined

Toff(usb)

USB Active Undefined

Figure 12: PWRKEY power off sequence

Table 11: Power off sequence parameters

Symbol Parameter Min. Typ. Max. Unit

Toff Power off low level pulse width 2.5 - - s
Toff(status) Power off time(according to status interface) - TBD - s
Toff(uart) Power off time(according to UART interface) - 2 - s
Toff(usb) Power off time(according to USB interface) - 2 - s
Toff-on Power off - power on buffer time 2 - - s

3.2.3 Module Reset

A7682E can restart the module by pulling down the reset pin of the module. Reset pin also has the function
of power on when PMU first time be given a valid supply voltage (active low, but this key has no shutdown
function). After first time power on, some register of this pin will be written then it will lose this function, so it
is recommended to use PWRKEY to power on the module and RESET key only used as reset function.

A 50K Ω resistor is used to pull-up to VBAT inside the module, so it is no need to add pull-up resistor
outside. The recommended circuit is showed as follows:
Module
VBAT

Treset 50K
Reset impulse RESET 1KΩ Reset
logic
4.7K

47K

Figure 13: Reference reset circuit

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Table 12: RESET electric parameter

Symbol Parameter Min. Typ. Max. Unit

Treset Restart low level pulse width 2 2.5 - S

VIH RESET pin input high voltage 0.7*VBAT - VBAT V

VIL RESET pin input low voltage 0 0 0.3*VBAT V

NOTE

It is recommended to use the reset pin only in case of emergency, such as the module is not
responding. The reset time is recommended to be 2.5s.

3.3 UART

A7682E provides three serial ports, the main communication serial port UART, one ordinary two-wire serial
port, and the UART_LOG dedicate to printing log. Module is DCE (Data Communication Equipment)
equipment.

When using the full function serial port, you can refer to the following connection mode:

Module ( DCE) Host ( DTE)

TXD TXD
RXD RXD
RTS RTS
CTS CTS
UART
UART

Figure 14: Serial port connection diagram (full function mode)

When using 2-wire serial port, please refer to the following connection mode:

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Module ( DCE) Host ( DTE)

TXD TXD
RXD RXD
RTS RTS
CTS CTS

UART UART

Figure 15: Serial port connection diagram (NULL mode)

The following figure shows the use of triode for level shifter circuits. The circuit with dotted line can refer to
the circuit with solid line TXD and RXD, and attention shall be paid to the direction of signal.

The recommended triode model is MMBT3904.

VDD_EXT

VIO_MCU
4.7K
1nF

1K~4.7K
470pF_NM

Module Host

TXD MCU_RXD

RXD MCU_TXD
1K~4.7K

4.7K

1nF

VDD_1V8
RTS RTS
CTS CTS
GPIO GPIO

GND GND

Figure 16: Triode level conversion circuit

NOTE

1. A7682E supports the following baud rates: 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600,
115200, 230400, 460800, 921600, 1842000, 3686400. The default baud rate is 115200bps.

2. The parasitic capacitance of the transistor will affect the edge of the high-speed digital signal. It is not
recommended to use this circuit when the signal speed is higher than 115200bps.

3.3.1 RI/DTR description

The RI pin can be used as an interrupt to wake up the host. Normally, it maintains a high voltage output.
When a short message or URC report is received, RI outputs a low voltage for 120ms (SMS)/60ms (URC),
and then returns to a high voltage state；RI will output low voltage. When receiving a telephone call as the

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called party, RI outputs low voltage, and then it will remain low voltage until the host accepts the call using
the "ATA" command, or the caller stops calling RI will resume outputting high level.

RI 120ms/60ms low voltage

Idle output when receiving SMS
HIGH and any URC report
coming.

LOW

RI Clear by end the call or answer.

Idle Incoming voice call only.
HIGH

LOW

Figure 17: Level change on RI (SMS，URC，Incoming call)

DTR can be used as the sleep wake-up pin of the A7682E module. When the A7682E module enters the
sleep mode, pull down DTR to wake up the A7682E module.

When the user sets ‘AT+CSCLK=1’ and pulls up the DTR pin, the module will enter the sleep mode. The
serial port function cannot communicate. When the A7682E module enters sleep mode, pull DTR low to
wake up.

In the mode of setting "AT+CSCLK=0", pull up the DTR pin, the normal communication of the serial port
function will not be affected.

3.4 USB Interface

A7682E contains a USB interface compliant with the USB2.0 specification as a peripheral, but does not
support USB charging function and does not support USB HOST mode.

Support high speed (480Mbps) and full speed (12Mbps). The interface can be used for AT command
sending, data transmission, software debugging and upgrading. Map out ttyUSB1-ttyUSB2 under Linux or
android system (refer to Linux or android debugging document for details).

USB is the main debugging port and software upgrade interface. It is recommended that customers reserve
USB test points during design. If a main control chip is connected, 0R resistors must be reserved for
switching external test points during design, as shown in the figure below.

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3.4.1 USB Reference Design

A7682E can be used as a USB slave device. The recommended connection circuit diagram is as follows:
Th e bran ch wi rin g sho u ld n o t e xc ee d 2mm
USB_VBUS

Module 0R_NM
Host
0R_NM Te st point

USB_VBUS

USB_DM 0R D-

USB_DP 0R D+
Pla ce cl ose t o the module
GND GND

D3 D1 D2

Figure 18: USB circuit diagram

Customers should pay attention to the selection of the D3 device when using it. It is recommended to
choose an anti-static and anti-surge two-in-one device. A TVS tube can be placed. The recommended
model is ESD5681N07.

NOTE

1. The USB data cable must be strictly routed in 90Ω +/- 10% differential. The TVS devices D1 and
D2 on the data line must be selected with equivalent capacitance less than 1pF. The TVS device
should be placed near the USB connector or test point, recommended models ESD73011N and
WS05DUCFM.

2. The detection of USB2.0 speed is determined automatically by the USB protocol. The customer
does not need to pull up the DP external, otherwise it may affect the device USB enumeration.

3.4.2 BOOT_CFG Interface

A7682E provides one forced download boot interface ‘BOOT_CFG’.

Table 13: BOOT_CFG description

Pin Power Default

Pin name I/O Description Remark
number domain state
Force download
82 BOOT_CFG DI 1.8V B-PU
boot port

If the module upgrade fails to boot, you can force upgrade through the BOOT_CFG port.

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Before the module is powered on, pull the BOOT_CFG pin to GND, then apply VBAT power to the module,
and press RESET to enter the download mode. After entering the download mode, you need to release
BOOT_CFG and remove the pull-down.

Module Disconnect when download

finished

BOOT_CFG

TVS

Figure 19: Reference BOOT_CFG circuit

Customers will see the download port in the device manager port of the Widows system.

Figure 20: Force-download port

NOTE

BOOT_CFG only has the function of forcing download and booting before booting (it cannot be pulled
down).

3.5 USIM Interface

A7682E supports both 1.8V and 3.0V USIM Cards. The interface power of the USIM card is provided by the
voltage regulator inside the module, and the normal voltage value is 3V or 1.8V.

Table 14: USIM electronic characteristic in 1.8V mode (USIM_VDD=1.8V)

Symbol Parameter Min. Typ. Max. Unit

Power supply voltage output
USIM_VDD 1.62 1.8 1.98 V
to USIM card

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VIH High-level input voltage 0.7*USIM_VDD - USIM_VDD +0.4 V

VIL Low-level input voltage -0.4 0 0.25*USIM_VDD V
VOH High-level output voltage USIM_VDD -0.4 - USIM_VDD V
VOL Low-level output voltage 0 0 0.2 V

Table 15: USIM electronic characteristic in 3.0V mode (USIM_VDD=3V)

Symbol Parameter Min. Typ. Max. Unit

Power supply voltage output
USIM_VDD 2.7 3 3.3 V
to USIM card
VIH High-level input voltage 0.7*USIM_VDD - USIM_VDD +0.4 V
VIL Low-level input voltage -0.4 0 0.25*USIM_VDD V
VOH High-level output voltage USIM_VDD -0.45 - USIM_VDD V
VOL Low-level output voltage 0 0 0.3 V

3.5.1 USIM Application Guide

It is recommended to use an ESD protection component such as ESDA6V1W5 produced by ST

(www.st.com) or SMF15C produced by ON SEMI (www.onsemi.com). Note that the USIM peripheral circuit
should be close to the USIM card socket. The following figure shows the 6-pin SIM card holder reference
circuit.
The following figure shows the 6-pin SIM card holder reference circuit.
Module
SIM Socket
USIM_VDD VCC GND
USIM_RST 22Ω RST VPP
USIM_CLK 22Ω CLK I/O

USIM_DATA 22Ω
22pF_NM
22pF_NM

22pF_NM

NM
100nF

33pF
1uF

Figure 21: USIM interface reference circuit (6PIN)

The following figure shows the 8-pin SIM card holder reference circuit.
Module
47K
VDD_1V8 SIM Socket
USIM_VDD VCC GND
USIM_RST 22Ω RST VPP
USIM_CLK 22Ω CLK I/O
USIM_DET 22Ω PRESENCE GND
USIM_DATA 22Ω
22pF_NM
22pF_NM
22pF_NM

100nF
NM

Figure 22: USIM interface reference circuit (8PIN)

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NOTE

USIM_DATA has been pulled up with a 4.7KΩ resistor to USIM_VDD in module. A 100nF capacitor on
USIM_VDD is used to reduce interference. For more details of AT commands about USIM, please refer
to document [1].

Because the SIM card circuit is susceptible to interference, causing the card not to be recognized or
dropped, please follow the following principles when designing:
⚫ During the PCB layout stage, keep the USIM card holder away from the main antenna.
⚫ The USIM card wiring should be kept away from RF lines, VBAT and high-speed signal lines as much
as possible, and the USIM card wiring should not be too long.
⚫ The GND of the USIM card holder and the GND of the module maintain good connectivity, so that the
GNDs of the two are equal in potential.
⚫ To prevent USIM_CLK from interfering with other signals, it is recommended to protect USIM_CLK
separately.
⚫ It is recommended to place a 220nF capacitor on the USIM_VDD signal line close to the USIM card
socket.
⚫ Place a TVS close to the USIM card socket. The parasitic capacitance of the TVS should not be greater
than 50pF, such as ESD9L5.0ST5G.
⚫ Connecting a 22Ω resistor in series between the USIM card socket and the module can enhance the
ESD protection performance.
⚫ In order to make the wiring smooth, it is recommended to use a single-channel TVS, placed close to
each pin of the card socket.
⚫ The USIM_CLK signal is very important. Customers should ensure that the rising edge and falling edge
time of the USIM_CLK signal are less than 40ns, otherwise, abnormal card recognition may occur.

3.5.2 Recommend USIM Card Holder

It is recommended to use the 6-pin USIM socket such as C707 10M006 512 produced by Amphenol. User
can visit http://www.amphenol.com for more information about the holder.

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Figure 23: Amphenol C707 10M006 512 USIM card socket

Table 16: Amphenol USIM socket pin description

Pin Signal Description

C1 USIM_VDD USIM Card Power supply.
C2 USIM_RST USIM Card Reset.
C3 USIM_CLK USIM Card Clock.
C5 GND Connect to GND.
C6 VPP NC
C7 USIM_DATA USIM Card data I/O.

NOTE

When customers design in-vehicle products, please choose a more reliable SIM card holder with
push-push structure.

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3.6 Analog audio interface

A7682E integrates audio codec and audio front-end, provides 1 set of MIC analog audio interface, 1 set of
SPK analog audio interface. Customers can connect the phone handle for voice calls.

--ADC: 90dB SNR@20~20KHz

--DAC: 95dB SNR@20~20KHz
--Class-AB: THD<-85dB@32-ohm Load
-- SPK1P SPK1N Support earpiece output

Table 17：Analog MIC input ADC parameter table

Maximum
parameter conditions DR（Typical） THD+N（ Typical ）
power
ADC RL=10K 101dBA -96dB(@vout -2dBv) 1.59Vp
Mono,32Ω -90dB(0.00316%)
Class-AB 100dBA 37mW
Difference (@20mW output)

3.6.1 Analog Audio Reference Design

The recommended circuit for analog audio is shown below:

MIC_BIAS
Module AGND AGND

2.2K 33pF 100pF

TVS
MICP
G rou nd shie ld ing for
33pF 100pF
differen tialw irin g
MICN
TVS
2.2K
33pF 100pFAGND AGND
Analog MIC
AGND AGND
33pF 100pF TVS
SPK1P 47uF
G rou nd shie ld ing for
33pF 100pF
differen tialw irin g 47uF
SPK1N
TVS
33pF 100pF Receiver (32Ω)
AGND
AGND AGND

Figure 24: Analog audio interface reference circuit

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3.7 GPIO Interface

A7682E module provides 6 GPIOs.

Table 18: GPIO Resource List

AT command
Pin Pin Power Default Pad Edge
Pin No. operation GPIO
name typ. domain function wakeup
number
57 GPIO1 GPIO1 IO,PD 1.8V GPIO Yes
58 GPIO2 GPIO2 IO,PD 1.8V GPIO Yes
78 GPIO3 GPIO3 IO,PD 1.8V GPIO Yes
79 GPIO4 GPIO4 IO,PD 1.8V GPIO Yes
80 GPIO5 GPIO5 IO,PD 1.8V GPIO Yes
81 GPIO6 GPIO6 IO,PD 1.8V GPIO Yes

3.8 I2C Bus

The module provides a sets of I2C interface, supports standard speed clock rate 100Kbps, support high
speed clock rate 400Kbps, its operation voltage is 1.8V.

I2C is open-drain output, and the reference circuit is as follows:

VDD_EXT
4.7K 4.7K

SCL SCL
Module SDA SDA
Equipment
GND GND

Figure 25: I2C reference circuit

NOTE

The SCL and SDA pins have no internal pull-up resistors, and the reserved pull-up power must be
VDD_EXT output by the module.

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3.9 Network status

The NETLIGHT pin is used to control network status LED, its reference circuit is shown in the following
figure.

Module VBAT

R
2.2K

4.7K
NETLIGHT

47K

Figure 26: NETLIGHT reference circuit

NOTE

The value of the resistor named ‘R’ depends on the LED characteristic.

The NETLIGHT signal is used to control the LED lights that indicate the status of the network. The working
status of this pin is shown in the table below.

Table 19: 2G mode NETLIGHT pin status

NETLIGHT pin status Module status

Always On Searching Network
200ms ON, 200ms OFF Data Transmit
800ms ON, 800ms OFF Registered network
OFF Power off / AT+CSCLK=1, and DTR is pulled high.

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Table 20: LTE mode NETLIGHT pin status

NETLIGHT pin status Module status

Always On Searching Network
200ms ON, 200ms OFF Data Transmit/Registered
OFF Power off / AT+CSCLK=1, and DTR is pulled high.

3.10 Other interface

3.10.1 ADC

The A7682E module provides 1 ADC, and its electrical characteristics are as follows:

Table 21: ADC electronic characteristics

Characteristics Min. Typ. Max. Unit

Resolution – 9 – bits
Input Range 0 – 1.8 V

NOTE

The function of using "AT+CADC" to read the voltage value of the ADC pin is under debugging. For
more information, please refer to document [1].

3.10.2 LDO

A7682E module provides one power output: VDD_EXT.

VDD_EXT is the module's system IO power supply, which can only provide a current capacity of 50mA. It
cannot be used as a high current drive source.

Table 22: VDD_EXT Electrical characteristics

Symbol Description Min. Typ. Max. Unit

VVDD_EXT Output voltage - 1.8 - V
IO Output current - - 50 mA

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NOTE

This power supply is the system power supply. If the damage will affect the system startup, it is
recommended that customers add TVS protection. The recommended model is ESD56051N.

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4 RF Specifications
4.1 GSM/LTE

Table 23: Conducted emission power

Frequency power Minimum power

EGSM900(GMSK) 33dBm ±2dB 5dBm ± 5dB
DCS1800(GMSK) 30dBm ±2dB 0dBm ± 5dB
EGSM900 (8-PSK) 27dBm ±3dB 5dBm ± 5dB
DCS1800 (8-PSK) 26dBm +3/-4dB 0dBm ±5dB
LTE-FDD B1 23dBm +/-2.7dB <-40dBm
LTE-FDD B3 23dBm +/-2.7dB <-40dBm
LTE-FDD B5 23dBm +/-2.7dB <-40dBm
LTE-FDD B7 23dBm +/-2.7dB <-40dBm
LTE-FDD B8 23dBm +/-2.7dB <-40dBm
LTE-FDD B20 23dBm +/-2.7dB <-40dBm

Table 24: GSM Operating bands

Frequency DL UL
EGSM900 925～960MHz 880～915 MHz
DCS1800 1805～1880 MHz 1710～1785 MHz

Table 25: E-UTRA operating bands

E-UTRA
UL DL Duplex Mode
BAND
1 1920 ~1980 MHz 2110 ~2170 MHz FDD
3 1710 ~1785 MHz 1805 ~1880 MHz FDD
5 824～849 MHz 869～894MHz FDD
7 2500~2570MHz 2620~2690MHz FDD
8 880 ~915 MHz 925 ~960 MHz FDD
20 832~862MHz 791~ 821MHz FDD

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Table 26: Conducted receive sensitivity

Frequency Sensitivity（TYP） Sensitivity（MAX）

EGSM900 < -109dBm 3GPP
DCS1800 < -108dBm 3GPP
LTE FDD See table 28. 3GPP

Table 27: Reference sensitivity (QPSK)

Measur Duple
3GPP Standard (unit:dBm)
E-UTRA ed x
band
1.4 MHz 3MHz 5MHz 10MHz 15 MHz 20 MHz 10 MHz Mode

1 - - -100 -97 -95.2 -94 -99 FDD

3 -101.7 -98.7 -97 -94 -92.2 -91 -98 FDD
5 -103.2 -100.2 -98 -95 - - -98.5 FDD
7 - - -98 -95 -93.2 -92 -98 FDD
8 -102.2 -99.2 -97 -94 - - -98 FDD
20 - - -97 -94 -91.2 -90 -98.5 FDD

4.2 GSM/ LTE Antenna Reference Design

For better overall performance, it is recommended that the antenna design refer to the index requirements
in the following table.

Table 28: GSM/LTE antenna requirements

Parameter Requirement
operating band See table 25 and table 26
Direction omnidirectional
Gain > -3dBi (Avg)
Input impedance 50 ohm
Efficiency > 50 %
Maximum input power 50W
VSWR <2
Isolation >20dB
PCB insertion loss(<1GHz) <0.5dB
PCB insertion loss(1GHz~2.2GHz) <1dB
PCB insertion loss(2.3GHz~2.7GHz) <1.5dB

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4.3 Antenna reference design

Module

MAIN ANT
RF connector
Matching circuit
ANT
R1 R2
GND C1 C2 D1

TVS

Figure 27: Passive antenna connection circuit

In above figure, the component R1/R2/C1/C2 is reserved for antenna matching, the value of components
can only be got after the antenna tuning, usually provided by the antenna factory. Among them, R1 and R2
paste 0Ω, C1 and C2 do not paste by default. The component D1 is a Bidirectional ESD Protection device,
which is suggested to add to protection circuit, the recommended Part Numbers of the TVS are listed in the
following table:

Table 29: TVS recommended part list

Package Part Vendor

0201 CE0201S05G01R SOCAY
0402 PESD0402-03 PRISEMI

4.4 PCB layout

Users should pay attention to the impedance design of PCB layout from the module ANT port to the
antenna connector, and the length of the PCB trance should be within 20 mm, and far away from
interference signals such as power & clock. It is recommended to reserve RF Switch Connector for
conduction test. The reference model of RF Switch Connector is: ECT 818011998.

Figure 28: Reference PCB layout

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5 Electrical Specifications
5.1 Absolute Maximum Ratings

Absolute maximum rating for digital and analog pins of A7682E are listed in the following table, exceeding
these limits may cause permanent damage to the module.

Table 30: Absolute maximum ratings

Parameter Min. Typ. Max. Unit

Voltage at VBAT -0.5 - 4.8 V
Voltage at VBUS -0.5 - 5.4 V
Voltage at digital pins
-0.3 - 2.0 V
(GPIO,I2C,UART)
-0.3 - 2.0 V
Voltage at digital pins (USIM)
-0.3 - 3.9 V
Voltage at PWRKEY、RESET -0.3 - 4.8 V

5.2 Operating conditions

Table 31: Recommended operating ratings

Parameter Min. Typ. Max. Unit

Voltage at VBAT 3.4 3.8 4.2 V
Voltage at VBUS 3.0 5.0 5.2 V

Table 32: 1.8V Digital I/O characteristics*

Parameter Description Min. Typ. Max. Unit

VIH High-level input voltage VCC*0.7 1.8 VCC+0.2 V
VIL Low-level input voltage -0.3 0 VCC*0.3 V
VOH High-level output voltage VCC-0.2 - - V
VOL Low-level output voltage 0 - 0.2 V
IOH High-level output current(no pull - - 13 mA

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down resistor)
Low-level output current(no pull
IOL - - 13 mA
up resistor)
Input high leakage current (no
IIH - - 10 uA
pull down resistor)
Input low leakage current(no pull
IIL -10 - - uA
up resistor)

NOTE

These parameters are for digital interface pins, such as GPIO , I2C, UART.

Table 33: Operating temperature

Parameter Min. Typ. Max. Unit

Normal operation temperature -30 25 80 ℃
Extended operation temperature -40 25 85 ℃
Storage temperature -45 25 +90 ℃

NOTE

The performance will be reduced slightly from the 3GPP specifications if the temperature is outside the
normal operating temperature range and still within the extreme operating temperature range.

5.3 Operating Mode

5.3.1 Operating Mode Definition

The table below summarizes the various operating modes of A7682E product.

Table 34: Operating mode Definition

Mode Function
In this case, the current consumption of module will be reduced
GSM/ LTE Sleep to the minimal level and the module can still receive paging
Normal
message and SMS.
operation
Software is active. Module is registered to the network, and the
GSM /LTE Idle
module is ready to communicate.

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Connection between two subscribers is in progress. In this

GSM / LTE Talk
case, the power consumption depends on network settings .
Module is ready for data transmission, but no data is currently
GSM /LTE Standby sent or received. In this case, power consumption depends on
network settings.
There is data transmission in progress. In this case, power
GPRS/EDGE/LTE consumption is related to network settings (e.g. power control
Data transmission level); uplink/downlink data rates, and the network
configuration (e.g. multi-slot configuration).
AT command ‘AT+CFUN=0’ can be used to set the module to a
minimum functionality mode without removing the power
supply. In this mode, the RF part of the module will not work
Minimum functionality mode
and the USIM card will not be accessible, but the serial port and
USB port are still accessible. The power consumption in this
mode is lower than normal mode.
AT command ‘AT+CFUN=4’ or pulling down the FLIGHTMODE
pin can be used to set the module to flight mode without
removing the power supply. In this mode, the RF part of the
Flight mode
module will not work, but the serial port and USB port are still
accessible. The power consumption in this mode is lower than
normal mode.
Module will go into power off mode by sending the AT
command ‘AT+CPOF’ or pull down the PWRKEY pin, normally.
Power off In this mode the power management unit shuts down the power
supply, and software is not active. The serial port and USB are
is not accessible.

5.3.2 Sleep mode

In sleep mode, the current consumption of module will be reduced to the minimal level, and module can still
receive paging message and SMS.

Several hardware and software conditions must be satisfied together in order to let A7682E enter into sleep
mode:
⚫ UART condition
⚫ USB condition
⚫ Software condition
For more information about sleep mode, please refer to document [24].

5.3.3 Minimum functionality mode and Flight mode

The command "AT+CFUN=<fun>" can set the module to this mode. This command provides three options
for setting different functions.

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⚫ AT+CFUN=0: Minimum functionality

⚫ AT+CFUN=1: Full functionality (Default)
⚫ AT+CFUN=4: Flight mode

If A7682E has been set to minimum functionality mode, the RF function and USIM card function will be
closed. In this case, the serial port and USB are still accessible, but RF function and USIM card and some
AT commands will be unavailable.

If A7682E has been set to flight mode, the RF function will be closed. In this case, the serial port and USB
are still accessible, but RF function and some AT commands will be unavailable.

When A7682E is in minimum functionality or flight mode, it can return to full functionality by the AT
command ’AT+CFUN=1’.

For detailed information about the "AT+CFUN" command, please refer to the document [1].

5.4 Current Consumption

The current consumption is listed in the table below.

Table 35: Current consumption on VBAT Pins (VBAT=3.8V)

GSM sleep/idle mode

GSM/GPRS supply current Sleep mode @ BS_PA_MFRMS=2 Typical: TBD
(without USB connection) Idle mode @ BS_PA_MFRMS=2 Typical: TBD
LTE sleep/idle mode
LTE supply current Sleep mode Typical: TBD
(without USB connection) Idle mode Typical: TBD
GSM Talk
EGSM 900 @ power level #5 Typical: TBD
DCS1800 @ power level #0 Typical: TBD
GPRS data
EGSM 900 ( 1 Rx,4 Tx) @ power level #5 Typical: TBD
DCS1800 ( 1 Rx,4 Tx) @ power level #0 Typical: TBD
EGSM 900 ( 3 Rx,2 Tx) @ power level #5 Typical: TBD
DCS1800 ( 3 Rx,2 Tx) @ power level #0 Typical: TBD
EDGE data
EGSM 900 ( 1 Rx,4 Tx) @ power level #8 Typical: TBD
DCS1800 ( 1 Rx,4 Tx) @ power level #2 Typical: TBD
EGSM 900 ( 3 Rx,2 Tx) @ power level #8 Typical: TBD
DCS1800 ( 3 Rx,2 Tx) @ power level #2 Typical: TBD

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LTE data
@5MHz 23.0dBm Typical: TBD
LTE-FDD B1 @10MHz 23.0dBm Typical: TBD
@20MHz 23.0dBm Typical: TBD
@5MHz 23.0dBm Typical: TBD
LTE-FDD B3 @10MHz 23.0dBm Typical: TBD
@20MHz 23.0dBm Typical: TBD
@5MHz 23.0dBm Typical: TBD
LTE-FDD B5
@10MHz 23.0dBm Typical: TBD
@5MHz 23.0dBm Typical: TBD
LTE-FDD B7
@10MHz 23.0dBm Typical: TBD
@5MHz 23.0dBm Typical: TBD
LTE-FDD B8
@10MHz 23.0dBm Typical: TBD
@5MHz 23.0dBm Typical: TBD
LTE-FDD B20
@10MHz 23.0dBm Typical: TBD

5.5 ESD Notes

A7682E is an electrostatic sensitive device. Users must pay attention to electrostatic protection when
producing, assembling and operating the module. The electrostatic performance parameters of the module
are as follows:

Table 36: The ESD performance measurement table (Temperature: 25℃, Humidity: 45%)

Part Contact discharge Air discharge

VBAT,GND TBD TBD
Antenna port TBD TBD
USB TBD TBD
UART TBD TBD
Other PADs TBD TBD

NOTE

Test condition is module pasted on SIMcom Development board (With ESD components).

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6 SMT Production Guide

6.1 Top and Bottom View of A7682E

Figure 29: Top and bottom view of A7682E

NOTE

The above is the design effect diagram of the module for reference. The actual appearance is subject to
the actual product.

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6.2 Label Information

Figure 30: Label information

Table 37: The description of label information

No. Description
A Project name
B Product code
C Serial number
D Module IMEI number
E QR code

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6.3 Typical SMT Reflow Profile

Figure 31: The ramp-soak-spike reflow profile of A7682E

NOTE

For more details about secondary SMT, please refer to the document [21].

6.4 Moisture Sensitivity Level (MSL)

A7682E is qualified to Moisture Sensitivity Level (MSL) 3 in accordance with JEDEC J-STD-033.

In the following two cases, the A7682E module should be fully baked before reflow soldering, otherwise the
module may cause permanent damage during the reflow soldering process.

After unpacking or vacuum packaging is damaged and leaks, the A7682E module needs to be SMT
patched within 168 hours under environmental conditions of temperature <30 degrees and relative humidity
<60%. If the above conditions are not met, bake is required.

If the vacuum packaging is not opened, but the shelf life has expired, baking is also required.

Bake conditions: users should bake modules for 192 hours in drying equipment (<5% RH) at 40+5/-0°C, or
72 hours at 85+5/-5°C. (If using a tray, please pay attention to whether the tray is resistant to thermal
deformation).

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Table 38: Moisture Sensitivity Level and Floor Life

Moisture Sensitivity Floor Life (out of bag) at factory ambient≤30°C/60% RH or

Level (MSL) as stated
1 Unlimited at ≦30℃/85% RH
2 1 year
2a 4 weeks
3 168 hours
4 72 hours
5 48 hours
5a 24 hours
Mandatory bake before use. After bake, it must be reflowed within the
6
time limit specified on the label.

NOTE

IPC / JEDEC J-STD-033 standard must be followed for production and storage.

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7 Packaging
A7682E support tray packaging.

Figure 32: packaging diagram

Module tray drawing：

Figure 33: Tray drawing

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Table 39: Tray size

Length（±3mm） Width（±3mm） number

242.0 161.0 24

Small carton drawing：

Figure 34: Small carton drawing

Table 40: Small Carton size

Length（±10mm） Width（±10mm） Height（±10mm） number

270 180 120 24*20=480

Big carton drawing：

Figure 35: Big carton drawing

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Table 41: Big Carton size

Length（±10mm） Width（±10mm） Height（±10mm） number

380 280 280 480*4=1920

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8 Appendix
8.1 Coding Schemes and Maximum Net Data Rates over Air Interface

Table 42: Coding Schemes and Maximum Net Data Rates over Air Interface

Multi slot definition (GPRS/EDGE)

Slot class DL slot number UL slot number Active slot number
1 1 1 2
2 2 1 3
3 2 2 3
4 3 1 4
5 2 2 4
6 3 2 4
7 3 3 4
8 4 1 5
9 3 2 5
10 4 2 5
11 4 3 5
12 4 4 5
GPRS coding scheme Max data rata（4 slots） Modulation type
CS 1 = 9.05 kb/s / time slot 36.2 kb/s GMSK
CS 2 = 13.4 kb/s / time slot 53.6 kb/s GMSK
CS 3 = 15.6 kb/s / time slot 62.4 kb/s GMSK
CS 4 = 21.4 kb/s / time slot 85.6 kb/s GMSK
EDGE coding scheme Max data rata（4 slots） Modulation type
MCS 1 = 8.8 kb/s/ time slot 35.2 kb/s GMSK
MCS 2 = 11.2 kb/s/ time slot 44.8 kb/s GMSK
MCS 3 = 14.8 kb/s/ time slot 59.2 kb/s GMSK
MCS 4 = 17.6 kb/s/ time slot 70.4 kb/s GMSK
MCS 5 = 22.4 kb/s/ time slot 89.6 kb/s 8PSK
MCS 6 = 29.6 kb/s/ time slot 118.4 kb/s 8PSK
MCS 7 = 44.8 kb/s/ time slot 179.2 kb/s 8PSK
MCS 8 = 54.4 kb/s/ time slot 217.6 kb/s 8PSK
MCS 9 = 59.2 kb/s/ time slot 236.8 kb/s 8PSK
HSDPA device category Max data rate（peak） Modulation type

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Category 1 1.2Mbps 16QAM,QPSK

Category 2 1.2Mbps 16QAM,QPSK
Category 3 1.8Mbps 16QAM,QPSK
Category 4 1.8Mbps 16QAM,QPSK
Category 5 3.6Mbps 16QAM,QPSK
Category 6 3.6Mbps 16QAM,QPSK
Category 7 7.2Mbps 16QAM,QPSK
Category 8 7.2Mbps 16QAM,QPSK
Category 9 10.2Mbps 16QAM,QPSK
Category 10 14.4Mbps 16QAM,QPSK
Category 11 0.9Mbps QPSK
Category 12 1.8Mbps QPSK
Category 13 17.6Mbps 64QAM
Category 14 21.1Mbps 64QAM
Category 15 23.4Mbps 16QAM
Category 16 28Mbps 16QAM
Category 17 23.4Mbps 64QAM
Category 18 28Mbps 64QAM
Category 19 35.5Mbps 64QAM
Category 20 42Mbps 64QAM
Category 21 23.4Mbps 16QAM
Category 22 28Mbps 16QAM
Category 23 35.5Mbps 64QAM
Category 24 42.2Mbps 64QAM
HSUPA device category Max data rate（peak） Modulation type
Category 1 0.96Mbps QPSK
Category 2 1.92Mbps QPSK
Category 3 1.92Mbps QPSK
Category 4 3.84Mbps QPSK
Category 5 3.84Mbps QPSK
Category 6 5.76Mbps QPSK
LTE-FDD device category
Max data rate（peak） Modulation type
(Downlink)
Category 1 10Mbps QPSK/16QAM/64QAM
Category 2 50Mbps QPSK/16QAM/64QAM
Category 3 100Mbps QPSK/16QAM/64QAM
Category 4 150Mbps QPSK/16QAM/64QAM
LTE-FDD device category
Max data rate（peak） Modulation type
(Uplink)
Category 1 5Mbps QPSK/16QAM
Category 2 25Mbps QPSK/16QAM

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Category 3 50Mbps QPSK/16QAM

Category 4 50Mbps QPSK/16QAM

8.2 Related Documents

Table 43: Related Documents

NO. Title Description

A7600 Series_AT Command
[1] AT Command Manual
Manual _V1.00.04
ITU-T Draft new
[2] Serial asynchronous automatic dialing and control
recommendationV.25ter
Digital cellular telecommunications (Phase 2+); AT command
[3] GSM 07.07
set for GSM Mobile Equipment (ME)
[4] GSM 07.10 Support GSM 07.10 multiplexing protocol
Digital cellular telecommunications (Phase 2+); Use of Data
Terminal Equipment – Data Circuit terminating Equipment
[5] GSM 07.05
(DTE – DCE) interface for Short Message Service (SMS) and
Cell Broadcast Service (CBS)
Digital cellular telecommunications system (Phase 2+);
[6] GSM 11.14 Specification of the SIM Application Toolkit for the Subscriber
Identity Module – Mobile Equipment (SIM – ME) interface
Digital cellular telecommunications system (Phase 2+);
[7] GSM 11.11 Specification of the Subscriber Identity Module – Mobile
Equipment (SIM – ME) interface
Digital cellular telecommunications system (Phase 2+);
[8] GSM 03.38
Alphabets and language-specific information
Digital cellular telecommunications system (Phase 2) ；
[9] GSM 11.10 Mobile Station (MS) conformance specification ； Part 1:
Conformance specification
Digital cellular telecommunications system (Release 5);
[10] 3GPP TS 51.010-1
Mobile Station (MS) conformance specification
Electromagnetic Compatibility (EMC) for mobile terminals and
[11] 3GPP TS 34.124
ancillary equipment.
Electromagnetic Compatibility (EMC) for mobile terminals and
[12] 3GPP TS 34.121
ancillary equipment.
Technical Specification Group Radio Access Network;
[13] 3GPP TS 34.123-1 Terminal conformance specification; Radio transmission and
reception (FDD)
User Equipment (UE) conformance specification; Part 3:
[14] 3GPP TS 34.123-3
Abstract Test Suites.
Electromagnetic compatibility and Radio spectrum Matters
(ERM); Base Stations (BS) and User Equipment (UE) for
IMT-2000. Third Generation cellular networks; Part 2:
[15] EN 301 908-02 V2.2.1
Harmonized EN for IMT-2000, CDMA Direct Spread
(UTRA FDD) (UE) covering essential requirements of article
3.2 of the R&TTE Directive
Electromagnetic compatibility and Radio Spectrum Matters
[16] EN 301 489-24 V1.2.1 (ERM); Electromagnetic Compatibility (EMC) standard for
radio equipment and services; Part 24: Specific conditions for

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IMT-2000 CDMA Direct Spread (UTRA) for Mobile and

portable (UE) radio and ancillary equipment
[17] IEC/EN60950-1(2001) Safety of information technology equipment (2000)
Digital cellular telecommunications system (Release 5);
[18] 3GPP TS 51.010-1
Mobile Station (MS) conformance specification
[19] GCF-CC V3.23.1 Global Certification Forum - Certification Criteria
Directive of the European Parliament and of the Council of 27
January 2003 on the restriction of the use of certain
[20] 2002/95/EC
hazardous substances in electrical and electronic equipment
(RoHS)
Module
[21] Module secondary SMT Guidelines
secondary-SMT-UGD-V1.xx
A7600Series_UART_Applicati This document describes how to use UART interface of
[22]
on Note_V1.xx SIMCom modules.
Antenna design guidelines for
[23] Antenna design guidelines for diversity receiver system
diversity receiver system
[24] A7600 Sleep Mode Application Note
Series_SleepMode_Applicatio
n Note_V1.xx

8.3 Terms and Abbreviations

Table 44: Terms and Abbreviations

Abbreviation Description
ADC Analog-to-Digital Converter
AMR Adaptive Multi-Rate
CS Coding Scheme
CSD Circuit Switched Data
CTS Clear to Send
DTE Data Terminal Equipment (typically computer, terminal, printer)
DTR Data Terminal Ready
DTX Discontinuous Transmission
EFR Enhanced Full Rate
EGSM Enhanced GSM
ESD Electrostatic Discharge
ETS European Telecommunication Standard
FR Full Rate
GPRS General Packet Radio Service
GSM Global Standard for Mobile Communications
HR Half Rate
IMEI International Mobile Equipment Identity
Li-ion Lithium-Ion
MO Mobile Originated

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MS Mobile Station (GSM engine), also referred to as TE

MT Mobile Terminated
PAP Password Authentication Protocol
PBCCH Packet Broadcast Control Channel
PCB Printed Circuit Board
PCL Power Control Level
PCS Personal Communication System, also referred to as GSM 1900
PDU Protocol Data Unit
PPP Point-to-point protocol
RF Radio Frequency
RMS Root Mean Square (value)
RTC Real Time Clock
RX Receive Direction
SIM Subscriber Identification Module
SMS Short Message Service
TE Terminal Equipment, also referred to as DTE
TX Transmit Direction
UART Universal Asynchronous Receiver & Transmitter
URC Unsolicited Result Code
USSD Unstructured Supplementary Service Data
PB abbreviation
FD SIM fix dialing phonebook
LD SIM last dialing phonebook (list of numbers most recently dialed)
MC Mobile Equipment list of unanswered MT calls (missed calls)
ON SIM (or ME) own numbers (MSISDNs) list
RC Mobile Equipment list of received calls
SM SIM phonebook
NC Not connect

8.4 Safety Caution

Table 45: Safety Caution

Marks Requirements
When in a hospital or other health care facility, observe the restrictions about the use
of mobiles. Switch the cellular terminal or mobile off, medical equipment may be
sensitive and not operate normally due to RF energy interference.

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Switch off the cellular terminal or mobile before boarding an aircraft. Make sure it is
switched off. The operation of wireless appliances in an aircraft is forbidden to prevent
interference with communication systems. Forgetting to think much of these
instructions may impact the flight safety, or offend local legal action, or both.
Do not operate the cellular terminal or mobile in the presence of flammable gases or
fumes. Switch off the cellular terminal when you are near petrol stations, fuel depots,
chemical plants or where blasting operations are in progress. Operation of any
electrical equipment in potentially explosive atmospheres can constitute a safety
hazard.
Your cellular terminal or mobile receives and transmits radio frequency energy while
switched on. RF interference can occur if it is used close to TV sets, radios,
computers or other electric equipment.
Road safety comes first! Do not use a hand-held cellular terminal or mobile when
driving a vehicle, unless it is securely mounted in a holder for hands free operation.
Before making a call with a hand-held terminal or mobile, park the vehicle.
GSM cellular terminals or mobiles operate over radio frequency signals and cellular
networks and cannot be guaranteed to connect in all conditions, especially with a
mobile fee or an invalid SIM card. While you are in this condition and need emergent
help, please remember to use emergency calls. In order to make or receive calls, the
cellular terminal or mobile must be switched on and in a service area with adequate
cellular signal strength.
Some networks do not allow for emergency call if certain network services or phone
features are in use (e.g. lock functions, fixed dialing etc.). You may have to deactivate
those features before you can make an emergency call.
Also, some networks require that a valid SIM card be properly inserted in the cellular
terminal or mobile.

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