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Assignment No.1 DSDV BEC302

Important dsdv

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12 views1 page

Assignment No.1 DSDV BEC302

Important dsdv

Uploaded by

marutibelgundkar90
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© © All Rights Reserved
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ASSIGNMENT 1

AY: 2024-25 (ODD)


Department: ECE / Division: 3rd
Subject with Subject Code: Digital System Design Using Verilog (BEC302)
Faculty Name: Mr. Vasantkumar K Upadhye

Last Date for submission:

Q. No. Question CO PO BTL


Place the following equations into proper Canonical Forms:
i) f(a,b,c) = ab’+ac’+bc
1 ii) f(a,b,c,d) = (a+b’)(a+b’+d) 1 1,2 2
iii) f(a,b,cd) = a+bc+ac’d
iv) f(a,b,c,d) = a(b+c)(a+c+d)
Design a logic circuit that has 4 inputs, the output will be High, when the
2 1 1,2 2
majority of the inputs are high. Use K-Map to simplify
Identify all the Prime implicants and Essential Prime implicants of the
following using K-Map
i) f(a,b,c,d) =Ʃm(6,7,9,10,13) + Ʃd(1,4,5,11,15)
3 1 1,2 2
ii) f(a,b,c,d) = πM(12,3,4,9,10) + π(0,14,15)
iii) f(w,x,y,z) = Ʃ(0,2,4,5,6,7,8,1013,15)
iv) f(a,b,c,d) =Ʃm(0,1,2,5,6,7,8,9,10,13,14,15)
Find all the Prime Implicants of the function using Quine – Mcclusky
method
4 1 1,2 2
i) f(a,b,c,d) =Ʃm(7,9,12,13,14,15) + Ʃd(4,11)
ii) y = Ʃm(1,2,3,5,9,12,14,15) + Ʃd(4,8,11)
Design a Combinational circuit to output the 2’s complement of a 4-bit
5 1 1,2 2
binary number.
6 Design a two bit magnitude comparator 2 1 2
7 Implement Full subtractor using 3:8 decoder. 2 1 2
Implement Boolean function using 8:1 Mux , Treat a,b,c as select lines 2
8 1 2
f(a,b,c,d) =Ʃm(0,1,5,6,7,9,10,15)
Implement the Boolean Function f(a,b,c,d) =Ʃm(0,2,4,5,7,9,10,14) using 2
multiplexers with two 4:1 MUX with variable a & d connected to their
9 1 2
select lines in the first level and one 2:1 MUX with variable C connected to
its select lines in the second level
Explain 4-bit Carry look Ahead Adder with necessary diagrams and 2
10 1 2
relevant expressions
Explain 8 to 3 Priority Encoder with logic diagrams and relevant 2
11 1 2
expressions
Implement f1(a,b,c) =Ʃm(1,2,4,5) and f1(a,b,c) =Ʃm(0,5,7) using 3 to 8 2
12 1 2
Decoder
13 Write a short note on Programmable Logic Devices 2 1 1
14 Explain Full adder with truth table, K-map and logic diagram 2 1 1
Implement Boolean function f(a,b,c,d) =Ʃm(4,5,7,8,10,12,15) using 4:1
15 mux and external logic gates, if
i) a,b are connected to select lines ii) c,d are connected to select lines

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