Control System Overview

MS6001 B - Flow
Graph

HP HP TURB. LP TURBINE
COMPRESSOR EXHAUST

INLET COMBUST
OR

TEMPERATURE

ATMOSPHRIC PRESSURE
LEVEL
 Control
Overview
The output, FSR, is the command signal for the fuel flow. The
minimum value select gate connects the output signals of the six
control modes to the FSR controller. The lower FSR output of the
six control loop is allowed to pass throught the gate of the control
system as controlling FSR. The six controls are START UP,
ACCELERATION, MANUAL, SHUT-DOWN, SPEED,
TEMPERATURE.
The controlling FSR will establish the fuel input to the turbine at
the rate required by the system which is in control. Only one
control loop at any particular time and the control loop which is
controlling the FSR will be displayed on the CRT.
 VSV Control

Transient Operability Control: IGV Control

• Variable inlet guide vanes (VIGV) modulation maintains proper

flows and pressures, and thus stresses, in the compressor,
mainteining a minimum pressure drop accross the fuel nozzles
and, when used in a combined cycle application, maintein high
exhaust temperatures at low loads.

• At low speed front stages are pumping more than aft stages can
accept. Thus, vanes are closed to limit airflow.

• Compressor design point is set at high speed.

Thus, vanes are set to maximize compressor efficiency and to
maintain stall margin.
 VIGV Control -
Actuator

Hydraulic
Actuator
 Min / Max Selector

All of the fuel controller and fuel limiters generate an output

that is relative to fuel valve opening in %.

These outputs are compared and the parameter that is

requesting the lowest fuel demand is the parameter that has
control of the gas control valve.

This is referred to as min signal selecting.

selecting
 Fuel Control

This controls are: START UP, ACCELERATION, SPEED

DROOP/ISOK, TEMPERATURE, SHUT-DOWN,
MANUAL.
The MK5 signal name are, FSRSU, FSRACC, FSRN,
FSRT, FSRSD, FSRMAN.
 Fuel Control

Description, FSRSU.
After the purge sequence has expired, the firing sequence
is enabled. The logic L83SU_FI is set to a “1” and the
constant FSKSU_FI is set to the output as prefixed value
at which the GCV is opened to light-off the unit. As soon
as the the the TCP has detected “fire” the control selects
the logic L83SU_WU to initiate the warm-up sequence,
that is prolongated generally for one minute. After the WU
timer has expired, a constant for max fuel acceleration SU
control is set by the logic L83SUAR. The firing gas valve
opening is corrected by a correction value taking in
account the ambient temperature.
 Fuel Control

This controls are: START UP, ACCELERATION, SPEED

DROOP/ISOK, TEMPERATURE, SHUT-DOWN,
MANUAL.
The MK5 signal name are, FSRSU, FSRACC, FSRN,
FSRT, FSRSD, FSRMAN.
 Fuel Control

Description, FSRSU.
After the purge sequence has expired, the firing sequence
is enabled. The logic L83SU_FI is set to a “1” and the
constant FSKSU_FI is set to the output as prefixed value
at which the GCV is opened to light-off the unit. As soon
as the the the TCP has detected “fire” the control selects
the logic L83SU_WU to initiate the warm-up sequence,
that is prolongated generally for one minute. After the WU
timer has expired, a constant for max fuel acceleration SU
control is set by the logic L83SUAR. The firing gas valve
opening is corrected by a correction value taking in
account the ambient temperature.
 Fuel Control

The Acceleration fuel controller, FSRACC, is calculated by the

BBL FSRACCV1. The calculation starts from the verification of
the limit of acceleration related to the speed of the machine.
The constants TAKHn and TAKNn will delimit the correct
value.
Once the calculation has been done, the value is send to
another calculator block; in this section, the actual FSR is
corrected by the calculated limitation and, if the resault is the
minimum of all the other FSRs, the acceleration FSR will lead
the control.
 Fuel Control

The speed control is a “closed loop” referred to the actual

FSR. The FSRN is calculated starting from the error between
TNRL (droop speed setpoint) and TNH, actual speed.
The calculated error (+/-) is then multiplied per a gain and
added to the actual calculated FSRN for adjust.
This BBL has the possibility to drive the system with an
adjustable deadband, for special application.
 Fuel Control

The fuel stroke reference for temperature control, FSRT, is

calculated in a way similar to the speed control FSR. The
error is calculated by the difference between TTXRB
(calculated max exhaust temperature) and TTXM (actual
exhaust temperature).
The resault is then treated and added to the actual FSR to
determine the FSRT
 Fuel Control

The fuel stroke reference for shut down control takes into
account the value of fuel stroke reference at the beginning of
the SD.
Then, by selecting the correct rate, the logics L83JSDn select
the rate value contained in FSKSDn constant. The FSRSD
starts lowering from the preset value to a min value for which
it is achieved the flame out.
 Fuel Control

The speed ratio valve, SRV, control the intervalve pressure P2

according to the GT speed. The setpoint is calculated by
multipling the speed a constant. The resault is then sent to the
servo controller which will set the pressure according to the
schedule.
 Fuel Control
(REGULATOR LOOP
- PRESSURE)
P2

From the gas line To the combustion chambers

SRV GCV (REGULATOR LOOP

- POSITION)

FPRGV2 FSROUTV2
BLOCK BLOCK
MK5 Panel Control System
The GE SPEEDTRONIC Mark V is a fully programmable
turbine control system designed to meet the needs of
today’s industry.
The Mark V joins GE’s extensive turbine control
application and design experience with state-of-art
electronic hardware and software.
The Mark V controls are available as Simplex, LM and
TMR control system.
The Mark V TMR control panel, uses three processors to
protect, monitor, and control the unit.
This cores are commonly known as the <R>, <S>, <T>
cores. The cores contain an INTEL 8086 CPU with
companion circuitry to process the application software.
All the inputs in <Q> core are processed in each of the
three processor, and the status in each board of these
functions are voted using a “two out of three” process and
the voted value is used in the protection algorithms and
sequencing.
The <C> common data processor core acts as
anindipendent processor with the function of
communicating with <I>.
It does not have any access to the protection core data,
but receives the prevoted data from <Q> and process it
giving a diagnostic alarm in case of a missmatch. The loss
of <C> processor does not trip the turbine, as it does not
process any critical signal, processed by <R>, <S> and
<T>.
 <Q> <C> -Core

<PD> -Core
The two digital I/O cores, <QD1> and <QD2>, are used to
read and write digital I/O signals.
These cores send their data through an I/O communication
network, (IONET), to either cores <R>, <S> and <T> for
voting and processing.
The fourth I/O core, <CD> send the data throught IONET to
<C> core for processing.
The <PD> core is used to distribute the 125 V dc to:
-TCPS power supply boards located in each I/O core and in
the Control Engine core <R>,
-TCEA boards and the TCTG board in the <P> core
-DTBA, DTBC and DTBD terminal boards in the digital I/O
cores.
The <P> core contains protective processors.
Each of these processors are responsible for emergency
overspeed detection and trip signal initiation, provide
ultraviolet flame detector excitation voltage, and
synchronization for generator drive applications.
The status in each board of these functions are voted
using a “two out of three” process and the voted value is
used in the protection algorithms and sequencing.
 MARK V TMR PANEL LAYOUT

Mark V TMR
<S>
I/O CONTROL
TMTMR <R>
I/O CONTROL
<C>
I/O CONTROL
1-DCC/LCC 3PL 1-DCC/LCC 3PL 1-DCC/LCC 3PL
2-TCQA 2-TCQA 2-TCCA
3-open 3-OPEN 3-OPEN
4-TCQC 4-TCQC 4-OPEN
5-TCPS 5-TCPS 5-TCPS
6-QTBA 6-QTBA 6-CTBA
7-OPEN 7-TBQB 7-TBCB
8-OPEN 8-TBQA 8-TBQA
9-OPEN 9-TBQC 9-TBCA

DENET

<T> <P> IONET <PD> IONET

I/O CONTROL 3PL PROTECTIVE POWER
1-DCC/LCC 1-TCEA DISTRIBUTION
2-TCQA 2-TCEB
3-OPEN 3-TCEA 1-TCPD
4-TCQC 4-TCTG
5-TCPS 5-TCEA
6-QTBA 6-PTBA

<QD1> <CD>
DIGITAL I/O DIGITAL I/O
1-TCDA 1-TCDA
2-TCDA 2-open
3-TCDA 3-open
4-TCRA 4-TCRA
5-TCRA 5-TCRA
6-DTBA 6-DTBA
7-DTBB 7-DTBB
8-DTBC 8-DTBC
9-DTBD 9-DTBD
Communications Networks
Information is communicated, shared, and acted upon in
the Mark V Control System via three separate and dedicate
networks.
The one external network, the Stage Link, is the primary
means of communication between the operator interface
and the Control Engine located in the <R> core of the
control panel.
This link uses ARCNET configuration.
The operator interface utilizes a single high
impedance port that distributes signals in both
directions on the Stage Link via a "T" type connector.
The ARCNET board within the operator interface
receives data by tapping off a portion of signal
transmitted on the Stage Link.
 Stagelink to <HMI>
(Arcnet) <C>
CONTROLLER
1-DCC/LCC
2-TCCA
3-open
4-open
5-TCPS
6-CTBA
7-TBCB
R 8-TBQA
9-TBCA
The platform for the operator
interface is an industrial-grade,
desktop PC with the last updated
hardware components:

• 486 / Pentium CPU

• color monitor
• keyboard
• trackball
• SCSI hard drive
• ARCNET® card
 Stagelink to <HMI>
R (Arcnet)

<I>
DENET

<C> <R> <S> <T>

CONTROLLER I/O CONTROL I/O CONTROL I/O CONTROL
1-DCC/LCC 1-DCC/LCC 1-STCA/UCPB 1-STCA/UCPB
2-TCQA
2-TCCA 2-TCQA 2-TCQA
3-TCCB 3-OPEN 3-OPEN 3-OPEN
4-open 4-TCQC 4-TCQC 4-TCQC
5-TCPS 5-TCPS 5-TCPS 5-TCPS
6-CTBA 6-QTBA 6-QTBA 6-QTBA
7-TBCB 7-TBQB 7-OPEN
8-TBQA 8-TBQA 8-OPEN
9-TBCA 9-TBQC 9-OPEN
 Stage Link - CABLE RECOMMENDATIONS

Copper Cable Recommendations

Indoor Cable RG-62 A/U Co-axial Cable

Outdoor Cable Armored Co-axial or Tri-axial Cable
Connector Type BNC Male (both ends)

Fiber Optic Cabling Recommendations

Cable Multi-mode with 62.5 micron Core/120 micron Cladding

Connector Type ST Bayonet
Hub Power 120 VAC/60 HZ or 240 VAC/50 HZ (Customer Supplied)
Hub Configuration 2 Co-axial Ports and 2 Fiber-optic Ports (4 ST Type Connectors)
In a TMR panel, each of the <Q> core indipendently
read inputs from a device. A critical signal such as a
turbine speed, is read indipendently from the cores.
A less important signal, generated from a single
instrument, is read from all the processors.
 Stagelink
R to <I> (Arcnet)

<I>
DENET

<C> <R> <S> <T>

CONTROLLER I/O CONTROL I/O CONTROL I/O CONTROL
1-DCC/LCC 1-DCC/LCC 1-STCA/UCPB 1-STCA/UCPB
2-TCQA
2-TCCA 2-TCQA 2-TCQA
3-TCCB 3-OPEN 3-OPEN 3-OPEN
4-open 4-TCQC 4-TCQC 4-TCQC
5-TCPS 5-TCPS 5-TCPS 5-TCPS
6-CTBA 6-QTBA 6-QTBA 6-QTBA
7-TBCB 7-TBQB 7-OPEN
8-TBQA 8-TBQA 8-OPEN
9-TBCA 9-TBQC 9-OPEN
Each processor retrives all three values processed by
each one of the cores, throught an internal NETWORK
and performs a two out of three vote. The voted value is
then stored, shared and applied for use in the operation.
In this way, it is ensured that all the cores have the same
values in use for the operation. The pre-vote data system
on the DENET is made available in <C> core, which vote
indipendently the value and generate a diagnostic alarm in
case of a mismatch is detected.
This control scheme, Software Implemented Fault
Tolerance (SIFT) ensure that all the three processors uses
the same value for the calculation, also if one of them is
reading a not valid signal value.
The third internal network is known as the I/O network
(IONET).
The IONET is a serial communications network that is
connected in a daisy chain configuration.
The purpose of the IONET is to transfer signals from the digital
I/O cores (<QD1>, <QD2>) and the protective core (<P>) to the
I/O control processors.
The IONET is identical to all three processors with the
exception of <C>. The <C> core has no access to <P> core.
With this configuration a TMR panel has four different IONET
while a Simplex panel has two.
Stagelink
Tipical application for <R> and <C>
to <I> (Arcnet)
DENET

<C> <R> <S> <T>

CONTROLLER I/O CONTROL I/O CONTROL I/O CONTROL
1-DCC/LCC 1-DCC/LCC 1-STCA/UCPB 1-STCA/UCPB
2-TCQA
2-TCCA 2-TCQA 2-TCQA
3-TCCB 3-OPEN 3-OPEN 3-OPEN
4-open 4-TCQC 4-TCQC 4-TCQC
5-TCPS 5-TCPS 5-TCPS 5-TCPS
6-CTBA 6-QTBA 6-QTBA 6-QTBA
7-TBCB 7-TBQB 7-OPEN
8-TBQA 8-TBQA 8-OPEN
9-TBCA 9-TBQC 9-OPEN

IONET IONET
<CD> <P> <QD1> <QD2>
DIGITAL I/O PROTECTIVE DIGITAL I/O DIGITAL I/O
1-TCDA 1-TCEA 1-TCDA 1-TCDA
2-open 2-TCEB 2-TCDA 2-TCDA
3-open 3-TCEA 3-TCDA 3-TCDA
4-TCRA 4-TCTG 4-TCRA 4-TCRA
5-TCRA 5-TCEA 5-TCRA 5-TCRA
6-DTBA 6-PTBA 6-DTBA 6-DTBA
7-DTBB 7-DTBB 7-DTBB
8-DTBC 8-DTBC 8-DTBC
9-DTBD 9-DTBD 9-DTBD
Power distribution module

Incoming power terminates on the row of screws located

near the bottom in the power distribution module.

The control panel can accept power from multiple power

sources.

Power sources can be any combination of a 125 VDC

source and/or up to two 120/240 VAC sources.
 Power Distribution Module
• Ground Detection
• Undervoltage Detection

Power
100 - 140 vdc Distribution To Mark V
Module Controllers

105 - 132 vac #1 AC

210 - 264 vac SUPPLY
(47 - 63 Hz) (optional)

105 - 132 vac #2 AC

210 - 264 vac SUPPLY
(47 - 63 Hz) (optional)
The platform for the operator
interface is an industrial-grade,
desktop PC with the last updated
hardware components:

• 486 / Pentium CPU

• color monitor
• keyboard
• trackball
• SCSI hard drive
• ARCNET® card
The platform for the operator interface is an industrial-grade,
desktop PC with the last updated hardware components:
486 / Pentium CPU
color monitor
keyboard
trackball
SCSI hard drive
ARCNET® card
 Arcnet Card Settings
Power down your unit & install the ARCNET card with these settings

Block E3: Jump A8, A6

Block E2: Jump RDIS, 16K

Block E4: Jump A23, A22, A21, A20, A17, A15, A14

Card Model A198-CXB

Dip Switches 6-8 down, 1-5 up

Block IRQ: Jump 10

<I> Operator / Maintenance Interfac
• Operator &
Maintenance
Interface

• Industrial Grade PC